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Searched refs:I915_WRITE_IMR (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/i915/
Dintel_ringbuffer.c1206 I915_WRITE_IMR(ring, ~GT_PARITY_ERROR(dev)); in init_render_ring()
1704 I915_WRITE_IMR(ring, in gen6_ring_get_irq()
1708 I915_WRITE_IMR(ring, ~ring->irq_enable_mask); in gen6_ring_get_irq()
1726 I915_WRITE_IMR(ring, ~GT_PARITY_ERROR(dev)); in gen6_ring_put_irq()
1728 I915_WRITE_IMR(ring, ~0); in gen6_ring_put_irq()
1746 I915_WRITE_IMR(ring, ~ring->irq_enable_mask); in hsw_vebox_get_irq()
1763 I915_WRITE_IMR(ring, ~0); in hsw_vebox_put_irq()
1782 I915_WRITE_IMR(ring, in gen8_ring_get_irq()
1786 I915_WRITE_IMR(ring, ~ring->irq_enable_mask); in gen8_ring_get_irq()
1805 I915_WRITE_IMR(ring, in gen8_ring_put_irq()
[all …]
Dintel_ringbuffer.h47 #define I915_WRITE_IMR(ring, val) I915_WRITE(RING_IMR((ring)->mmio_base), val) macro
Dintel_lrc.c1486 I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask)); in gen8_init_common_ring()
1644 I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask)); in gen8_logical_ring_get_irq()
1660 I915_WRITE_IMR(ring, ~ring->irq_keep_mask); in gen8_logical_ring_put_irq()