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Searched refs:INSTPM (Results 1 – 10 of 10) sorted by relevance

/drivers/video/fbdev/i810/
Di810_regs.h51 #define INSTPM 0x020C0 macro
/drivers/video/fbdev/intelfb/
Dintelfbhw.h104 #define INSTPM 0x20c0 macro
Dintelfbhw.c643 hw->instpm = INREG(INSTPM); in intelfbhw_read_hw_state()
/drivers/gpu/drm/i915/
Dintel_lrc.c924 intel_logical_ring_emit(ringbuf, INSTPM); in intel_execlists_submission()
1547 I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING)); in gen8_init_render_ring()
Dintel_ringbuffer.c812 WA_SET_BIT_MASKED(INSTPM, INSTPM_FORCE_ORDERING); in gen8_init_workarounds()
1203 I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING)); in init_render_ring()
Di915_gem_execbuffer.c1296 intel_ring_emit(ring, INSTPM); in i915_gem_ringbuffer_submission()
Dintel_pm.c314 I915_WRITE(INSTPM, val); in intel_set_memory_cxsr()
315 POSTING_READ(INSTPM); in intel_set_memory_cxsr()
7168 I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_AGPBUSY_INT_EN)); in gen3_init_clock_gating()
Di915_irq.c2522 pr_err(" INSTPM: 0x%08x\n", I915_READ(INSTPM)); in i915_report_and_clear_eir()
Di915_reg.h1772 #define INSTPM 0x020c0 macro
Di915_debugfs.c1740 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN; in i915_sr_status()