Searched refs:IS_G4X (Results 1 – 14 of 14) sorted by relevance
60 if (HAS_FBC(dev) && INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev)) in i915_save_display()98 if (HAS_FBC(dev) && INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev)) in i915_restore_display()
770 if (IS_GEN4(dev_priv) && !IS_G4X(dev_priv) && stride < 2048) in stride_is_valid()794 if (IS_G4X(dev_priv)) in pixel_format_is_valid()816 } else if (IS_G4X(dev_priv) || INTEL_INFO(dev_priv)->gen >= 5) { in intel_fbc_hw_tracking_covers_screen()924 if (INTEL_INFO(dev_priv)->gen <= 4 && !IS_G4X(dev_priv) && in __intel_fbc_update()
199 if (INTEL_INFO(dev)->gen <= 4 && !IS_G33(dev) && !IS_G4X(dev)) { in i915_stolen_to_physical()429 if (IS_G4X(dev)) in i915_gem_init_stolen()
379 if (IS_G4X(dev) && !IS_GM45(dev)) in intel_crt_detect_hotplug()692 if (ret || !IS_G4X(dev)) in intel_crt_get_modes()
820 if (IS_GEN2(dev) || IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) { in i915_get_crtc_scanoutpos()882 if (IS_GEN2(dev) || IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) { in i915_get_crtc_scanoutpos()1556 if (INTEL_INFO(dev)->gen >= 5 || IS_G4X(dev)) in i9xx_pipe_crc_irq_handler()1692 if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) { in i9xx_hpd_irq_handler()2481 if (IS_G4X(dev)) { in i915_report_and_clear_eir()4168 if (IS_G4X(dev)) in i965_irq_postinstall()4183 if (IS_G4X(dev)) { in i965_irq_postinstall()4220 if (IS_G4X(dev)) in i915_hpd_irq_setup()4388 } else if (IS_G4X(dev_priv) || INTEL_INFO(dev_priv)->gen >= 5) { in intel_irq_init()
1157 if ((respect_dvi_limit && !hdmi->has_hdmi_sink) || IS_G4X(dev)) in hdmi_port_clock_limit()2096 } else if (IS_G4X(dev)) { in intel_hdmi_init_connector()2130 if (IS_G4X(dev) && !IS_GM45(dev)) { in intel_hdmi_init_connector()2202 if (IS_G4X(dev)) in intel_hdmi_init()
609 else if (IS_G4X(dev)) { in intel_limit()2770 if (IS_G4X(dev)) in i9xx_update_primary_plane()3249 if (INTEL_INFO(dev)->gen >= 5 || IS_G4X(dev)) in intel_prepare_reset()3276 if (INTEL_INFO(dev)->gen >= 5 || IS_G4X(dev)) { in intel_finish_reset()6688 if ((INTEL_INFO(dev)->gen > 4 || IS_G4X(dev)) && in intel_crtc_compute_config()6977 else if (IS_G4X(dev)) in intel_hpll_vco()7622 if (IS_G4X(dev) && reduced_clock) in i9xx_compute_dpll()7848 if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) { in i9xx_set_pipeconf()8149 if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) { in i9xx_get_pipe_config()10895 if (INTEL_INFO(dev)->gen < 5 && !IS_G4X(dev)) in page_flip_finished()[all …]
580 if (IS_G4X(dev)) { in intel_init_audio()
1736 else if (IS_CRESTLINE(dev) || IS_G4X(dev) || in i915_sr_status()3681 if (!IS_G4X(dev)) in i9xx_pipe_crc_ctl_reg()3687 if (!IS_G4X(dev)) in i9xx_pipe_crc_ctl_reg()3693 if (!IS_G4X(dev)) in i9xx_pipe_crc_ctl_reg()3717 WARN_ON(!IS_G4X(dev)); in i9xx_pipe_crc_ctl_reg()3962 if (IS_G4X(dev)) in pipe_crc_set_source()
1527 else if (IS_G4X(dev)) in intel_get_gpu_reset()
1233 if (IS_G4X(dev)) { in intel_dp_set_clock()6106 if (IS_G4X(dev) && !IS_GM45(dev)) { in intel_dp_init_connector()
2469 #define IS_G4X(dev) (INTEL_INFO(dev)->is_g4x) macro
165 (IS_G4X(dev) || IS_GEN5(dev))) in gen4_render_ring_flush()
298 } else if (IS_G4X(dev) || IS_CRESTLINE(dev)) { in intel_set_memory_cxsr()7290 } else if (IS_G4X(dev)) { in intel_init_pm()