Searched refs:MD0_HDLC (Results 1 – 4 of 4) sorted by relevance
443 case PARITY_CRC16_PR0: md0 = MD0_HDLC | MD0_CRC_16_0; break; in sca_open()444 case PARITY_CRC16_PR1: md0 = MD0_HDLC | MD0_CRC_16; break; in sca_open()445 case PARITY_CRC32_PR1_CCITT: md0 = MD0_HDLC | MD0_CRC_ITU32; break; in sca_open()446 case PARITY_CRC16_PR1_CCITT: md0 = MD0_HDLC | MD0_CRC_ITU; break; in sca_open()447 default: md0 = MD0_HDLC | MD0_CRC_NONE; in sca_open()
479 case PARITY_CRC16_PR0: md0 = MD0_HDLC | MD0_CRC_16_0; break; in sca_open()480 case PARITY_CRC16_PR1: md0 = MD0_HDLC | MD0_CRC_16; break; in sca_open()481 case PARITY_CRC16_PR0_CCITT: md0 = MD0_HDLC | MD0_CRC_ITU_0; break; in sca_open()482 case PARITY_CRC16_PR1_CCITT: md0 = MD0_HDLC | MD0_CRC_ITU; break; in sca_open()483 default: md0 = MD0_HDLC | MD0_CRC_NONE; in sca_open()
194 #define MD0_HDLC 0x80 /* Bit-sync HDLC mode */ macro
289 #define MD0_HDLC 0x80 /* Bit-sync HDLC mode */ macro