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Searched refs:MI_FLUSH (Results 1 – 5 of 5) sorted by relevance

/drivers/video/fbdev/intelfb/
Dintelfbhw.h474 #define MI_FLUSH (0x04 << 23) macro
Dintelfbhw.c1552 OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE); in do_flush()
/drivers/gpu/drm/i915/
Di915_cmd_parser.c147 CMD( MI_FLUSH, SMI, F, 1, S ),
370 CMD( MI_FLUSH, SMI, F, 1, S ),
Dintel_ringbuffer.c102 cmd = MI_FLUSH; in gen2_render_ring_flush()
158 cmd = MI_FLUSH | MI_NO_WRITE_FLUSH; in gen4_render_ring_flush()
1666 intel_ring_emit(ring, MI_FLUSH); in bsd_ring_flush()
1883 intel_ring_emit(ring, MI_FLUSH); in i830_dispatch_execbuffer()
Di915_reg.h270 #define MI_FLUSH MI_INSTR(0x04, 0) macro