| /drivers/media/pci/cobalt/ |
| D | cobalt-driver.h | 136 (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE)
138 (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x100)
140 (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x200)
142 (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x300)
144 (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x400)
146 (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x500)
148 #define COBALT_TX_BASE(cobalt) (cobalt->bar1 + COBALT_VID_BASE + 0x5000)
267 void __iomem *bar0, *bar1; member
321 iowrite32(val, cobalt->bar1 + reg); in cobalt_write_bar1()
326 return ioread32(cobalt->bar1 + reg); in cobalt_read_bar1()
[all …]
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| D | cobalt-i2c.c | 100 (cobalt->bar1 + COBALT_I2C_0_BASE); in cobalt_i2c_regs()
103 (cobalt->bar1 + COBALT_I2C_1_BASE); in cobalt_i2c_regs()
106 (cobalt->bar1 + COBALT_I2C_2_BASE); in cobalt_i2c_regs()
109 (cobalt->bar1 + COBALT_I2C_3_BASE); in cobalt_i2c_regs()
112 (cobalt->bar1 + COBALT_I2C_HSMA_BASE); in cobalt_i2c_regs()
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| D | cobalt-driver.c | 301 if (cobalt->bar1) { in cobalt_pci_iounmap()
302 pci_iounmap(pci_dev, cobalt->bar1); in cobalt_pci_iounmap()
303 cobalt->bar1 = NULL; in cobalt_pci_iounmap()
371 cobalt->bar1 = pci_iomap(pci_dev, 1, 0); in cobalt_setup_pci()
372 if (cobalt->bar1 == NULL) { in cobalt_setup_pci()
373 cobalt->bar1 = pci_iomap(pci_dev, 2, 0); in cobalt_setup_pci()
376 if (!cobalt->bar0 || !cobalt->bar1) { in cobalt_setup_pci()
427 ioread8(cobalt->bar1 + COBALT_HDL_INFO_BASE + i); in cobalt_hdl_info_get()
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| D | cobalt-cpld.c | 29 return cobalt_bus_read32(cobalt->bar1, ADRS(offset)); in cpld_read()
34 return cobalt_bus_write32(cobalt->bar1, ADRS(offset), val); in cpld_write()
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| D | cobalt-flash.c | 103 map->virt = cobalt->bar1; in cobalt_flash_probe()
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| D | cobalt-v4l2.c | 455 void __iomem *adrs = cobalt->bar1 + regs->reg; in cobalt_cobaltc()
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| /drivers/gpu/drm/nouveau/nvkm/subdev/bar/ |
| D | nv50.c | 131 ret = nvkm_gpuobj_new(device, 24, 16, false, bar->mem, &bar->bar1); in nv50_bar_oneinit()
135 nvkm_kmap(bar->bar1); in nv50_bar_oneinit()
136 nvkm_wo32(bar->bar1, 0x00, 0x7fc00000); in nv50_bar_oneinit()
137 nvkm_wo32(bar->bar1, 0x04, lower_32_bits(limit)); in nv50_bar_oneinit()
138 nvkm_wo32(bar->bar1, 0x08, lower_32_bits(start)); in nv50_bar_oneinit()
139 nvkm_wo32(bar->bar1, 0x0c, upper_32_bits(limit) << 24 | in nv50_bar_oneinit()
141 nvkm_wo32(bar->bar1, 0x10, 0x00000000); in nv50_bar_oneinit()
142 nvkm_wo32(bar->bar1, 0x14, 0x00000000); in nv50_bar_oneinit()
143 nvkm_done(bar->bar1); in nv50_bar_oneinit()
165 nvkm_wr32(device, 0x001708, 0x80000000 | bar->bar1->node->offset >> 4); in nv50_bar_init()
[all …]
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| D | nv50.h | 13 struct nvkm_gpuobj *bar1; member
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| /drivers/tty/serial/ |
| D | rp2.c | 199 void __iomem *bar1; member
489 void __iomem *base = card->bar1 + RP2_ASIC_OFFSET(asic_id); in rp2_asic_interrupt()
602 void __iomem *base = card->bar1 + RP2_ASIC_OFFSET(asic_id); in rp2_reset_asic()
681 rp->asic_base = card->bar1; in rp2_load_firmware()
682 rp->base = card->bar1 + RP2_PORT_BASE + j*RP2_PORT_SPACING; in rp2_load_firmware()
683 rp->ucode = card->bar1 + RP2_UCODE_BASE + j*RP2_UCODE_SPACING; in rp2_load_firmware()
746 card->bar1 = bars[1]; in rp2_probe()
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| /drivers/scsi/aacraid/ |
| D | src.c | 534 iounmap(dev->regs.src.bar1); in aac_src_ioremap()
535 dev->regs.src.bar1 = NULL; in aac_src_ioremap()
540 dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2), in aac_src_ioremap()
543 if (dev->regs.src.bar1 == NULL) in aac_src_ioremap()
547 iounmap(dev->regs.src.bar1); in aac_src_ioremap()
548 dev->regs.src.bar1 = NULL; in aac_src_ioremap()
766 dev->dbg_base_mapped = dev->regs.src.bar1; in aac_src_init()
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| D | aacraid.h | 1195 char __iomem *bar1; member
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| /drivers/net/ethernet/cavium/liquidio/ |
| D | cn66xx_device.c | 466 u64 bar1; in lio_cn6xxx_bar1_idx_setup() local
469 bar1 = lio_pci_readq(oct, CN6XXX_BAR1_REG(idx, oct->pcie_port)); in lio_cn6xxx_bar1_idx_setup()
470 lio_pci_writeq(oct, (bar1 & 0xFFFFFFFEULL), in lio_cn6xxx_bar1_idx_setup()
472 bar1 = lio_pci_readq(oct, CN6XXX_BAR1_REG(idx, oct->pcie_port)); in lio_cn6xxx_bar1_idx_setup()
482 bar1 = lio_pci_readq(oct, CN6XXX_BAR1_REG(idx, oct->pcie_port)); in lio_cn6xxx_bar1_idx_setup()
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| /drivers/staging/rdma/ipath/ |
| D | ipath_driver.c | 162 u32 *bar0, u32 *bar1) in read_bars() argument
171 ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, bar1); in read_bars()
176 ipath_dbg("Read bar0 %x bar1 %x\n", *bar0, *bar1); in read_bars()
400 u32 bar0 = 0, bar1 = 0; in ipath_init_one() local
444 read_bars(dd, pdev, &bar0, &bar1); in ipath_init_one()
446 if (!bar1 && !(bar0 & ~0xf)) { in ipath_init_one()
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| /drivers/net/ethernet/intel/ixgb/ |
| D | ixgb_hw.h | 687 u32 bar1; member
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| /drivers/net/ethernet/broadcom/bnxt/ |
| D | bnxt.c | 3338 cpr->cp_doorbell = bp->bar1 + i * 0x80; in bnxt_hwrm_ring_alloc()
3356 txr->tx_doorbell = bp->bar1 + i * 0x80; in bnxt_hwrm_ring_alloc()
3371 rxr->rx_doorbell = bp->bar1 + i * 0x80; in bnxt_hwrm_ring_alloc()
3392 bp->bar1 + (bp->rx_nr_rings + i) * 0x80; in bnxt_hwrm_ring_alloc()
5218 bp->bar1 = pci_ioremap_bar(pdev, 2); in bnxt_init_board()
5219 if (!bp->bar1) { in bnxt_init_board()
5259 if (bp->bar1) { in bnxt_init_board()
5260 pci_iounmap(pdev, bp->bar1); in bnxt_init_board()
5261 bp->bar1 = NULL; in bnxt_init_board()
5598 pci_iounmap(pdev, bp->bar1); in bnxt_remove_one()
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| D | bnxt.h | 850 void __iomem *bar1; member
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| /drivers/net/ethernet/neterion/ |
| D | s2io.h | 868 void __iomem *bar1; member
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| D | s2io.c | 7902 sp->bar1 = pci_ioremap_bar(pdev, 2); in s2io_init_nic()
7903 if (!sp->bar1) { in s2io_init_nic()
7912 mac_control->tx_FIFO_start[j] = sp->bar1 + (j * 0x00020000); in s2io_init_nic()
8180 iounmap(sp->bar1); in s2io_init_nic()
8221 iounmap(sp->bar1); in s2io_rem_nic()
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