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Searched refs:byte_offset (Results 1 – 18 of 18) sorted by relevance

/drivers/net/ethernet/intel/ixgbe/
Dixgbe_phy.h181 s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,
183 s32 ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
185 s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,
187 s32 ixgbe_write_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
189 s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
191 s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset,
193 s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
Dixgbe_phy.c1693 s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_eeprom_generic() argument
1696 return hw->phy.ops.read_i2c_byte(hw, byte_offset, in ixgbe_read_i2c_eeprom_generic()
1709 s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_sff8472_generic() argument
1712 return hw->phy.ops.read_i2c_byte(hw, byte_offset, in ixgbe_read_i2c_sff8472_generic()
1725 s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_eeprom_generic() argument
1728 return hw->phy.ops.write_i2c_byte(hw, byte_offset, in ixgbe_write_i2c_eeprom_generic()
1758 static s32 ixgbe_read_i2c_byte_generic_int(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_generic_int() argument
1769 if (ixgbe_is_sfp_probe(hw, byte_offset, dev_addr)) in ixgbe_read_i2c_byte_generic_int()
1789 status = ixgbe_clock_out_i2c_byte(hw, byte_offset); in ixgbe_read_i2c_byte_generic_int()
1847 s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_generic() argument
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Dixgbe_82598.c46 static s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
998 u8 byte_offset, u8 *eeprom_data) in ixgbe_read_i2c_phy_82598() argument
1021 sfp_addr = (dev_addr << 8) + byte_offset; in ixgbe_read_i2c_phy_82598()
1068 static s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_eeprom_82598() argument
1072 byte_offset, eeprom_data); in ixgbe_read_i2c_eeprom_82598()
1083 static s32 ixgbe_read_i2c_sff8472_82598(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_sff8472_82598() argument
1087 byte_offset, sff8472_data); in ixgbe_read_i2c_sff8472_82598()
Dixgbe_82599.c62 static s32 ixgbe_read_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,
64 static s32 ixgbe_write_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,
2082 static s32 ixgbe_read_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_82599() argument
2112 status = ixgbe_read_i2c_byte_generic(hw, byte_offset, dev_addr, data); in ixgbe_read_i2c_byte_82599()
2135 static s32 ixgbe_write_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_byte_82599() argument
2165 status = ixgbe_write_i2c_byte_generic(hw, byte_offset, dev_addr, data); in ixgbe_write_i2c_byte_82599()
/drivers/net/ethernet/intel/igb/
De1000_82575.h31 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset, u8 dev_addr,
33 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset, u8 dev_addr,
Digb_main.c8020 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset, in igb_read_i2c_byte() argument
8036 status = i2c_smbus_read_byte_data(this_client, byte_offset); in igb_read_i2c_byte()
8057 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset, in igb_write_i2c_byte() argument
8070 status = i2c_smbus_write_byte_data(this_client, byte_offset, data); in igb_write_i2c_byte()
/drivers/gpu/drm/udl/
Dudl_transfer.c223 u32 byte_offset, u32 device_byte_offset, in udl_render_hline() argument
235 line_start = (u8 *) (front + byte_offset); in udl_render_hline()
Dudl_drv.h115 u32 byte_offset, u32 device_byte_offset, u32 byte_width,
Dudl_fb.c225 const int byte_offset = line_offset + (x * bpp); in udl_handle_damage() local
229 &cmd, byte_offset, dev_byte_offset, in udl_handle_damage()
/drivers/input/touchscreen/
Datmel_mxt_ts.c1189 unsigned int type, instance, size, byte_offset; in mxt_prepare_cfg_mem() local
1268 byte_offset = reg + i - cfg_start_ofs; in mxt_prepare_cfg_mem()
1270 if (byte_offset >= 0 && byte_offset < config_mem_size) { in mxt_prepare_cfg_mem()
1271 *(config_mem + byte_offset) = val; in mxt_prepare_cfg_mem()
1274 reg, object->type, byte_offset); in mxt_prepare_cfg_mem()
1286 unsigned int byte_offset = 0; in mxt_upload_cfg_mem() local
1290 while (byte_offset < config_mem_size) { in mxt_upload_cfg_mem()
1291 unsigned int size = config_mem_size - byte_offset; in mxt_upload_cfg_mem()
1297 cfg_start + byte_offset, in mxt_upload_cfg_mem()
1298 size, config_mem + byte_offset); in mxt_upload_cfg_mem()
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/drivers/net/ethernet/
Dlantiq_etop.c527 u32 byte_offset; in ltq_etop_tx() local
539 byte_offset = CPHYSADDR(skb->data) % 16; in ltq_etop_tx()
546 DMA_TO_DEVICE)) - byte_offset; in ltq_etop_tx()
549 LTQ_DMA_TX_OFFSET(byte_offset) | (len & LTQ_DMA_SIZE_MASK); in ltq_etop_tx()
/drivers/video/fbdev/
Dudlfb.c520 u32 byte_offset, u32 byte_width, in dlfb_render_hline() argument
524 u32 dev_addr = dev->base16 + byte_offset; in dlfb_render_hline()
529 line_start = (u8 *) (front + byte_offset); in dlfb_render_hline()
536 + byte_offset); in dlfb_render_hline()
608 const int byte_offset = line_offset + (x * BPP); in dlfb_handle_damage() local
612 &cmd, byte_offset, width * BPP, in dlfb_handle_damage()
Dsmscufx.c846 const int byte_offset = line_offset + (x * BPP); in ufx_raw_rect() local
848 (char *)dev->info->fix.smem_start + byte_offset, width * BPP); in ufx_raw_rect()
/drivers/crypto/amcc/
Dcrypto4xx_sa.h155 u32 byte_offset:1; member
/drivers/hv/
Dchannel.c260 gpadl_header->range[0].byte_offset = 0; in create_gpadl_header()
342 gpadl_header->range[0].byte_offset = 0; in create_gpadl_header()
/drivers/mtd/onenand/
Donenand_base.c818 int byte_offset; in onenand_write_bufferram() local
824 byte_offset = offset + count; in onenand_write_bufferram()
827 word = this->read_word(bufferram + byte_offset); in onenand_write_bufferram()
829 this->write_word(word, bufferram + byte_offset); in onenand_write_bufferram()
/drivers/gpu/drm/radeon/
Dradeon_state.c1710 u32 offset, byte_offset; in radeon_cp_dispatch_texture() local
1895 byte_offset = (image->y & ~2047) * blit_width; in radeon_cp_dispatch_texture()
1910 OUT_RING((texpitch << 22) | ((tex->offset >> 10) + (byte_offset >> 10))); in radeon_cp_dispatch_texture()
/drivers/net/hyperv/
Dnetvsc.c1053 recv_buf + vmxferpage_packet->ranges[i].byte_offset); in netvsc_receive()