| /drivers/sh/intc/ |
| D | handle.c | 19 intc_enum enum_id) in intc_grp_id() argument
24 for (i = 0; g && enum_id && i < desc->hw.nr_groups; i++) { in intc_grp_id()
28 if (g->enum_ids[j] != enum_id) in intc_grp_id()
31 return g->enum_id; in intc_grp_id()
40 intc_enum enum_id, in _intc_mask_data() argument
48 while (mr && enum_id && *reg_idx < desc->hw.nr_mask_regs) { in _intc_mask_data()
52 if (mr->enum_ids[*fld_idx] != enum_id) in _intc_mask_data()
90 intc_enum enum_id, int do_grps) in intc_get_mask_handle() argument
96 ret = _intc_mask_data(desc, d, enum_id, &i, &j); in intc_get_mask_handle()
101 return intc_get_mask_handle(desc, d, intc_grp_id(desc, enum_id), 0); in intc_get_mask_handle()
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| D | core.c | 75 intc_enum enum_id, in intc_register_irq() argument
84 radix_tree_insert(&d->tree, enum_id, intc_irq_xlate_get(irq)); in intc_register_irq()
95 data[0] = intc_get_mask_handle(desc, d, enum_id, 0); in intc_register_irq()
96 data[1] = intc_get_prio_handle(desc, d, enum_id, 0); in intc_register_irq()
106 data[0] = data[0] ? data[0] : intc_get_mask_handle(desc, d, enum_id, 1); in intc_register_irq()
107 data[1] = data[1] ? data[1] : intc_get_prio_handle(desc, d, enum_id, 1); in intc_register_irq()
148 data[0] = intc_get_sense_handle(desc, d, enum_id); in intc_register_irq()
158 intc_set_ack_handle(irq, desc, d, enum_id); in intc_register_irq()
159 intc_set_dist_handle(irq, desc, d, enum_id); in intc_register_irq()
316 if (!vect->enum_id) in register_intc_controller()
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| D | virq.c | 40 intc_irq_xlate[irq].enum_id = id; in intc_irq_xlate_set()
50 int intc_irq_lookup(const char *chipname, intc_enum enum_id) in intc_irq_lookup() argument
68 tagged = radix_tree_tag_get(&d->tree, enum_id, in intc_irq_lookup()
73 ptr = radix_tree_lookup(&d->tree, enum_id); in intc_irq_lookup()
178 entry->enum_id = subgroup->enum_ids[i]; in intc_subgroup_init_one()
181 err = radix_tree_insert(&d->tree, entry->enum_id, entry); in intc_subgroup_init_one()
185 radix_tree_tag_set(&d->tree, entry->enum_id, in intc_subgroup_init_one()
238 intc_irq_xlate_set(irq, entry->enum_id, d); in intc_subgroup_map()
255 radix_tree_tag_clear(&d->tree, entry->enum_id, in intc_subgroup_map()
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| D | internals.h | 43 intc_enum enum_id; member
49 intc_enum enum_id; member
171 intc_enum enum_id, int do_grps);
174 intc_enum enum_id, int do_grps);
177 intc_enum enum_id);
182 intc_enum enum_id, int enable);
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| D | balancing.c | 42 intc_enum enum_id) in intc_dist_data() argument
48 for (i = 0; mr && enum_id && i < desc->hw.nr_mask_regs; i++) { in intc_dist_data()
59 if (mr->enum_ids[j] != enum_id) in intc_dist_data()
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| D | virq-debugfs.c | 33 seq_printf(m, "0x%05x ", entry->enum_id); in intc_irq_xlate_debug()
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| /drivers/pinctrl/sh-pfc/ |
| D | core.c | 132 static int sh_pfc_enum_in_range(u16 enum_id, const struct pinmux_range *r) in sh_pfc_enum_in_range() argument
134 if (enum_id < r->begin) in sh_pfc_enum_in_range()
137 if (enum_id > r->end) in sh_pfc_enum_in_range()
226 static int sh_pfc_get_config_reg(struct sh_pfc *pfc, u16 enum_id, in sh_pfc_get_config_reg() argument
256 if (config_reg->enum_ids[pos + n] == enum_id) { in sh_pfc_get_config_reg()
322 u16 enum_id; in sh_pfc_config_mux() local
327 pos = sh_pfc_mark_to_enum(pfc, mark, pos, &enum_id); in sh_pfc_config_mux()
331 if (!enum_id) in sh_pfc_config_mux()
338 in_range = sh_pfc_enum_in_range(enum_id, &pfc->info->function); in sh_pfc_config_mux()
349 in_range = sh_pfc_enum_in_range(enum_id, range); in sh_pfc_config_mux()
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| D | sh_pfc.h | 35 u16 enum_id; member
92 u16 enum_id; member
254 .enum_id = _name##_DATA, \
292 .enum_id = _pin##_DATA, \
300 .enum_id = PORT##_pin##_DATA, \
324 .enum_id = data_or_mark, \
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| D | gpio.c | 91 if (dreg->enum_ids[bit] == pin->enum_id) { in gpio_setup_data_reg()
125 if (pfc->info->pins[i].enum_id == 0) in gpio_setup_data_regs()
143 if (idx < 0 || pfc->info->pins[idx].enum_id == 0) in gpio_pin_request()
266 unsigned int mark = pfc->info->func_gpios[offset].enum_id; in gpio_function_request()
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| D | pinctrl.c | 401 ret = sh_pfc_config_mux(pfc, pin->enum_id, PINMUX_TYPE_GPIO); in sh_pfc_gpio_request_enable()
456 ret = sh_pfc_config_mux(pfc, pin->enum_id, new_type); in sh_pfc_gpio_set_direction()
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_atombios.c | 400 int enum_id; in amdgpu_atombios_get_connector_info_from_object_table() local
403 for (enum_id = 0; enum_id < (*num_dst_objs); enum_id++) { in amdgpu_atombios_get_connector_info_from_object_table()
405 le16_to_cpu(dst_objs[enum_id])) in amdgpu_atombios_get_connector_info_from_object_table()
432 router.ddc_mux_state = ddc_path->ucMuxState[enum_id]; in amdgpu_atombios_get_connector_info_from_object_table()
440 router.cd_mux_state = cd_path->ucMuxState[enum_id]; in amdgpu_atombios_get_connector_info_from_object_table()
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| /drivers/gpu/drm/radeon/ |
| D | radeon_atombios.c | 708 int enum_id; in radeon_get_atom_connector_info_from_object_table() local
711 for (enum_id = 0; enum_id < (*num_dst_objs); enum_id++) { in radeon_get_atom_connector_info_from_object_table()
713 le16_to_cpu(dst_objs[enum_id])) in radeon_get_atom_connector_info_from_object_table()
740 router.ddc_mux_state = ddc_path->ucMuxState[enum_id]; in radeon_get_atom_connector_info_from_object_table()
748 router.cd_mux_state = cd_path->ucMuxState[enum_id]; in radeon_get_atom_connector_info_from_object_table()
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