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Searched refs:gpu (Results 1 – 25 of 34) sorted by relevance

12

/drivers/gpu/drm/msm/
Dmsm_gpu.c29 static void bs_init(struct msm_gpu *gpu) in bs_init() argument
31 if (gpu->bus_scale_table) { in bs_init()
32 gpu->bsc = msm_bus_scale_register_client(gpu->bus_scale_table); in bs_init()
33 DBG("bus scale client: %08x", gpu->bsc); in bs_init()
37 static void bs_fini(struct msm_gpu *gpu) in bs_fini() argument
39 if (gpu->bsc) { in bs_fini()
40 msm_bus_scale_unregister_client(gpu->bsc); in bs_fini()
41 gpu->bsc = 0; in bs_fini()
45 static void bs_set(struct msm_gpu *gpu, int idx) in bs_set() argument
47 if (gpu->bsc) { in bs_set()
[all …]
Dmsm_gpu.h45 int (*get_param)(struct msm_gpu *gpu, uint32_t param, uint64_t *value);
46 int (*hw_init)(struct msm_gpu *gpu);
47 int (*pm_suspend)(struct msm_gpu *gpu);
48 int (*pm_resume)(struct msm_gpu *gpu);
49 int (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit,
51 void (*flush)(struct msm_gpu *gpu);
52 void (*idle)(struct msm_gpu *gpu);
54 uint32_t (*last_fence)(struct msm_gpu *gpu);
55 void (*recover)(struct msm_gpu *gpu);
56 void (*destroy)(struct msm_gpu *gpu);
[all …]
Dmsm_drv.c184 struct msm_gpu *gpu = priv->gpu; in msm_unload() local
214 if (gpu) { in msm_unload()
216 gpu->funcs->pm_suspend(gpu); in msm_unload()
218 gpu->funcs->destroy(gpu); in msm_unload()
449 if (!priv->gpu) in load_gpu()
450 priv->gpu = adreno_load_gpu(dev); in load_gpu()
558 struct msm_gpu *gpu = priv->gpu; in msm_gpu_show() local
560 if (gpu) { in msm_gpu_show()
561 seq_printf(m, "%s Status:\n", gpu->name); in msm_gpu_show()
562 gpu->funcs->show(gpu, m); in msm_gpu_show()
[all …]
Dmsm_perf.c72 struct msm_gpu *gpu = priv->gpu; in refill_buf() local
83 for (i = 0; i < gpu->num_perfcntrs; i++) { in refill_buf()
84 const struct msm_gpu_perfcntr *perfcntr = &gpu->perfcntrs[i]; in refill_buf()
101 ret = msm_gpu_perfcntr_sample(gpu, &activetime, &totaltime, in refill_buf()
165 struct msm_gpu *gpu = priv->gpu; in perf_open() local
170 if (perf->open || !gpu) { in perf_open()
180 msm_gpu_perfcntr_start(gpu); in perf_open()
192 msm_gpu_perfcntr_stop(priv->gpu); in perf_release()
Dmsm_ringbuffer.c21 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int size) in msm_ringbuffer_new() argument
35 ring->gpu = gpu; in msm_ringbuffer_new()
36 ring->bo = msm_gem_new(gpu->dev, size, MSM_BO_WC); in msm_ringbuffer_new()
Dmsm_gem_submit.c32 struct msm_gpu *gpu, uint32_t nr) in submit_create() argument
43 submit->gpu = gpu; in submit_create()
143 msm_gem_put_iova(&msm_obj->base, submit->gpu->id); in submit_unlock_unpin_bo()
182 submit->gpu->id, &iova); in submit_validate_objects()
342 struct msm_gpu *gpu; in msm_ioctl_gem_submit() local
352 gpu = priv->gpu; in msm_ioctl_gem_submit()
359 submit = submit_create(dev, gpu, args->nr_bos); in msm_ioctl_gem_submit()
433 ret = msm_gpu_submit(gpu, submit, ctx); in msm_ioctl_gem_submit()
Dmsm_gem.h41 struct msm_gpu *gpu; /* non-null if active */ member
73 return msm_obj->gpu != NULL; in is_active()
98 struct msm_gpu *gpu; member
Dmsm_rd.c166 struct msm_gpu *gpu = priv->gpu; in rd_open() local
173 if (rd->open || !gpu) { in rd_open()
184 gpu->funcs->get_param(gpu, MSM_PARAM_GPU_ID, &val); in rd_open()
Dmsm_ringbuffer.h24 struct msm_gpu *gpu; member
30 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int size);
DMakefile1 ccflags-y := -Iinclude/drm -Idrivers/gpu/drm/msm
2 ccflags-$(CONFIG_DRM_MSM_DSI) += -Idrivers/gpu/drm/msm/dsi
Dmsm_gem.c432 struct msm_gpu *gpu, bool write, uint32_t fence) in msm_gem_move_to_active() argument
435 msm_obj->gpu = gpu; in msm_gem_move_to_active()
441 list_add_tail(&msm_obj->mm_list, &gpu->active_list); in msm_gem_move_to_active()
452 msm_obj->gpu = NULL; in msm_gem_move_to_inactive()
DNOTES14 And on gpu side of things:
23 up gpu cmdstream to update scanout and write FLUSH register after).
27 And one or more 'struct msm_gpu' for the various different gpu sub-
Dmsm_mmu.h46 struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu);
/drivers/gpu/drm/msm/adreno/
Da3xx_gpu.c42 static void a3xx_dump(struct msm_gpu *gpu);
44 static void a3xx_me_init(struct msm_gpu *gpu) in a3xx_me_init() argument
46 struct msm_ringbuffer *ring = gpu->rb; in a3xx_me_init()
67 gpu->funcs->flush(gpu); in a3xx_me_init()
68 gpu->funcs->idle(gpu); in a3xx_me_init()
71 static int a3xx_hw_init(struct msm_gpu *gpu) in a3xx_hw_init() argument
73 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in a3xx_hw_init()
78 DBG("%s", gpu->name); in a3xx_hw_init()
82 gpu_write(gpu, REG_A3XX_VBIF_IN_RD_LIM_CONF0, 0x10101010); in a3xx_hw_init()
83 gpu_write(gpu, REG_A3XX_VBIF_IN_RD_LIM_CONF1, 0x10101010); in a3xx_hw_init()
[all …]
Da4xx_gpu.c33 static void a4xx_dump(struct msm_gpu *gpu);
39 static void a4xx_enable_hwcg(struct msm_gpu *gpu) in a4xx_enable_hwcg() argument
41 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in a4xx_enable_hwcg()
44 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_CTL_TP(i), 0x02222202); in a4xx_enable_hwcg()
46 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_CTL2_TP(i), 0x00002222); in a4xx_enable_hwcg()
48 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_HYST_TP(i), 0x0E739CE7); in a4xx_enable_hwcg()
50 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_DELAY_TP(i), 0x00111111); in a4xx_enable_hwcg()
52 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_CTL_SP(i), 0x22222222); in a4xx_enable_hwcg()
54 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_CTL2_SP(i), 0x00222222); in a4xx_enable_hwcg()
56 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_HYST_SP(i), 0x00000104); in a4xx_enable_hwcg()
[all …]
Dadreno_gpu.c27 int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value) in adreno_get_param() argument
29 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in adreno_get_param()
45 DBG("%s: invalid param: %u", gpu->name, param); in adreno_get_param()
53 int adreno_hw_init(struct msm_gpu *gpu) in adreno_hw_init() argument
55 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in adreno_hw_init()
58 DBG("%s", gpu->name); in adreno_hw_init()
60 ret = msm_gem_get_iova(gpu->rb->bo, gpu->id, &gpu->rb_iova); in adreno_hw_init()
62 gpu->rb_iova = 0; in adreno_hw_init()
63 dev_err(gpu->dev->dev, "could not map ringbuffer: %d\n", ret); in adreno_hw_init()
70 AXXX_CP_RB_CNTL_BUFSZ(ilog2(gpu->rb->size / 8)) | in adreno_hw_init()
[all …]
Dadreno_gpu.h190 static inline bool adreno_is_a3xx(struct adreno_gpu *gpu) in adreno_is_a3xx() argument
192 return (gpu->revn >= 300) && (gpu->revn < 400); in adreno_is_a3xx()
195 static inline bool adreno_is_a305(struct adreno_gpu *gpu) in adreno_is_a305() argument
197 return gpu->revn == 305; in adreno_is_a305()
200 static inline bool adreno_is_a306(struct adreno_gpu *gpu) in adreno_is_a306() argument
203 return gpu->revn == 307; in adreno_is_a306()
206 static inline bool adreno_is_a320(struct adreno_gpu *gpu) in adreno_is_a320() argument
208 return gpu->revn == 320; in adreno_is_a320()
211 static inline bool adreno_is_a330(struct adreno_gpu *gpu) in adreno_is_a330() argument
213 return gpu->revn == 330; in adreno_is_a330()
[all …]
Dadreno_device.c115 struct msm_gpu *gpu = NULL; in adreno_load_gpu() local
135 gpu = info->init(dev); in adreno_load_gpu()
136 if (IS_ERR(gpu)) { in adreno_load_gpu()
138 gpu = NULL; in adreno_load_gpu()
142 if (gpu) { in adreno_load_gpu()
145 gpu->funcs->pm_resume(gpu); in adreno_load_gpu()
147 ret = gpu->funcs->hw_init(gpu); in adreno_load_gpu()
150 gpu->funcs->destroy(gpu); in adreno_load_gpu()
151 gpu = NULL; in adreno_load_gpu()
154 msm_gpu_retire(gpu); in adreno_load_gpu()
[all …]
/drivers/gpu/drm/
DKconfig100 source "drivers/gpu/drm/i2c/Kconfig"
140 source "drivers/gpu/drm/radeon/Kconfig"
162 source "drivers/gpu/drm/amd/amdgpu/Kconfig"
164 source "drivers/gpu/drm/nouveau/Kconfig"
175 source "drivers/gpu/drm/i915/Kconfig"
218 source "drivers/gpu/drm/exynos/Kconfig"
220 source "drivers/gpu/drm/rockchip/Kconfig"
222 source "drivers/gpu/drm/vmwgfx/Kconfig"
224 source "drivers/gpu/drm/gma500/Kconfig"
226 source "drivers/gpu/drm/udl/Kconfig"
[all …]
/drivers/gpu/drm/amd/amdkfd/
Dkfd_topology.c51 device = top_dev->gpu; in kfd_device_by_id()
68 if (top_dev->gpu->pdev == pdev) { in kfd_device_by_pci_dev()
69 device = top_dev->gpu; in kfd_device_by_pci_dev()
721 if (dev->gpu) { in node_show()
723 __ilog2_u32(dev->gpu->device_info->num_of_watch_points); in node_show()
736 dev->gpu->kfd2kgd->get_max_engine_clock_in_mhz( in node_show()
737 dev->gpu->kgd)); in node_show()
743 dev->gpu->kfd2kgd->get_fw_version( in node_show()
744 dev->gpu->kgd, in node_show()
1102 pr_info("\tGPU assigned: %s\n", (dev->gpu ? "yes" : "no")); in kfd_debug_print_topology()
[all …]
DMakefile5 ccflags-y := -Iinclude/drm -Idrivers/gpu/drm/amd/include/ \
6 -Idrivers/gpu/drm/amd/include/asic_reg
/drivers/video/
DKconfig20 source "drivers/gpu/vga/Kconfig"
22 source "drivers/gpu/host1x/Kconfig"
23 source "drivers/gpu/ipu-v3/Kconfig"
25 source "drivers/gpu/drm/Kconfig"
/drivers/gpu/drm/amd/amdgpu/
DMakefile5 ccflags-y := -Iinclude/drm -Idrivers/gpu/drm/amd/include/asic_reg \
6 -Idrivers/gpu/drm/amd/include \
7 -Idrivers/gpu/drm/amd/amdgpu \
8 -Idrivers/gpu/drm/amd/scheduler
/drivers/gpu/drm/virtio/
DMakefile7 virtio-gpu-y := virtgpu_drv.o virtgpu_kms.o virtgpu_drm_bus.o virtgpu_gem.o \
12 obj-$(CONFIG_DRM_VIRTIO_GPU) += virtio-gpu.o
/drivers/video/fbdev/vermilion/
Dvermilion.c285 par->gpu = pci_get_device(PCI_VENDOR_ID_INTEL, VML_DEVICE_GPU, NULL); in vmlfb_get_gpu()
287 if (!par->gpu) { in vmlfb_get_gpu()
294 if (pci_enable_device(par->gpu) < 0) in vmlfb_get_gpu()
342 par->gpu_mem_base = pci_resource_start(par->gpu, 0); in vmlfb_enable_mmio()
343 par->gpu_mem_size = pci_resource_len(par->gpu, 0); in vmlfb_enable_mmio()
386 pci_disable_device(par->gpu); in vmlfb_release_devices()

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