Searched refs:gpu_read (Results 1 – 6 of 6) sorted by relevance
/drivers/gpu/drm/msm/adreno/ |
D | a4xx_gpu.c | 201 val = gpu_read(gpu, REG_A4XX_RBBM_CLOCK_DELAY_HLSQ); in a4xx_hw_init() 278 gpu_read(gpu, REG_A4XX_RBBM_SW_RESET_CMD); in a4xx_recover() 306 if (spin_until(!(gpu_read(gpu, REG_A4XX_RBBM_STATUS) & in a4xx_idle() 317 status = gpu_read(gpu, REG_A4XX_RBBM_INT_0_STATUS); in a4xx_irq() 415 gpu_read(gpu, REG_A4XX_RBBM_STATUS)); in a4xx_show() 511 gpu_read(gpu, REG_A4XX_RBBM_STATUS)); in a4xx_dump()
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D | a3xx_gpu.c | 311 gpu_read(gpu, REG_A3XX_RBBM_SW_RESET_CMD); in a3xx_recover() 339 if (spin_until(!(gpu_read(gpu, REG_A3XX_RBBM_STATUS) & in a3xx_idle() 350 status = gpu_read(gpu, REG_A3XX_RBBM_INT_0_STATUS); in a3xx_irq() 405 gpu_read(gpu, REG_A3XX_RBBM_STATUS)); in a3xx_show() 415 gpu_read(gpu, REG_A3XX_RBBM_STATUS)); in a3xx_dump()
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D | adreno_gpu.c | 261 uint32_t val = gpu_read(gpu, addr); in adreno_show() 294 gpu_read(gpu, REG_AXXX_CP_SCRATCH_REG0 + i)); in adreno_dump_info() 312 uint32_t val = gpu_read(gpu, addr); in adreno_dump()
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D | adreno_gpu.h | 296 val = gpu_read(&gpu->base, reg - 1); in adreno_gpu_read()
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/drivers/gpu/drm/msm/ |
D | msm_gpu.h | 149 static inline u32 gpu_read(struct msm_gpu *gpu, u32 reg) in gpu_read() function
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D | msm_gpu.c | 347 current_cntrs[i] = gpu_read(gpu, gpu->perfcntrs[i].sample_reg); in update_hw_cntrs()
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