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Searched refs:octeon_write_csr64 (Results 1 – 3 of 3) sorted by relevance

/drivers/net/ethernet/cavium/liquidio/
Dcn66xx_device.c45 octeon_write_csr64(oct, CN6XXX_WIN_WR_MASK_REG, 0xFF); in lio_cn6xxx_soft_reset()
50 octeon_write_csr64(oct, CN6XXX_SLI_SCRATCH1, 0x1234ULL); in lio_cn6xxx_soft_reset()
67 octeon_write_csr64(oct, CN6XXX_WIN_WR_MASK_REG, 0xFF); in lio_cn6xxx_soft_reset()
131 octeon_write_csr64(oct, CN6XXX_SLI_S2M_PORTX_CTL(oct->pcie_port), r64); in lio_cn6xxx_setup_pcie_mrrs()
179 octeon_write_csr64(oct, CN6XXX_SLI_PKT_INSTR_RD_SIZE, in lio_cn6xxx_setup_global_input_regs()
183 octeon_write_csr64(oct, CN6XXX_SLI_IN_PCIE_PORT, in lio_cn6xxx_setup_global_input_regs()
207 octeon_write_csr64(oct, CN6XXX_SLI_PKT_CTL, pktctl); in lio_cn66xx_setup_pkt_ctl_regs()
216 octeon_write_csr64(oct, CN6XXX_SLI_PKT_PCIE_PORT64, in lio_cn6xxx_setup_global_output_regs()
220 octeon_write_csr64(oct, CN6XXX_SLI_OQ_WMARK, 32); in lio_cn6xxx_setup_global_output_regs()
223 octeon_write_csr64(oct, CN6XXX_SLI_OQ_WMARK, 0); in lio_cn6xxx_setup_global_output_regs()
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Dcn68xx_device.c94 octeon_write_csr64(oct, CN68XX_SLI_TX_PIPE, tx_pipe); in lio_cn68xx_setup_pkt_ctl_regs()
101 octeon_write_csr64(oct, CN6XXX_SLI_PKT_CTL, pktctl); in lio_cn68xx_setup_pkt_ctl_regs()
117 octeon_write_csr64(oct, CN6XXX_SLI_WINDOW_CTL, 0x200000ULL); in lio_cn68xx_setup_device_regs()
Docteon_device.h510 #define octeon_write_csr64(oct_dev, reg_off, val64) \ macro