| /drivers/usb/renesas_usbhs/ |
| D | pipe.c | 42 char *usbhs_pipe_name(struct usbhs_pipe *pipe) in usbhs_pipe_name() argument
44 return usbhsp_pipe_name[usbhs_pipe_type(pipe)]; in usbhs_pipe_name()
50 static void usbhsp_pipectrl_set(struct usbhs_pipe *pipe, u16 mask, u16 val) in usbhsp_pipectrl_set() argument
52 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); in usbhsp_pipectrl_set()
53 int offset = usbhsp_addr_offset(pipe); in usbhsp_pipectrl_set()
55 if (usbhs_pipe_is_dcp(pipe)) in usbhsp_pipectrl_set()
61 static u16 usbhsp_pipectrl_get(struct usbhs_pipe *pipe) in usbhsp_pipectrl_get() argument
63 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); in usbhsp_pipectrl_get()
64 int offset = usbhsp_addr_offset(pipe); in usbhsp_pipectrl_get()
66 if (usbhs_pipe_is_dcp(pipe)) in usbhsp_pipectrl_get()
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| D | fifo.c | 26 #define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */
41 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); in usbhsf_null_handle()
54 void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, in usbhs_pkt_push() argument
59 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); in usbhs_pkt_push()
71 if (!pipe->handler) { in usbhs_pkt_push()
73 pipe->handler = &usbhsf_null_handler; in usbhs_pkt_push()
76 list_move_tail(&pkt->node, &pipe->list); in usbhs_pkt_push()
83 pkt->pipe = pipe; in usbhs_pkt_push()
85 pkt->handler = pipe->handler; in usbhs_pkt_push()
101 struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe) in __usbhsf_pkt_get() argument
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| D | pipe.h | 47 struct usbhs_pipe *pipe; member
59 ((i) < (info)->size) && ((pos) = (info)->pipe + (i)); \
76 char *usbhs_pipe_name(struct usbhs_pipe *pipe);
79 void usbhs_pipe_free(struct usbhs_pipe *pipe);
82 int usbhs_pipe_is_dir_in(struct usbhs_pipe *pipe);
83 int usbhs_pipe_is_dir_host(struct usbhs_pipe *pipe);
84 int usbhs_pipe_is_running(struct usbhs_pipe *pipe);
85 void usbhs_pipe_running(struct usbhs_pipe *pipe, int running);
89 int usbhs_pipe_get_maxpacket(struct usbhs_pipe *pipe);
90 void usbhs_pipe_clear(struct usbhs_pipe *pipe);
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| D | mod_gadget.c | 39 struct usbhs_pipe *pipe; member
107 #define usbhsg_uep_to_pipe(u) ((u)->pipe)
131 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); in __usbhsg_queue_pop() local
135 if (pipe) in __usbhsg_queue_pop()
136 dev_dbg(dev, "pipe %d : queue pop\n", usbhs_pipe_number(pipe)); in __usbhsg_queue_pop()
159 struct usbhs_pipe *pipe = pkt->pipe; in usbhsg_queue_done() local
160 struct usbhsg_uep *uep = usbhsg_pipe_to_uep(pipe); in usbhsg_queue_done()
177 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); in usbhsg_queue_push() local
183 usbhs_pkt_push(pipe, pkt, usbhsg_queue_done, in usbhsg_queue_push()
185 usbhs_pkt_start(pipe); in usbhsg_queue_push()
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| /drivers/gpu/drm/gma500/ |
| D | mdfld_dsi_output.h | 75 #define CHECK_PIPE(pipe) ({ \ argument
76 const typeof(pipe) __pipe = (pipe); \
80 #define CHECK_PIPE(pipe) (pipe) argument
86 #define REG_OFFSET(pipe) (CHECK_PIPE(pipe) * 0x400) argument
89 #define MIPI_DEVICE_READY_REG(pipe) (0xb000 + REG_OFFSET(pipe)) argument
90 #define MIPI_INTR_STAT_REG(pipe) (0xb004 + REG_OFFSET(pipe)) argument
91 #define MIPI_INTR_EN_REG(pipe) (0xb008 + REG_OFFSET(pipe)) argument
92 #define MIPI_DSI_FUNC_PRG_REG(pipe) (0xb00c + REG_OFFSET(pipe)) argument
93 #define MIPI_HS_TX_TIMEOUT_REG(pipe) (0xb010 + REG_OFFSET(pipe)) argument
94 #define MIPI_LP_RX_TIMEOUT_REG(pipe) (0xb014 + REG_OFFSET(pipe)) argument
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| D | mdfld_dsi_dpi.c | 35 int pipe);
37 static void mdfld_wait_for_HS_DATA_FIFO(struct drm_device *dev, u32 pipe) in mdfld_wait_for_HS_DATA_FIFO() argument
39 u32 gen_fifo_stat_reg = MIPI_GEN_FIFO_STAT_REG(pipe); in mdfld_wait_for_HS_DATA_FIFO()
55 static void mdfld_wait_for_HS_CTRL_FIFO(struct drm_device *dev, u32 pipe) in mdfld_wait_for_HS_CTRL_FIFO() argument
57 u32 gen_fifo_stat_reg = MIPI_GEN_FIFO_STAT_REG(pipe); in mdfld_wait_for_HS_CTRL_FIFO()
72 static void mdfld_wait_for_DPI_CTRL_FIFO(struct drm_device *dev, u32 pipe) in mdfld_wait_for_DPI_CTRL_FIFO() argument
74 u32 gen_fifo_stat_reg = MIPI_GEN_FIFO_STAT_REG(pipe); in mdfld_wait_for_DPI_CTRL_FIFO()
90 static void mdfld_wait_for_SPL_PKG_SENT(struct drm_device *dev, u32 pipe) in mdfld_wait_for_SPL_PKG_SENT() argument
92 u32 intr_stat_reg = MIPI_INTR_STAT_REG(pipe); in mdfld_wait_for_SPL_PKG_SENT()
111 int pipe) in dsi_set_device_ready_state() argument
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| D | psb_irq.c | 38 psb_pipestat(int pipe) in psb_pipestat() argument
40 if (pipe == 0) in psb_pipestat()
42 if (pipe == 1) in psb_pipestat()
44 if (pipe == 2) in psb_pipestat()
50 mid_pipe_event(int pipe) in mid_pipe_event() argument
52 if (pipe == 0) in mid_pipe_event()
54 if (pipe == 1) in mid_pipe_event()
56 if (pipe == 2) in mid_pipe_event()
62 mid_pipe_vsync(int pipe) in mid_pipe_vsync() argument
64 if (pipe == 0) in mid_pipe_vsync()
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| D | mdfld_device.c | 170 struct psb_pipe *pipe = &dev_priv->regs.pipe[pipenum]; in mdfld_save_display_registers() local
197 pipe->dpll = PSB_RVDC32(map->dpll); in mdfld_save_display_registers()
198 pipe->fp0 = PSB_RVDC32(map->fp0); in mdfld_save_display_registers()
199 pipe->conf = PSB_RVDC32(map->conf); in mdfld_save_display_registers()
200 pipe->htotal = PSB_RVDC32(map->htotal); in mdfld_save_display_registers()
201 pipe->hblank = PSB_RVDC32(map->hblank); in mdfld_save_display_registers()
202 pipe->hsync = PSB_RVDC32(map->hsync); in mdfld_save_display_registers()
203 pipe->vtotal = PSB_RVDC32(map->vtotal); in mdfld_save_display_registers()
204 pipe->vblank = PSB_RVDC32(map->vblank); in mdfld_save_display_registers()
205 pipe->vsync = PSB_RVDC32(map->vsync); in mdfld_save_display_registers()
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| D | mdfld_dsi_output.c | 91 void mdfld_dsi_brightness_init(struct mdfld_dsi_config *dsi_config, int pipe) in mdfld_dsi_brightness_init() argument
132 void mdfld_dsi_brightness_control(struct drm_device *dev, int pipe, int level) in mdfld_dsi_brightness_control() argument
140 if (!dev || (pipe != 0 && pipe != 2)) { in mdfld_dsi_brightness_control()
149 if (pipe) in mdfld_dsi_brightness_control()
164 pipe, gen_ctrl_val); in mdfld_dsi_brightness_control()
215 void mdfld_dsi_controller_init(struct mdfld_dsi_config *dsi_config, int pipe) in mdfld_dsi_controller_init() argument
217 if (!dsi_config || ((pipe != 0) && (pipe != 2))) { in mdfld_dsi_controller_init()
222 mdfld_dsi_dpi_controller_init(dsi_config, pipe); in mdfld_dsi_controller_init()
415 struct mdfld_dsi_config *config, int pipe) in mdfld_dsi_get_default_config() argument
423 if (mdfld_get_panel_type(dev, pipe) == TC35876X) in mdfld_dsi_get_default_config()
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| /drivers/platform/goldfish/ |
| D | goldfish_pipe_v2.c | 256 static int goldfish_pipe_cmd_locked(struct goldfish_pipe *pipe, in goldfish_pipe_cmd_locked() argument
259 pipe->command_buffer->cmd = cmd; in goldfish_pipe_cmd_locked()
261 pipe->command_buffer->status = PIPE_ERROR_INVAL; in goldfish_pipe_cmd_locked()
262 writel(pipe->id, pipe->dev->base + PIPE_V2_REG_CMD); in goldfish_pipe_cmd_locked()
263 return pipe->command_buffer->status; in goldfish_pipe_cmd_locked()
266 static int goldfish_pipe_cmd(struct goldfish_pipe *pipe, enum PipeCmdCode cmd) in goldfish_pipe_cmd() argument
270 if (mutex_lock_interruptible(&pipe->lock)) in goldfish_pipe_cmd()
272 status = goldfish_pipe_cmd_locked(pipe, cmd); in goldfish_pipe_cmd()
273 mutex_unlock(&pipe->lock); in goldfish_pipe_cmd()
374 static int transfer_max_buffers(struct goldfish_pipe *pipe, in transfer_max_buffers() argument
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| D | goldfish_pipe_v1.c | 99 static u32 goldfish_cmd_status(struct goldfish_pipe *pipe, u32 cmd) in goldfish_cmd_status() argument
103 struct goldfish_pipe_dev *dev = pipe->dev; in goldfish_cmd_status()
106 gf_write_ptr(pipe, dev->base + PIPE_V1_REG_CHANNEL, in goldfish_cmd_status()
114 static void goldfish_cmd(struct goldfish_pipe *pipe, u32 cmd) in goldfish_cmd() argument
117 struct goldfish_pipe_dev *dev = pipe->dev; in goldfish_cmd()
120 gf_write_ptr(pipe, dev->base + PIPE_V1_REG_CHANNEL, in goldfish_cmd()
186 struct goldfish_pipe *pipe, int *status) in access_with_param() argument
194 aps->channel = (unsigned long)pipe; in access_with_param()
212 struct goldfish_pipe *pipe, in transfer_pages() argument
221 if (access_with_param(dev, cmd, xaddr, size, pipe, &status)) { in transfer_pages()
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| /drivers/gpu/drm/ |
| D | drm_irq.c | 46 #define vblanktimestamp(dev, pipe, count) \ argument
47 ((dev)->vblank[pipe].time[(count) % DRM_VBLANKTIME_RBSIZE])
60 drm_get_last_vbltimestamp(struct drm_device *dev, unsigned int pipe,
77 static void store_vblank(struct drm_device *dev, unsigned int pipe, in store_vblank() argument
81 struct drm_vblank_crtc *vblank = &dev->vblank[pipe]; in store_vblank()
92 vblanktimestamp(dev, pipe, tslot) = *t_vblank; in store_vblank()
120 static void drm_reset_vblank_timestamp(struct drm_device *dev, unsigned int pipe) in drm_reset_vblank_timestamp() argument
134 cur_vblank = dev->driver->get_vblank_counter(dev, pipe); in drm_reset_vblank_timestamp()
135 rc = drm_get_last_vbltimestamp(dev, pipe, &t_vblank, 0); in drm_reset_vblank_timestamp()
136 } while (cur_vblank != dev->driver->get_vblank_counter(dev, pipe) && --count > 0); in drm_reset_vblank_timestamp()
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| /drivers/gpu/drm/i915/ |
| D | intel_fifo_underrun.c | 55 enum pipe pipe; in ivb_can_enable_err_int() local
59 for_each_pipe(dev_priv, pipe) { in ivb_can_enable_err_int()
60 crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]); in ivb_can_enable_err_int()
72 enum pipe pipe; in cpt_can_enable_serr_int() local
77 for_each_pipe(dev_priv, pipe) { in cpt_can_enable_serr_int()
78 crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]); in cpt_can_enable_serr_int()
102 u32 reg = PIPESTAT(crtc->pipe); in i9xx_check_fifo_underruns()
115 DRM_ERROR("pipe %c underrun\n", pipe_name(crtc->pipe)); in i9xx_check_fifo_underruns()
122 enum pipe pipe, in i9xx_set_fifo_underrun_reporting() argument
126 u32 reg = PIPESTAT(pipe); in i9xx_set_fifo_underrun_reporting()
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| D | i915_reg.h | 28 #define _PIPE(pipe, a, b) ((a) + (pipe)*((b)-(a))) argument
32 #define _PIPE3(pipe, a, b, c) ((pipe) == PIPE_A ? (a) : \ argument
33 (pipe) == PIPE_B ? (b) : (c))
553 #define GEN7_PIPE_DE_LOAD_SL(pipe) _PIPE(pipe, \ argument
603 #define _DP_SSC(val, pipe) ((val) << (2 * (pipe))) argument
604 #define DP_SSC_MASK(pipe) _DP_SSC(0x3, (pipe)) argument
605 #define DP_SSC_PWR_ON(pipe) _DP_SSC(0x0, (pipe)) argument
606 #define DP_SSC_CLK_GATE(pipe) _DP_SSC(0x1, (pipe)) argument
607 #define DP_SSC_RESET(pipe) _DP_SSC(0x2, (pipe)) argument
608 #define DP_SSC_PWR_GATE(pipe) _DP_SSC(0x3, (pipe)) argument
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| D | intel_sprite.c | 85 enum pipe pipe = crtc->pipe; in intel_pipe_update_start() local
125 pipe_name(crtc->pipe)); in intel_pipe_update_start()
143 dev->driver->get_vblank_counter(dev, pipe); in intel_pipe_update_start()
160 enum pipe pipe = crtc->pipe; in intel_pipe_update_end() local
162 u32 end_vbl_count = dev->driver->get_vblank_counter(dev, pipe); in intel_pipe_update_end()
172 pipe_name(pipe), crtc->debug.start_vbl_count, in intel_pipe_update_end()
192 const int pipe = intel_plane->pipe; in skl_update_plane() local
231 I915_WRITE(PLANE_KEYVAL(pipe, plane), key->min_value); in skl_update_plane()
232 I915_WRITE(PLANE_KEYMAX(pipe, plane), key->max_value); in skl_update_plane()
233 I915_WRITE(PLANE_KEYMSK(pipe, plane), key->channel_mask); in skl_update_plane()
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| D | i915_irq.c | 477 __i915_enable_pipestat(struct drm_i915_private *dev_priv, enum pipe pipe, in __i915_enable_pipestat() argument
480 u32 reg = PIPESTAT(pipe); in __i915_enable_pipestat()
489 pipe_name(pipe), enable_mask, status_mask)) in __i915_enable_pipestat()
495 dev_priv->pipestat_irq_mask[pipe] |= status_mask; in __i915_enable_pipestat()
504 __i915_disable_pipestat(struct drm_i915_private *dev_priv, enum pipe pipe, in __i915_disable_pipestat() argument
507 u32 reg = PIPESTAT(pipe); in __i915_disable_pipestat()
516 pipe_name(pipe), enable_mask, status_mask)) in __i915_disable_pipestat()
522 dev_priv->pipestat_irq_mask[pipe] &= ~status_mask; in __i915_disable_pipestat()
558 i915_enable_pipestat(struct drm_i915_private *dev_priv, enum pipe pipe, in i915_enable_pipestat() argument
568 __i915_enable_pipestat(dev_priv, pipe, enable_mask, status_mask); in i915_enable_pipestat()
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| D | intel_audio.c | 269 enum pipe pipe = intel_crtc->pipe; in hsw_audio_codec_disable() local
272 DRM_DEBUG_KMS("Disable audio codec on pipe %c\n", pipe_name(pipe)); in hsw_audio_codec_disable()
277 tmp = I915_READ(HSW_AUD_CFG(pipe)); in hsw_audio_codec_disable()
284 I915_WRITE(HSW_AUD_CFG(pipe), tmp); in hsw_audio_codec_disable()
288 tmp &= ~AUDIO_ELD_VALID(pipe); in hsw_audio_codec_disable()
289 tmp &= ~AUDIO_OUTPUT_ENABLE(pipe); in hsw_audio_codec_disable()
301 enum pipe pipe = intel_crtc->pipe; in hsw_audio_codec_enable() local
312 pipe_name(pipe), drm_eld_size(eld)); in hsw_audio_codec_enable()
318 tmp |= AUDIO_OUTPUT_ENABLE(pipe); in hsw_audio_codec_enable()
319 tmp &= ~AUDIO_ELD_VALID(pipe); in hsw_audio_codec_enable()
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| D | intel_psr.c | 64 static bool vlv_is_psr_active_on_pipe(struct drm_device *dev, int pipe) in vlv_is_psr_active_on_pipe() argument
69 val = I915_READ(VLV_PSRSTAT(pipe)) & in vlv_is_psr_active_on_pipe()
112 enum pipe pipe = to_intel_crtc(crtc)->pipe; in vlv_psr_setup_vsc() local
116 val = I915_READ(VLV_VSCSDP(pipe)); in vlv_psr_setup_vsc()
119 I915_WRITE(VLV_VSCSDP(pipe), val); in vlv_psr_setup_vsc()
224 enum pipe pipe = to_intel_crtc(crtc)->pipe; in vlv_psr_enable_source() local
227 I915_WRITE(VLV_PSRCTL(pipe), in vlv_psr_enable_source()
239 enum pipe pipe = to_intel_crtc(crtc)->pipe; in vlv_psr_activate() local
246 I915_WRITE(VLV_PSRCTL(pipe), I915_READ(VLV_PSRCTL(pipe)) | in vlv_psr_activate()
446 if (wait_for((I915_READ(VLV_PSRSTAT(intel_crtc->pipe)) & in vlv_psr_disable()
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| D | intel_hdmi.c | 196 int i, reg = TVIDEO_DIP_CTL(intel_crtc->pipe); in ibx_write_infoframe()
210 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); in ibx_write_infoframe()
215 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); in ibx_write_infoframe()
232 int reg = TVIDEO_DIP_CTL(intel_crtc->pipe); in ibx_infoframe_enabled()
254 int i, reg = TVIDEO_DIP_CTL(intel_crtc->pipe); in cpt_write_infoframe()
271 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); in cpt_write_infoframe()
276 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); in cpt_write_infoframe()
292 int reg = TVIDEO_DIP_CTL(intel_crtc->pipe); in cpt_infoframe_enabled()
311 int i, reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe); in vlv_write_infoframe()
325 I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), *data); in vlv_write_infoframe()
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| D | intel_display.c | 1088 enum pipe pipe) in intel_pipe_to_cpu_transcoder() argument
1090 struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; in intel_pipe_to_cpu_transcoder()
1096 static bool pipe_dsl_stopped(struct drm_device *dev, enum pipe pipe) in pipe_dsl_stopped() argument
1099 u32 reg = PIPEDSL(pipe); in pipe_dsl_stopped()
1136 enum pipe pipe = crtc->pipe; in intel_wait_for_pipe_off() local
1147 if (wait_for(pipe_dsl_stopped(dev, pipe), 100)) in intel_wait_for_pipe_off()
1159 enum pipe pipe, bool state) in assert_pll() argument
1164 val = I915_READ(DPLL(pipe)); in assert_pll()
1219 enum pipe pipe, bool state) in assert_fdi_tx() argument
1223 pipe); in assert_fdi_tx()
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| /drivers/media/platform/vsp1/ |
| D | vsp1_video.c | 310 static int vsp1_pipeline_validate_branch(struct vsp1_pipeline *pipe, in vsp1_pipeline_validate_branch() argument
362 if (pipe->uds) in vsp1_pipeline_validate_branch()
365 pipe->uds = entity; in vsp1_pipeline_validate_branch()
366 pipe->uds_input = bru_found ? pipe->bru in vsp1_pipeline_validate_branch()
386 static void __vsp1_pipeline_cleanup(struct vsp1_pipeline *pipe) in __vsp1_pipeline_cleanup() argument
388 if (pipe->bru) { in __vsp1_pipeline_cleanup()
389 struct vsp1_bru *bru = to_bru(&pipe->bru->subdev); in __vsp1_pipeline_cleanup()
396 INIT_LIST_HEAD(&pipe->entities); in __vsp1_pipeline_cleanup()
397 pipe->state = VSP1_PIPELINE_STOPPED; in __vsp1_pipeline_cleanup()
398 pipe->buffers_ready = 0; in __vsp1_pipeline_cleanup()
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| /drivers/staging/octeon-usb/ |
| D | octeon-hcd.c | 510 if (usb_pipeisoc(urb->pipe)) in octeon_free_temp_buffer()
599 struct cvmx_usb_pipe *pipe) in cvmx_usb_pipe_needs_split() argument
601 return pipe->device_speed != CVMX_USB_SPEED_HIGH && in cvmx_usb_pipe_needs_split()
613 static inline int cvmx_usb_get_data_pid(struct cvmx_usb_pipe *pipe) in cvmx_usb_get_data_pid() argument
615 if (pipe->pid_toggle) in cvmx_usb_get_data_pid()
1122 struct cvmx_usb_pipe *pipe; in cvmx_usb_open_pipe() local
1124 pipe = kzalloc(sizeof(*pipe), GFP_ATOMIC); in cvmx_usb_open_pipe()
1125 if (!pipe) in cvmx_usb_open_pipe()
1130 pipe->flags |= CVMX_USB_PIPE_FLAGS_NEED_PING; in cvmx_usb_open_pipe()
1131 pipe->device_addr = device_addr; in cvmx_usb_open_pipe()
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| /drivers/net/wireless/ath/ath6kl/ |
| D | usb.c | 79 struct ath6kl_usb_pipe *pipe; member
130 ath6kl_usb_alloc_urb_from_pipe(struct ath6kl_usb_pipe *pipe) in ath6kl_usb_alloc_urb_from_pipe() argument
136 if (!pipe->ar_usb) in ath6kl_usb_alloc_urb_from_pipe()
139 spin_lock_irqsave(&pipe->ar_usb->cs_lock, flags); in ath6kl_usb_alloc_urb_from_pipe()
140 if (!list_empty(&pipe->urb_list_head)) { in ath6kl_usb_alloc_urb_from_pipe()
142 list_first_entry(&pipe->urb_list_head, in ath6kl_usb_alloc_urb_from_pipe()
145 pipe->urb_cnt--; in ath6kl_usb_alloc_urb_from_pipe()
147 spin_unlock_irqrestore(&pipe->ar_usb->cs_lock, flags); in ath6kl_usb_alloc_urb_from_pipe()
152 static void ath6kl_usb_free_urb_to_pipe(struct ath6kl_usb_pipe *pipe, in ath6kl_usb_free_urb_to_pipe() argument
158 if (!pipe->ar_usb) in ath6kl_usb_free_urb_to_pipe()
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| /drivers/staging/rtl8712/ |
| D | usb_ops_linux.c | 67 unsigned int pipe = 0; in ffaddr2pipehdl() local
73 pipe = usb_sndbulkpipe(pusbd, 0x07); in ffaddr2pipehdl()
76 pipe = usb_sndbulkpipe(pusbd, 0x06); in ffaddr2pipehdl()
79 pipe = usb_sndbulkpipe(pusbd, 0x05); in ffaddr2pipehdl()
82 pipe = usb_sndbulkpipe(pusbd, 0x04); in ffaddr2pipehdl()
85 pipe = usb_sndbulkpipe(pusbd, 0x0a); in ffaddr2pipehdl()
88 pipe = usb_sndbulkpipe(pusbd, 0x0b); in ffaddr2pipehdl()
91 pipe = usb_sndbulkpipe(pusbd, 0x0c); in ffaddr2pipehdl()
94 pipe = usb_rcvbulkpipe(pusbd, 0x03); /* in */ in ffaddr2pipehdl()
97 pipe = usb_rcvbulkpipe(pusbd, 0x09); /* in */ in ffaddr2pipehdl()
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| /drivers/usb/host/ |
| D | r8a66597-hcd.c | 310 static void set_pipe_reg_addr(struct r8a66597_pipe *pipe, u8 dma_ch) in set_pipe_reg_addr() argument
312 u16 pipenum = pipe->info.pipenum; in set_pipe_reg_addr()
320 pipe->fifoaddr = fifoaddr[dma_ch]; in set_pipe_reg_addr()
321 pipe->fifosel = fifosel[dma_ch]; in set_pipe_reg_addr()
322 pipe->fifoctr = fifoctr[dma_ch]; in set_pipe_reg_addr()
325 pipe->pipectr = DCPCTR; in set_pipe_reg_addr()
327 pipe->pipectr = get_pipectr_addr(pipenum); in set_pipe_reg_addr()
330 pipe->pipetre = get_pipetre_addr(pipenum); in set_pipe_reg_addr()
331 pipe->pipetrn = get_pipetrn_addr(pipenum); in set_pipe_reg_addr()
333 pipe->pipetre = 0; in set_pipe_reg_addr()
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