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Searched refs:reg_data (Results 1 – 25 of 67) sorted by relevance

123

/drivers/power/
Dmax14577_charger.c61 u8 reg_data; in max14577_get_charger_state() local
74 ret = max14577_read_reg(rmap, MAX14577_CHG_REG_CHG_CTRL2, &reg_data); in max14577_get_charger_state()
78 if ((reg_data & CHGCTRL2_MBCHOSTEN_MASK) == 0) { in max14577_get_charger_state()
83 ret = max14577_read_reg(rmap, MAX14577_CHG_REG_STATUS3, &reg_data); in max14577_get_charger_state()
87 if (reg_data & STATUS3_CGMBC_MASK) { in max14577_get_charger_state()
89 if (reg_data & STATUS3_EOC_MASK) in max14577_get_charger_state()
134 u8 reg_data; in max14577_get_online() local
138 ret = max14577_read_reg(rmap, MAX14577_MUIC_REG_STATUS2, &reg_data); in max14577_get_online()
142 reg_data = ((reg_data & STATUS2_CHGTYP_MASK) >> STATUS2_CHGTYP_SHIFT); in max14577_get_online()
143 chg_type = maxim_get_charger_type(chg->max14577->dev_type, reg_data); in max14577_get_online()
[all …]
/drivers/clk/rockchip/
Dclk-cpu.c66 const struct rockchip_cpuclk_reg_data *reg_data; member
93 const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data; in rockchip_cpuclk_recalc_rate() local
94 u32 clksel0 = readl_relaxed(cpuclk->reg_base + reg_data->core_reg); in rockchip_cpuclk_recalc_rate()
96 clksel0 >>= reg_data->div_core_shift; in rockchip_cpuclk_recalc_rate()
97 clksel0 &= reg_data->div_core_mask; in rockchip_cpuclk_recalc_rate()
126 const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data; in rockchip_cpuclk_pre_rate_change() local
143 if (alt_div > reg_data->div_core_mask) { in rockchip_cpuclk_pre_rate_change()
145 __func__, alt_div, reg_data->div_core_mask); in rockchip_cpuclk_pre_rate_change()
146 alt_div = reg_data->div_core_mask; in rockchip_cpuclk_pre_rate_change()
159 writel(HIWORD_UPDATE(alt_div, reg_data->div_core_mask, in rockchip_cpuclk_pre_rate_change()
[all …]
/drivers/net/ethernet/intel/e1000e/
D80003es2lan.c744 u32 reg_data; in e1000_init_hw_80003es2lan() local
782 reg_data = er32(TXDCTL(0)); in e1000_init_hw_80003es2lan()
783 reg_data = ((reg_data & ~E1000_TXDCTL_WTHRESH) | in e1000_init_hw_80003es2lan()
785 ew32(TXDCTL(0), reg_data); in e1000_init_hw_80003es2lan()
788 reg_data = er32(TXDCTL(1)); in e1000_init_hw_80003es2lan()
789 reg_data = ((reg_data & ~E1000_TXDCTL_WTHRESH) | in e1000_init_hw_80003es2lan()
791 ew32(TXDCTL(1), reg_data); in e1000_init_hw_80003es2lan()
794 reg_data = er32(TCTL); in e1000_init_hw_80003es2lan()
795 reg_data |= E1000_TCTL_RTLC; in e1000_init_hw_80003es2lan()
796 ew32(TCTL, reg_data); in e1000_init_hw_80003es2lan()
[all …]
D82571.c1087 u32 reg_data; in e1000_init_hw_82571() local
1121 reg_data = er32(TXDCTL(0)); in e1000_init_hw_82571()
1122 reg_data = ((reg_data & ~E1000_TXDCTL_WTHRESH) | in e1000_init_hw_82571()
1124 ew32(TXDCTL(0), reg_data); in e1000_init_hw_82571()
1133 reg_data = er32(GCR); in e1000_init_hw_82571()
1134 reg_data |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX; in e1000_init_hw_82571()
1135 ew32(GCR, reg_data); in e1000_init_hw_82571()
1138 reg_data = er32(TXDCTL(1)); in e1000_init_hw_82571()
1139 reg_data = ((reg_data & ~E1000_TXDCTL_WTHRESH) | in e1000_init_hw_82571()
1142 ew32(TXDCTL(1), reg_data); in e1000_init_hw_82571()
/drivers/soc/qcom/
Dspm.c73 const struct spm_reg_data *reg_data; member
125 if (drv->reg_data->reg_offset[reg]) in spm_register_write()
127 drv->reg_data->reg_offset[reg]); in spm_register_write()
136 if (!drv->reg_data->reg_offset[reg]) in spm_register_write_sync()
141 drv->reg_data->reg_offset[reg]); in spm_register_write_sync()
143 drv->reg_data->reg_offset[reg]); in spm_register_write_sync()
153 return readl_relaxed(drv->reg_base + drv->reg_data->reg_offset[reg]); in spm_register_read()
162 start_index = drv->reg_data->start_index[mode]; in spm_set_low_power_mode()
345 drv->reg_data = match_id->data; in spm_dev_probe()
348 addr = drv->reg_base + drv->reg_data->reg_offset[SPM_REG_SEQ_ENTRY]; in spm_dev_probe()
[all …]
/drivers/regulator/
Dmax14577.c29 u8 reg_data; in max14577_reg_is_enabled() local
33 max14577_read_reg(rmap, MAX14577_CHG_REG_CHG_CTRL2, &reg_data); in max14577_reg_is_enabled()
34 if ((reg_data & CHGCTRL2_MBCHOSTEN_MASK) == 0) in max14577_reg_is_enabled()
36 max14577_read_reg(rmap, MAX14577_CHG_REG_STATUS3, &reg_data); in max14577_reg_is_enabled()
37 if ((reg_data & STATUS3_CGMBC_MASK) == 0) in max14577_reg_is_enabled()
48 u8 reg_data; in max14577_reg_get_current_limit() local
57 max14577_read_reg(rmap, MAX14577_CHG_REG_CHG_CTRL4, &reg_data); in max14577_reg_get_current_limit()
59 if ((reg_data & CHGCTRL4_MBCICHWRCL_MASK) == 0) in max14577_reg_get_current_limit()
62 reg_data = ((reg_data & CHGCTRL4_MBCICHWRCH_MASK) >> in max14577_reg_get_current_limit()
64 return limits->high_start + reg_data * limits->high_step; in max14577_reg_get_current_limit()
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Dmax77693.c71 const struct chg_reg_data *reg_data = rdev_get_drvdata(rdev); in max77693_chg_get_current_limit() local
78 ret = regmap_read(rdev->regmap, reg_data->linear_reg, &reg); in max77693_chg_get_current_limit()
82 sel = reg & reg_data->linear_mask; in max77693_chg_get_current_limit()
85 if (sel <= reg_data->min_sel) in max77693_chg_get_current_limit()
88 sel -= reg_data->min_sel; in max77693_chg_get_current_limit()
90 val = chg_min_uA + reg_data->uA_step * sel; in max77693_chg_get_current_limit()
100 const struct chg_reg_data *reg_data = rdev_get_drvdata(rdev); in max77693_chg_set_current_limit() local
104 while (chg_min_uA + reg_data->uA_step * sel < min_uA) in max77693_chg_set_current_limit()
107 if (chg_min_uA + reg_data->uA_step * sel > max_uA) in max77693_chg_set_current_limit()
111 sel += reg_data->min_sel; in max77693_chg_set_current_limit()
[all …]
Dmax8952.c177 pd->reg_data = of_get_regulator_init_data(dev, np, &regulator); in max8952_parse_dt()
178 if (!pd->reg_data) { in max8952_parse_dt()
223 config.init_data = pdata->reg_data; in max8952_pmic_probe()
230 if (pdata->reg_data->constraints.boot_on) in max8952_pmic_probe()
Dtps6507x-regulator.c378 static struct regulator_init_data *reg_data; in tps6507x_parse_dt_reg_data() local
405 reg_data = devm_kzalloc(&pdev->dev, (sizeof(struct regulator_init_data) in tps6507x_parse_dt_reg_data()
407 if (!reg_data) in tps6507x_parse_dt_reg_data()
410 tps_board->tps6507x_pmic_init_data = reg_data; in tps6507x_parse_dt_reg_data()
416 memcpy(&reg_data[idx], matches[idx].init_data, in tps6507x_parse_dt_reg_data()
/drivers/net/ethernet/xilinx/
Dxilinx_emaclite.c166 u32 reg_data; in xemaclite_enable_interrupts() local
169 reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET); in xemaclite_enable_interrupts()
170 xemaclite_writel(reg_data | XEL_TSR_XMIT_IE_MASK, in xemaclite_enable_interrupts()
189 u32 reg_data; in xemaclite_disable_interrupts() local
195 reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET); in xemaclite_disable_interrupts()
196 xemaclite_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK), in xemaclite_disable_interrupts()
200 reg_data = xemaclite_readl(drvdata->base_addr + XEL_RSR_OFFSET); in xemaclite_disable_interrupts()
201 xemaclite_writel(reg_data & (~XEL_RSR_RECV_IE_MASK), in xemaclite_disable_interrupts()
323 u32 reg_data; in xemaclite_send_data() local
334 reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET); in xemaclite_send_data()
[all …]
/drivers/usb/isp1760/
Disp1760-if.c36 u32 reg_data; in isp1761_pci_init() local
72 reg_data = 0; in isp1761_pci_init()
73 while ((reg_data != 0xFACE) && retry_count) { in isp1761_pci_init()
79 reg_data = readl(iobase + HC_SCRATCH_REG) & 0x0000ffff; in isp1761_pci_init()
89 if (reg_data != 0xFACE) { in isp1761_pci_init()
90 dev_err(&dev->dev, "scratch register mismatch %x\n", reg_data); in isp1761_pci_init()
112 reg_data = readl(iobase + PLX_INT_CSR_REG); in isp1761_pci_init()
113 reg_data |= 0x900; in isp1761_pci_init()
114 writel(reg_data, iobase + PLX_INT_CSR_REG); in isp1761_pci_init()
/drivers/char/xilinx_hwicap/
Dfifo_icap.c359 u32 reg_data; in fifo_icap_reset() local
364 reg_data = in_be32(drvdata->base_address + XHI_CR_OFFSET); in fifo_icap_reset()
367 reg_data | XHI_CR_SW_RESET_MASK); in fifo_icap_reset()
370 reg_data & (~XHI_CR_SW_RESET_MASK)); in fifo_icap_reset()
380 u32 reg_data; in fifo_icap_flush_fifo() local
385 reg_data = in_be32(drvdata->base_address + XHI_CR_OFFSET); in fifo_icap_flush_fifo()
388 reg_data | XHI_CR_FIFO_CLR_MASK); in fifo_icap_flush_fifo()
391 reg_data & (~XHI_CR_FIFO_CLR_MASK)); in fifo_icap_flush_fifo()
/drivers/extcon/
Dextcon-sm5502.c34 struct reg_data { struct
55 struct reg_data *reg_data; argument
70 static struct reg_data sm5502_reg_data[] = {
514 unsigned int reg_data, vendor_id, version_id; in sm5502_init_dev_type() local
518 ret = regmap_read(info->regmap, SM5502_REG_DEVICE_ID, &reg_data); in sm5502_init_dev_type()
525 vendor_id = ((reg_data & SM5502_REG_DEVICE_ID_VENDOR_MASK) >> in sm5502_init_dev_type()
527 version_id = ((reg_data & SM5502_REG_DEVICE_ID_VERSION_MASK) >> in sm5502_init_dev_type()
537 if (!info->reg_data[i].invert) in sm5502_init_dev_type()
538 val |= ~info->reg_data[i].val; in sm5502_init_dev_type()
540 val = info->reg_data[i].val; in sm5502_init_dev_type()
[all …]
Dextcon-rt8973a.c35 struct reg_data { struct
59 struct reg_data *reg_data; argument
75 static struct reg_data rt8973a_reg_data[] = {
522 u8 reg = info->reg_data[i].reg; in rt8973a_init_dev_type()
523 u8 mask = info->reg_data[i].mask; in rt8973a_init_dev_type()
526 if (info->reg_data[i].invert) in rt8973a_init_dev_type()
527 val = ~info->reg_data[i].val; in rt8973a_init_dev_type()
529 val = info->reg_data[i].val; in rt8973a_init_dev_type()
570 info->reg_data = rt8973a_reg_data; in rt8973a_muic_i2c_probe()
/drivers/net/wireless/ath/wcn36xx/
Ddxe.c47 #define wcn36xx_dxe_write_register_x(wcn, reg, reg_data) \ argument
50 wcn36xx_dxe_write_register(wcn, reg ## _3680, reg_data); \
52 wcn36xx_dxe_write_register(wcn, reg ## _3660, reg_data); \
260 int reg_data = 0; in wcn36xx_dxe_enable_ch_int() local
264 &reg_data); in wcn36xx_dxe_enable_ch_int()
266 reg_data |= wcn_ch; in wcn36xx_dxe_enable_ch_int()
270 (int)reg_data); in wcn36xx_dxe_enable_ch_int()
698 int reg_data = 0, ret; in wcn36xx_dxe_init() local
700 reg_data = WCN36XX_DXE_REG_RESET; in wcn36xx_dxe_init()
701 wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_REG_CSR_RESET, reg_data); in wcn36xx_dxe_init()
[all …]
/drivers/staging/vt6656/
Drf.c608 u8 reg_data[4]; in vnt_rf_write_embedded() local
612 reg_data[0] = (u8)data; in vnt_rf_write_embedded()
613 reg_data[1] = (u8)(data >> 8); in vnt_rf_write_embedded()
614 reg_data[2] = (u8)(data >> 16); in vnt_rf_write_embedded()
615 reg_data[3] = (u8)(data >> 24); in vnt_rf_write_embedded()
618 0, 0, ARRAY_SIZE(reg_data), reg_data); in vnt_rf_write_embedded()
/drivers/clk/
Dclk-cdce925.c497 u8 reg_data[2]; in cdce925_regmap_i2c_write() local
503 reg_data[0] = CDCE925_I2C_COMMAND_BYTE_TRANSFER | ((u8 *)data)[0]; in cdce925_regmap_i2c_write()
504 reg_data[1] = ((u8 *)data)[1]; in cdce925_regmap_i2c_write()
507 reg_data[0], reg_data[1]); in cdce925_regmap_i2c_write()
509 ret = i2c_master_send(i2c, reg_data, count); in cdce925_regmap_i2c_write()
525 u8 reg_data[2]; in cdce925_regmap_i2c_read() local
532 xfer[0].buf = reg_data; in cdce925_regmap_i2c_read()
534 reg_data[0] = in cdce925_regmap_i2c_read()
538 reg_data[0] = in cdce925_regmap_i2c_read()
540 reg_data[1] = val_size; in cdce925_regmap_i2c_read()
[all …]
/drivers/input/mouse/
Dcyapa_gen3.c376 static int cyapa_gen3_state_parse(struct cyapa *cyapa, u8 *reg_data, int len) in cyapa_gen3_state_parse() argument
381 if (reg_data[REG_BL_FILE] == BL_FILE && in cyapa_gen3_state_parse()
382 reg_data[REG_BL_ERROR] == BL_ERROR_NO_ERR_IDLE && in cyapa_gen3_state_parse()
383 (reg_data[REG_BL_STATUS] == in cyapa_gen3_state_parse()
385 reg_data[REG_BL_STATUS] == BL_STATUS_RUNNING)) { in cyapa_gen3_state_parse()
393 } else if (reg_data[REG_BL_FILE] == BL_FILE && in cyapa_gen3_state_parse()
394 (reg_data[REG_BL_STATUS] & BL_STATUS_RUNNING) == in cyapa_gen3_state_parse()
397 if (reg_data[REG_BL_STATUS] & BL_STATUS_BUSY) { in cyapa_gen3_state_parse()
400 if ((reg_data[REG_BL_ERROR] & BL_ERROR_BOOTLOADING) == in cyapa_gen3_state_parse()
406 } else if ((reg_data[REG_OP_STATUS] & OP_STATUS_SRC) && in cyapa_gen3_state_parse()
[all …]
Dcyapa_gen5.c787 static int gen5_hid_description_header_parse(struct cyapa *cyapa, u8 *reg_data) in gen5_hid_description_header_parse() argument
808 if (reg_data[PIP_RESP_REPORT_ID_OFFSET] == in gen5_hid_description_header_parse()
845 static int gen5_report_data_header_parse(struct cyapa *cyapa, u8 *reg_data) in gen5_report_data_header_parse() argument
849 length = get_unaligned_le16(&reg_data[PIP_RESP_LENGTH_OFFSET]); in gen5_report_data_header_parse()
850 switch (reg_data[PIP_RESP_REPORT_ID_OFFSET]) { in gen5_report_data_header_parse()
876 static int gen5_cmd_resp_header_parse(struct cyapa *cyapa, u8 *reg_data) in gen5_cmd_resp_header_parse() argument
887 length = get_unaligned_le16(&reg_data[PIP_RESP_LENGTH_OFFSET]); in gen5_cmd_resp_header_parse()
894 if (reg_data[PIP_RESP_REPORT_ID_OFFSET] == in gen5_cmd_resp_header_parse()
930 static int cyapa_gen5_state_parse(struct cyapa *cyapa, u8 *reg_data, int len) in cyapa_gen5_state_parse() argument
934 if (!reg_data || len < 3) in cyapa_gen5_state_parse()
[all …]
/drivers/mfd/
Dda9150-core.c71 u8 *reg_data; in da9150_i2c_write_device() local
74 reg_data = kzalloc(1 + count, GFP_KERNEL); in da9150_i2c_write_device()
75 if (!reg_data) in da9150_i2c_write_device()
78 reg_data[0] = addr; in da9150_i2c_write_device()
79 memcpy(&reg_data[1], buf, count); in da9150_i2c_write_device()
85 xfer.buf = reg_data; in da9150_i2c_write_device()
88 kfree(reg_data); in da9150_i2c_write_device()
Dmax77843.c106 unsigned int reg_data; in max77843_probe() local
135 MAX77843_SYS_REG_PMICID, &reg_data); in max77843_probe()
140 dev_info(&i2c->dev, "device ID: 0x%x\n", reg_data); in max77843_probe()
/drivers/media/usb/gspca/m5602/
Dm5602_s5k83a.c45 static int s5k83a_get_rotation(struct sd *sd, u8 *reg_data);
407 static int s5k83a_get_rotation(struct sd *sd, u8 *reg_data) in s5k83a_get_rotation() argument
409 int err = m5602_read_bridge(sd, M5602_XB_GPIO_DAT, reg_data); in s5k83a_get_rotation()
410 *reg_data = (*reg_data & S5K83A_GPIO_ROTATION_MASK) ? 0 : 1; in s5k83a_get_rotation()
/drivers/gpio/
Dgpio-sx150x.c62 u8 reg_data; member
94 .reg_data = 0x08,
112 .reg_data = 0x11,
130 .reg_data = 0x01,
245 u8 reg = chip->dev_cfg->reg_data; in sx150x_get_io()
271 chip->dev_cfg->reg_data, in sx150x_set_io()
291 chip->dev_cfg->reg_data, in sx150x_io_output()
/drivers/net/wireless/zd1211rw/
Dzd_usb.h87 struct reg_data { struct
94 struct reg_data reg_writes[0]; argument
133 struct reg_data regs[0];
/drivers/gpu/drm/amd/amdkfd/
Dkfd_dbgdev.c450 packets_vec[0].reg_data[0] = cntl.u32All; in dbgdev_address_watch_diq()
462 packets_vec[1].reg_data[0] = addrHi.u32All; in dbgdev_address_watch_diq()
474 packets_vec[2].reg_data[0] = addrLo.u32All; in dbgdev_address_watch_diq()
492 packets_vec[3].reg_data[0] = cntl.u32All; in dbgdev_address_watch_diq()
687 packets_vec[0].reg_data[0] = reg_gfx_index.u32All; in dbgdev_wave_control_diq()
697 packets_vec[1].reg_data[0] = reg_sq_cmd.u32All; in dbgdev_wave_control_diq()
713 packets_vec[2].reg_data[0] = reg_gfx_index.u32All; in dbgdev_wave_control_diq()

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