1 /*
2 * Xilinx EmacLite Linux driver for the Xilinx Ethernet MAC Lite device.
3 *
4 * This is a new flat driver which is based on the original emac_lite
5 * driver from John Williams <john.williams@xilinx.com>.
6 *
7 * 2007 - 2013 (c) Xilinx, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
15 #include <linux/module.h>
16 #include <linux/uaccess.h>
17 #include <linux/netdevice.h>
18 #include <linux/etherdevice.h>
19 #include <linux/skbuff.h>
20 #include <linux/io.h>
21 #include <linux/slab.h>
22 #include <linux/of_address.h>
23 #include <linux/of_device.h>
24 #include <linux/of_platform.h>
25 #include <linux/of_mdio.h>
26 #include <linux/of_net.h>
27 #include <linux/phy.h>
28 #include <linux/interrupt.h>
29
30 #define DRIVER_NAME "xilinx_emaclite"
31
32 /* Register offsets for the EmacLite Core */
33 #define XEL_TXBUFF_OFFSET 0x0 /* Transmit Buffer */
34 #define XEL_MDIOADDR_OFFSET 0x07E4 /* MDIO Address Register */
35 #define XEL_MDIOWR_OFFSET 0x07E8 /* MDIO Write Data Register */
36 #define XEL_MDIORD_OFFSET 0x07EC /* MDIO Read Data Register */
37 #define XEL_MDIOCTRL_OFFSET 0x07F0 /* MDIO Control Register */
38 #define XEL_GIER_OFFSET 0x07F8 /* GIE Register */
39 #define XEL_TSR_OFFSET 0x07FC /* Tx status */
40 #define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */
41
42 #define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */
43 #define XEL_RPLR_OFFSET 0x100C /* Rx packet length */
44 #define XEL_RSR_OFFSET 0x17FC /* Rx status */
45
46 #define XEL_BUFFER_OFFSET 0x0800 /* Next Tx/Rx buffer's offset */
47
48 /* MDIO Address Register Bit Masks */
49 #define XEL_MDIOADDR_REGADR_MASK 0x0000001F /* Register Address */
50 #define XEL_MDIOADDR_PHYADR_MASK 0x000003E0 /* PHY Address */
51 #define XEL_MDIOADDR_PHYADR_SHIFT 5
52 #define XEL_MDIOADDR_OP_MASK 0x00000400 /* RD/WR Operation */
53
54 /* MDIO Write Data Register Bit Masks */
55 #define XEL_MDIOWR_WRDATA_MASK 0x0000FFFF /* Data to be Written */
56
57 /* MDIO Read Data Register Bit Masks */
58 #define XEL_MDIORD_RDDATA_MASK 0x0000FFFF /* Data to be Read */
59
60 /* MDIO Control Register Bit Masks */
61 #define XEL_MDIOCTRL_MDIOSTS_MASK 0x00000001 /* MDIO Status Mask */
62 #define XEL_MDIOCTRL_MDIOEN_MASK 0x00000008 /* MDIO Enable */
63
64 /* Global Interrupt Enable Register (GIER) Bit Masks */
65 #define XEL_GIER_GIE_MASK 0x80000000 /* Global Enable */
66
67 /* Transmit Status Register (TSR) Bit Masks */
68 #define XEL_TSR_XMIT_BUSY_MASK 0x00000001 /* Tx complete */
69 #define XEL_TSR_PROGRAM_MASK 0x00000002 /* Program the MAC address */
70 #define XEL_TSR_XMIT_IE_MASK 0x00000008 /* Tx interrupt enable bit */
71 #define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000 /* Buffer is active, SW bit
72 * only. This is not documented
73 * in the HW spec */
74
75 /* Define for programming the MAC address into the EmacLite */
76 #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)
77
78 /* Receive Status Register (RSR) */
79 #define XEL_RSR_RECV_DONE_MASK 0x00000001 /* Rx complete */
80 #define XEL_RSR_RECV_IE_MASK 0x00000008 /* Rx interrupt enable bit */
81
82 /* Transmit Packet Length Register (TPLR) */
83 #define XEL_TPLR_LENGTH_MASK 0x0000FFFF /* Tx packet length */
84
85 /* Receive Packet Length Register (RPLR) */
86 #define XEL_RPLR_LENGTH_MASK 0x0000FFFF /* Rx packet length */
87
88 #define XEL_HEADER_OFFSET 12 /* Offset to length field */
89 #define XEL_HEADER_SHIFT 16 /* Shift value for length */
90
91 /* General Ethernet Definitions */
92 #define XEL_ARP_PACKET_SIZE 28 /* Max ARP packet size */
93 #define XEL_HEADER_IP_LENGTH_OFFSET 16 /* IP Length Offset */
94
95
96
97 #define TX_TIMEOUT (60*HZ) /* Tx timeout is 60 seconds. */
98 #define ALIGNMENT 4
99
100 /* BUFFER_ALIGN(adr) calculates the number of bytes to the next alignment. */
101 #define BUFFER_ALIGN(adr) ((ALIGNMENT - ((u32) adr)) % ALIGNMENT)
102
103 #ifdef __BIG_ENDIAN
104 #define xemaclite_readl ioread32be
105 #define xemaclite_writel iowrite32be
106 #else
107 #define xemaclite_readl ioread32
108 #define xemaclite_writel iowrite32
109 #endif
110
111 /**
112 * struct net_local - Our private per device data
113 * @ndev: instance of the network device
114 * @tx_ping_pong: indicates whether Tx Pong buffer is configured in HW
115 * @rx_ping_pong: indicates whether Rx Pong buffer is configured in HW
116 * @next_tx_buf_to_use: next Tx buffer to write to
117 * @next_rx_buf_to_use: next Rx buffer to read from
118 * @base_addr: base address of the Emaclite device
119 * @reset_lock: lock used for synchronization
120 * @deferred_skb: holds an skb (for transmission at a later time) when the
121 * Tx buffer is not free
122 * @phy_dev: pointer to the PHY device
123 * @phy_node: pointer to the PHY device node
124 * @mii_bus: pointer to the MII bus
125 * @mdio_irqs: IRQs table for MDIO bus
126 * @last_link: last link status
127 * @has_mdio: indicates whether MDIO is included in the HW
128 */
129 struct net_local {
130
131 struct net_device *ndev;
132
133 bool tx_ping_pong;
134 bool rx_ping_pong;
135 u32 next_tx_buf_to_use;
136 u32 next_rx_buf_to_use;
137 void __iomem *base_addr;
138
139 spinlock_t reset_lock;
140 struct sk_buff *deferred_skb;
141
142 struct phy_device *phy_dev;
143 struct device_node *phy_node;
144
145 struct mii_bus *mii_bus;
146 int mdio_irqs[PHY_MAX_ADDR];
147
148 int last_link;
149 bool has_mdio;
150 };
151
152
153 /*************************/
154 /* EmacLite driver calls */
155 /*************************/
156
157 /**
158 * xemaclite_enable_interrupts - Enable the interrupts for the EmacLite device
159 * @drvdata: Pointer to the Emaclite device private data
160 *
161 * This function enables the Tx and Rx interrupts for the Emaclite device along
162 * with the Global Interrupt Enable.
163 */
xemaclite_enable_interrupts(struct net_local * drvdata)164 static void xemaclite_enable_interrupts(struct net_local *drvdata)
165 {
166 u32 reg_data;
167
168 /* Enable the Tx interrupts for the first Buffer */
169 reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET);
170 xemaclite_writel(reg_data | XEL_TSR_XMIT_IE_MASK,
171 drvdata->base_addr + XEL_TSR_OFFSET);
172
173 /* Enable the Rx interrupts for the first buffer */
174 xemaclite_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + XEL_RSR_OFFSET);
175
176 /* Enable the Global Interrupt Enable */
177 xemaclite_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);
178 }
179
180 /**
181 * xemaclite_disable_interrupts - Disable the interrupts for the EmacLite device
182 * @drvdata: Pointer to the Emaclite device private data
183 *
184 * This function disables the Tx and Rx interrupts for the Emaclite device,
185 * along with the Global Interrupt Enable.
186 */
xemaclite_disable_interrupts(struct net_local * drvdata)187 static void xemaclite_disable_interrupts(struct net_local *drvdata)
188 {
189 u32 reg_data;
190
191 /* Disable the Global Interrupt Enable */
192 xemaclite_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);
193
194 /* Disable the Tx interrupts for the first buffer */
195 reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET);
196 xemaclite_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK),
197 drvdata->base_addr + XEL_TSR_OFFSET);
198
199 /* Disable the Rx interrupts for the first buffer */
200 reg_data = xemaclite_readl(drvdata->base_addr + XEL_RSR_OFFSET);
201 xemaclite_writel(reg_data & (~XEL_RSR_RECV_IE_MASK),
202 drvdata->base_addr + XEL_RSR_OFFSET);
203 }
204
205 /**
206 * xemaclite_aligned_write - Write from 16-bit aligned to 32-bit aligned address
207 * @src_ptr: Void pointer to the 16-bit aligned source address
208 * @dest_ptr: Pointer to the 32-bit aligned destination address
209 * @length: Number bytes to write from source to destination
210 *
211 * This function writes data from a 16-bit aligned buffer to a 32-bit aligned
212 * address in the EmacLite device.
213 */
xemaclite_aligned_write(void * src_ptr,u32 * dest_ptr,unsigned length)214 static void xemaclite_aligned_write(void *src_ptr, u32 *dest_ptr,
215 unsigned length)
216 {
217 u32 align_buffer;
218 u32 *to_u32_ptr;
219 u16 *from_u16_ptr, *to_u16_ptr;
220
221 to_u32_ptr = dest_ptr;
222 from_u16_ptr = src_ptr;
223 align_buffer = 0;
224
225 for (; length > 3; length -= 4) {
226 to_u16_ptr = (u16 *)&align_buffer;
227 *to_u16_ptr++ = *from_u16_ptr++;
228 *to_u16_ptr++ = *from_u16_ptr++;
229
230 /* This barrier resolves occasional issues seen around
231 * cases where the data is not properly flushed out
232 * from the processor store buffers to the destination
233 * memory locations.
234 */
235 wmb();
236
237 /* Output a word */
238 *to_u32_ptr++ = align_buffer;
239 }
240 if (length) {
241 u8 *from_u8_ptr, *to_u8_ptr;
242
243 /* Set up to output the remaining data */
244 align_buffer = 0;
245 to_u8_ptr = (u8 *) &align_buffer;
246 from_u8_ptr = (u8 *) from_u16_ptr;
247
248 /* Output the remaining data */
249 for (; length > 0; length--)
250 *to_u8_ptr++ = *from_u8_ptr++;
251
252 /* This barrier resolves occasional issues seen around
253 * cases where the data is not properly flushed out
254 * from the processor store buffers to the destination
255 * memory locations.
256 */
257 wmb();
258 *to_u32_ptr = align_buffer;
259 }
260 }
261
262 /**
263 * xemaclite_aligned_read - Read from 32-bit aligned to 16-bit aligned buffer
264 * @src_ptr: Pointer to the 32-bit aligned source address
265 * @dest_ptr: Pointer to the 16-bit aligned destination address
266 * @length: Number bytes to read from source to destination
267 *
268 * This function reads data from a 32-bit aligned address in the EmacLite device
269 * to a 16-bit aligned buffer.
270 */
xemaclite_aligned_read(u32 * src_ptr,u8 * dest_ptr,unsigned length)271 static void xemaclite_aligned_read(u32 *src_ptr, u8 *dest_ptr,
272 unsigned length)
273 {
274 u16 *to_u16_ptr, *from_u16_ptr;
275 u32 *from_u32_ptr;
276 u32 align_buffer;
277
278 from_u32_ptr = src_ptr;
279 to_u16_ptr = (u16 *) dest_ptr;
280
281 for (; length > 3; length -= 4) {
282 /* Copy each word into the temporary buffer */
283 align_buffer = *from_u32_ptr++;
284 from_u16_ptr = (u16 *)&align_buffer;
285
286 /* Read data from source */
287 *to_u16_ptr++ = *from_u16_ptr++;
288 *to_u16_ptr++ = *from_u16_ptr++;
289 }
290
291 if (length) {
292 u8 *to_u8_ptr, *from_u8_ptr;
293
294 /* Set up to read the remaining data */
295 to_u8_ptr = (u8 *) to_u16_ptr;
296 align_buffer = *from_u32_ptr++;
297 from_u8_ptr = (u8 *) &align_buffer;
298
299 /* Read the remaining data */
300 for (; length > 0; length--)
301 *to_u8_ptr = *from_u8_ptr;
302 }
303 }
304
305 /**
306 * xemaclite_send_data - Send an Ethernet frame
307 * @drvdata: Pointer to the Emaclite device private data
308 * @data: Pointer to the data to be sent
309 * @byte_count: Total frame size, including header
310 *
311 * This function checks if the Tx buffer of the Emaclite device is free to send
312 * data. If so, it fills the Tx buffer with data for transmission. Otherwise, it
313 * returns an error.
314 *
315 * Return: 0 upon success or -1 if the buffer(s) are full.
316 *
317 * Note: The maximum Tx packet size can not be more than Ethernet header
318 * (14 Bytes) + Maximum MTU (1500 bytes). This is excluding FCS.
319 */
xemaclite_send_data(struct net_local * drvdata,u8 * data,unsigned int byte_count)320 static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
321 unsigned int byte_count)
322 {
323 u32 reg_data;
324 void __iomem *addr;
325
326 /* Determine the expected Tx buffer address */
327 addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;
328
329 /* If the length is too large, truncate it */
330 if (byte_count > ETH_FRAME_LEN)
331 byte_count = ETH_FRAME_LEN;
332
333 /* Check if the expected buffer is available */
334 reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);
335 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
336 XEL_TSR_XMIT_ACTIVE_MASK)) == 0) {
337
338 /* Switch to next buffer if configured */
339 if (drvdata->tx_ping_pong != 0)
340 drvdata->next_tx_buf_to_use ^= XEL_BUFFER_OFFSET;
341 } else if (drvdata->tx_ping_pong != 0) {
342 /* If the expected buffer is full, try the other buffer,
343 * if it is configured in HW */
344
345 addr = (void __iomem __force *)((u32 __force)addr ^
346 XEL_BUFFER_OFFSET);
347 reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);
348
349 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
350 XEL_TSR_XMIT_ACTIVE_MASK)) != 0)
351 return -1; /* Buffers were full, return failure */
352 } else
353 return -1; /* Buffer was full, return failure */
354
355 /* Write the frame to the buffer */
356 xemaclite_aligned_write(data, (u32 __force *) addr, byte_count);
357
358 xemaclite_writel((byte_count & XEL_TPLR_LENGTH_MASK),
359 addr + XEL_TPLR_OFFSET);
360
361 /* Update the Tx Status Register to indicate that there is a
362 * frame to send. Set the XEL_TSR_XMIT_ACTIVE_MASK flag which
363 * is used by the interrupt handler to check whether a frame
364 * has been transmitted */
365 reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);
366 reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK);
367 xemaclite_writel(reg_data, addr + XEL_TSR_OFFSET);
368
369 return 0;
370 }
371
372 /**
373 * xemaclite_recv_data - Receive a frame
374 * @drvdata: Pointer to the Emaclite device private data
375 * @data: Address where the data is to be received
376 *
377 * This function is intended to be called from the interrupt context or
378 * with a wrapper which waits for the receive frame to be available.
379 *
380 * Return: Total number of bytes received
381 */
xemaclite_recv_data(struct net_local * drvdata,u8 * data,int maxlen)382 static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data, int maxlen)
383 {
384 void __iomem *addr;
385 u16 length, proto_type;
386 u32 reg_data;
387
388 /* Determine the expected buffer address */
389 addr = (drvdata->base_addr + drvdata->next_rx_buf_to_use);
390
391 /* Verify which buffer has valid data */
392 reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET);
393
394 if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
395 if (drvdata->rx_ping_pong != 0)
396 drvdata->next_rx_buf_to_use ^= XEL_BUFFER_OFFSET;
397 } else {
398 /* The instance is out of sync, try other buffer if other
399 * buffer is configured, return 0 otherwise. If the instance is
400 * out of sync, do not update the 'next_rx_buf_to_use' since it
401 * will correct on subsequent calls */
402 if (drvdata->rx_ping_pong != 0)
403 addr = (void __iomem __force *)((u32 __force)addr ^
404 XEL_BUFFER_OFFSET);
405 else
406 return 0; /* No data was available */
407
408 /* Verify that buffer has valid data */
409 reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET);
410 if ((reg_data & XEL_RSR_RECV_DONE_MASK) !=
411 XEL_RSR_RECV_DONE_MASK)
412 return 0; /* No data was available */
413 }
414
415 /* Get the protocol type of the ethernet frame that arrived */
416 proto_type = ((ntohl(xemaclite_readl(addr + XEL_HEADER_OFFSET +
417 XEL_RXBUFF_OFFSET)) >> XEL_HEADER_SHIFT) &
418 XEL_RPLR_LENGTH_MASK);
419
420 /* Check if received ethernet frame is a raw ethernet frame
421 * or an IP packet or an ARP packet */
422 if (proto_type > ETH_DATA_LEN) {
423
424 if (proto_type == ETH_P_IP) {
425 length = ((ntohl(xemaclite_readl(addr +
426 XEL_HEADER_IP_LENGTH_OFFSET +
427 XEL_RXBUFF_OFFSET)) >>
428 XEL_HEADER_SHIFT) &
429 XEL_RPLR_LENGTH_MASK);
430 length = min_t(u16, length, ETH_DATA_LEN);
431 length += ETH_HLEN + ETH_FCS_LEN;
432
433 } else if (proto_type == ETH_P_ARP)
434 length = XEL_ARP_PACKET_SIZE + ETH_HLEN + ETH_FCS_LEN;
435 else
436 /* Field contains type other than IP or ARP, use max
437 * frame size and let user parse it */
438 length = ETH_FRAME_LEN + ETH_FCS_LEN;
439 } else
440 /* Use the length in the frame, plus the header and trailer */
441 length = proto_type + ETH_HLEN + ETH_FCS_LEN;
442
443 if (WARN_ON(length > maxlen))
444 length = maxlen;
445
446 /* Read from the EmacLite device */
447 xemaclite_aligned_read((u32 __force *) (addr + XEL_RXBUFF_OFFSET),
448 data, length);
449
450 /* Acknowledge the frame */
451 reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET);
452 reg_data &= ~XEL_RSR_RECV_DONE_MASK;
453 xemaclite_writel(reg_data, addr + XEL_RSR_OFFSET);
454
455 return length;
456 }
457
458 /**
459 * xemaclite_update_address - Update the MAC address in the device
460 * @drvdata: Pointer to the Emaclite device private data
461 * @address_ptr:Pointer to the MAC address (MAC address is a 48-bit value)
462 *
463 * Tx must be idle and Rx should be idle for deterministic results.
464 * It is recommended that this function should be called after the
465 * initialization and before transmission of any packets from the device.
466 * The MAC address can be programmed using any of the two transmit
467 * buffers (if configured).
468 */
xemaclite_update_address(struct net_local * drvdata,u8 * address_ptr)469 static void xemaclite_update_address(struct net_local *drvdata,
470 u8 *address_ptr)
471 {
472 void __iomem *addr;
473 u32 reg_data;
474
475 /* Determine the expected Tx buffer address */
476 addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;
477
478 xemaclite_aligned_write(address_ptr, (u32 __force *) addr, ETH_ALEN);
479
480 xemaclite_writel(ETH_ALEN, addr + XEL_TPLR_OFFSET);
481
482 /* Update the MAC address in the EmacLite */
483 reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);
484 xemaclite_writel(reg_data | XEL_TSR_PROG_MAC_ADDR, addr + XEL_TSR_OFFSET);
485
486 /* Wait for EmacLite to finish with the MAC address update */
487 while ((xemaclite_readl(addr + XEL_TSR_OFFSET) &
488 XEL_TSR_PROG_MAC_ADDR) != 0)
489 ;
490 }
491
492 /**
493 * xemaclite_set_mac_address - Set the MAC address for this device
494 * @dev: Pointer to the network device instance
495 * @addr: Void pointer to the sockaddr structure
496 *
497 * This function copies the HW address from the sockaddr strucutre to the
498 * net_device structure and updates the address in HW.
499 *
500 * Return: Error if the net device is busy or 0 if the addr is set
501 * successfully
502 */
xemaclite_set_mac_address(struct net_device * dev,void * address)503 static int xemaclite_set_mac_address(struct net_device *dev, void *address)
504 {
505 struct net_local *lp = netdev_priv(dev);
506 struct sockaddr *addr = address;
507
508 if (netif_running(dev))
509 return -EBUSY;
510
511 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
512 xemaclite_update_address(lp, dev->dev_addr);
513 return 0;
514 }
515
516 /**
517 * xemaclite_tx_timeout - Callback for Tx Timeout
518 * @dev: Pointer to the network device
519 *
520 * This function is called when Tx time out occurs for Emaclite device.
521 */
xemaclite_tx_timeout(struct net_device * dev)522 static void xemaclite_tx_timeout(struct net_device *dev)
523 {
524 struct net_local *lp = netdev_priv(dev);
525 unsigned long flags;
526
527 dev_err(&lp->ndev->dev, "Exceeded transmit timeout of %lu ms\n",
528 TX_TIMEOUT * 1000UL / HZ);
529
530 dev->stats.tx_errors++;
531
532 /* Reset the device */
533 spin_lock_irqsave(&lp->reset_lock, flags);
534
535 /* Shouldn't really be necessary, but shouldn't hurt */
536 netif_stop_queue(dev);
537
538 xemaclite_disable_interrupts(lp);
539 xemaclite_enable_interrupts(lp);
540
541 if (lp->deferred_skb) {
542 dev_kfree_skb(lp->deferred_skb);
543 lp->deferred_skb = NULL;
544 dev->stats.tx_errors++;
545 }
546
547 /* To exclude tx timeout */
548 dev->trans_start = jiffies; /* prevent tx timeout */
549
550 /* We're all ready to go. Start the queue */
551 netif_wake_queue(dev);
552 spin_unlock_irqrestore(&lp->reset_lock, flags);
553 }
554
555 /**********************/
556 /* Interrupt Handlers */
557 /**********************/
558
559 /**
560 * xemaclite_tx_handler - Interrupt handler for frames sent
561 * @dev: Pointer to the network device
562 *
563 * This function updates the number of packets transmitted and handles the
564 * deferred skb, if there is one.
565 */
xemaclite_tx_handler(struct net_device * dev)566 static void xemaclite_tx_handler(struct net_device *dev)
567 {
568 struct net_local *lp = netdev_priv(dev);
569
570 dev->stats.tx_packets++;
571 if (lp->deferred_skb) {
572 if (xemaclite_send_data(lp,
573 (u8 *) lp->deferred_skb->data,
574 lp->deferred_skb->len) != 0)
575 return;
576 else {
577 dev->stats.tx_bytes += lp->deferred_skb->len;
578 dev_kfree_skb_irq(lp->deferred_skb);
579 lp->deferred_skb = NULL;
580 dev->trans_start = jiffies; /* prevent tx timeout */
581 netif_wake_queue(dev);
582 }
583 }
584 }
585
586 /**
587 * xemaclite_rx_handler- Interrupt handler for frames received
588 * @dev: Pointer to the network device
589 *
590 * This function allocates memory for a socket buffer, fills it with data
591 * received and hands it over to the TCP/IP stack.
592 */
xemaclite_rx_handler(struct net_device * dev)593 static void xemaclite_rx_handler(struct net_device *dev)
594 {
595 struct net_local *lp = netdev_priv(dev);
596 struct sk_buff *skb;
597 unsigned int align;
598 u32 len;
599
600 len = ETH_FRAME_LEN + ETH_FCS_LEN;
601 skb = netdev_alloc_skb(dev, len + ALIGNMENT);
602 if (!skb) {
603 /* Couldn't get memory. */
604 dev->stats.rx_dropped++;
605 dev_err(&lp->ndev->dev, "Could not allocate receive buffer\n");
606 return;
607 }
608
609 /*
610 * A new skb should have the data halfword aligned, but this code is
611 * here just in case that isn't true. Calculate how many
612 * bytes we should reserve to get the data to start on a word
613 * boundary */
614 align = BUFFER_ALIGN(skb->data);
615 if (align)
616 skb_reserve(skb, align);
617
618 skb_reserve(skb, 2);
619
620 len = xemaclite_recv_data(lp, (u8 *) skb->data, len);
621
622 if (!len) {
623 dev->stats.rx_errors++;
624 dev_kfree_skb_irq(skb);
625 return;
626 }
627
628 skb_put(skb, len); /* Tell the skb how much data we got */
629
630 skb->protocol = eth_type_trans(skb, dev);
631 skb_checksum_none_assert(skb);
632
633 dev->stats.rx_packets++;
634 dev->stats.rx_bytes += len;
635
636 if (!skb_defer_rx_timestamp(skb))
637 netif_rx(skb); /* Send the packet upstream */
638 }
639
640 /**
641 * xemaclite_interrupt - Interrupt handler for this driver
642 * @irq: Irq of the Emaclite device
643 * @dev_id: Void pointer to the network device instance used as callback
644 * reference
645 *
646 * This function handles the Tx and Rx interrupts of the EmacLite device.
647 */
xemaclite_interrupt(int irq,void * dev_id)648 static irqreturn_t xemaclite_interrupt(int irq, void *dev_id)
649 {
650 bool tx_complete = false;
651 struct net_device *dev = dev_id;
652 struct net_local *lp = netdev_priv(dev);
653 void __iomem *base_addr = lp->base_addr;
654 u32 tx_status;
655
656 /* Check if there is Rx Data available */
657 if ((xemaclite_readl(base_addr + XEL_RSR_OFFSET) &
658 XEL_RSR_RECV_DONE_MASK) ||
659 (xemaclite_readl(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET)
660 & XEL_RSR_RECV_DONE_MASK))
661
662 xemaclite_rx_handler(dev);
663
664 /* Check if the Transmission for the first buffer is completed */
665 tx_status = xemaclite_readl(base_addr + XEL_TSR_OFFSET);
666 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
667 (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
668
669 tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
670 xemaclite_writel(tx_status, base_addr + XEL_TSR_OFFSET);
671
672 tx_complete = true;
673 }
674
675 /* Check if the Transmission for the second buffer is completed */
676 tx_status = xemaclite_readl(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
677 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
678 (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
679
680 tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
681 xemaclite_writel(tx_status, base_addr + XEL_BUFFER_OFFSET +
682 XEL_TSR_OFFSET);
683
684 tx_complete = true;
685 }
686
687 /* If there was a Tx interrupt, call the Tx Handler */
688 if (tx_complete != 0)
689 xemaclite_tx_handler(dev);
690
691 return IRQ_HANDLED;
692 }
693
694 /**********************/
695 /* MDIO Bus functions */
696 /**********************/
697
698 /**
699 * xemaclite_mdio_wait - Wait for the MDIO to be ready to use
700 * @lp: Pointer to the Emaclite device private data
701 *
702 * This function waits till the device is ready to accept a new MDIO
703 * request.
704 *
705 * Return: 0 for success or ETIMEDOUT for a timeout
706 */
707
xemaclite_mdio_wait(struct net_local * lp)708 static int xemaclite_mdio_wait(struct net_local *lp)
709 {
710 unsigned long end = jiffies + 2;
711
712 /* wait for the MDIO interface to not be busy or timeout
713 after some time.
714 */
715 while (xemaclite_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET) &
716 XEL_MDIOCTRL_MDIOSTS_MASK) {
717 if (time_before_eq(end, jiffies)) {
718 WARN_ON(1);
719 return -ETIMEDOUT;
720 }
721 msleep(1);
722 }
723 return 0;
724 }
725
726 /**
727 * xemaclite_mdio_read - Read from a given MII management register
728 * @bus: the mii_bus struct
729 * @phy_id: the phy address
730 * @reg: register number to read from
731 *
732 * This function waits till the device is ready to accept a new MDIO
733 * request and then writes the phy address to the MDIO Address register
734 * and reads data from MDIO Read Data register, when its available.
735 *
736 * Return: Value read from the MII management register
737 */
xemaclite_mdio_read(struct mii_bus * bus,int phy_id,int reg)738 static int xemaclite_mdio_read(struct mii_bus *bus, int phy_id, int reg)
739 {
740 struct net_local *lp = bus->priv;
741 u32 ctrl_reg;
742 u32 rc;
743
744 if (xemaclite_mdio_wait(lp))
745 return -ETIMEDOUT;
746
747 /* Write the PHY address, register number and set the OP bit in the
748 * MDIO Address register. Set the Status bit in the MDIO Control
749 * register to start a MDIO read transaction.
750 */
751 ctrl_reg = xemaclite_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);
752 xemaclite_writel(XEL_MDIOADDR_OP_MASK |
753 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg),
754 lp->base_addr + XEL_MDIOADDR_OFFSET);
755 xemaclite_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK,
756 lp->base_addr + XEL_MDIOCTRL_OFFSET);
757
758 if (xemaclite_mdio_wait(lp))
759 return -ETIMEDOUT;
760
761 rc = xemaclite_readl(lp->base_addr + XEL_MDIORD_OFFSET);
762
763 dev_dbg(&lp->ndev->dev,
764 "xemaclite_mdio_read(phy_id=%i, reg=%x) == %x\n",
765 phy_id, reg, rc);
766
767 return rc;
768 }
769
770 /**
771 * xemaclite_mdio_write - Write to a given MII management register
772 * @bus: the mii_bus struct
773 * @phy_id: the phy address
774 * @reg: register number to write to
775 * @val: value to write to the register number specified by reg
776 *
777 * This function waits till the device is ready to accept a new MDIO
778 * request and then writes the val to the MDIO Write Data register.
779 */
xemaclite_mdio_write(struct mii_bus * bus,int phy_id,int reg,u16 val)780 static int xemaclite_mdio_write(struct mii_bus *bus, int phy_id, int reg,
781 u16 val)
782 {
783 struct net_local *lp = bus->priv;
784 u32 ctrl_reg;
785
786 dev_dbg(&lp->ndev->dev,
787 "xemaclite_mdio_write(phy_id=%i, reg=%x, val=%x)\n",
788 phy_id, reg, val);
789
790 if (xemaclite_mdio_wait(lp))
791 return -ETIMEDOUT;
792
793 /* Write the PHY address, register number and clear the OP bit in the
794 * MDIO Address register and then write the value into the MDIO Write
795 * Data register. Finally, set the Status bit in the MDIO Control
796 * register to start a MDIO write transaction.
797 */
798 ctrl_reg = xemaclite_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);
799 xemaclite_writel(~XEL_MDIOADDR_OP_MASK &
800 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg),
801 lp->base_addr + XEL_MDIOADDR_OFFSET);
802 xemaclite_writel(val, lp->base_addr + XEL_MDIOWR_OFFSET);
803 xemaclite_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK,
804 lp->base_addr + XEL_MDIOCTRL_OFFSET);
805
806 return 0;
807 }
808
809 /**
810 * xemaclite_mdio_setup - Register mii_bus for the Emaclite device
811 * @lp: Pointer to the Emaclite device private data
812 * @ofdev: Pointer to OF device structure
813 *
814 * This function enables MDIO bus in the Emaclite device and registers a
815 * mii_bus.
816 *
817 * Return: 0 upon success or a negative error upon failure
818 */
xemaclite_mdio_setup(struct net_local * lp,struct device * dev)819 static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
820 {
821 struct mii_bus *bus;
822 int rc;
823 struct resource res;
824 struct device_node *np = of_get_parent(lp->phy_node);
825 struct device_node *npp;
826
827 /* Don't register the MDIO bus if the phy_node or its parent node
828 * can't be found.
829 */
830 if (!np) {
831 dev_err(dev, "Failed to register mdio bus.\n");
832 return -ENODEV;
833 }
834 npp = of_get_parent(np);
835
836 of_address_to_resource(npp, 0, &res);
837 if (lp->ndev->mem_start != res.start) {
838 struct phy_device *phydev;
839 phydev = of_phy_find_device(lp->phy_node);
840 if (!phydev)
841 dev_info(dev,
842 "MDIO of the phy is not registered yet\n");
843 else
844 put_device(&phydev->dev);
845 return 0;
846 }
847
848 /* Enable the MDIO bus by asserting the enable bit in MDIO Control
849 * register.
850 */
851 xemaclite_writel(XEL_MDIOCTRL_MDIOEN_MASK,
852 lp->base_addr + XEL_MDIOCTRL_OFFSET);
853
854 bus = mdiobus_alloc();
855 if (!bus) {
856 dev_err(dev, "Failed to allocate mdiobus\n");
857 return -ENOMEM;
858 }
859
860 snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
861 (unsigned long long)res.start);
862 bus->priv = lp;
863 bus->name = "Xilinx Emaclite MDIO";
864 bus->read = xemaclite_mdio_read;
865 bus->write = xemaclite_mdio_write;
866 bus->parent = dev;
867 bus->irq = lp->mdio_irqs; /* preallocated IRQ table */
868
869 lp->mii_bus = bus;
870
871 rc = of_mdiobus_register(bus, np);
872 if (rc) {
873 dev_err(dev, "Failed to register mdio bus.\n");
874 goto err_register;
875 }
876
877 return 0;
878
879 err_register:
880 mdiobus_free(bus);
881 return rc;
882 }
883
884 /**
885 * xemaclite_adjust_link - Link state callback for the Emaclite device
886 * @ndev: pointer to net_device struct
887 *
888 * There's nothing in the Emaclite device to be configured when the link
889 * state changes. We just print the status.
890 */
xemaclite_adjust_link(struct net_device * ndev)891 static void xemaclite_adjust_link(struct net_device *ndev)
892 {
893 struct net_local *lp = netdev_priv(ndev);
894 struct phy_device *phy = lp->phy_dev;
895 int link_state;
896
897 /* hash together the state values to decide if something has changed */
898 link_state = phy->speed | (phy->duplex << 1) | phy->link;
899
900 if (lp->last_link != link_state) {
901 lp->last_link = link_state;
902 phy_print_status(phy);
903 }
904 }
905
906 /**
907 * xemaclite_open - Open the network device
908 * @dev: Pointer to the network device
909 *
910 * This function sets the MAC address, requests an IRQ and enables interrupts
911 * for the Emaclite device and starts the Tx queue.
912 * It also connects to the phy device, if MDIO is included in Emaclite device.
913 */
xemaclite_open(struct net_device * dev)914 static int xemaclite_open(struct net_device *dev)
915 {
916 struct net_local *lp = netdev_priv(dev);
917 int retval;
918
919 /* Just to be safe, stop the device first */
920 xemaclite_disable_interrupts(lp);
921
922 if (lp->phy_node) {
923 u32 bmcr;
924
925 lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
926 xemaclite_adjust_link, 0,
927 PHY_INTERFACE_MODE_MII);
928 if (!lp->phy_dev) {
929 dev_err(&lp->ndev->dev, "of_phy_connect() failed\n");
930 return -ENODEV;
931 }
932
933 /* EmacLite doesn't support giga-bit speeds */
934 lp->phy_dev->supported &= (PHY_BASIC_FEATURES);
935 lp->phy_dev->advertising = lp->phy_dev->supported;
936
937 /* Don't advertise 1000BASE-T Full/Half duplex speeds */
938 phy_write(lp->phy_dev, MII_CTRL1000, 0);
939
940 /* Advertise only 10 and 100mbps full/half duplex speeds */
941 phy_write(lp->phy_dev, MII_ADVERTISE, ADVERTISE_ALL |
942 ADVERTISE_CSMA);
943
944 /* Restart auto negotiation */
945 bmcr = phy_read(lp->phy_dev, MII_BMCR);
946 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
947 phy_write(lp->phy_dev, MII_BMCR, bmcr);
948
949 phy_start(lp->phy_dev);
950 }
951
952 /* Set the MAC address each time opened */
953 xemaclite_update_address(lp, dev->dev_addr);
954
955 /* Grab the IRQ */
956 retval = request_irq(dev->irq, xemaclite_interrupt, 0, dev->name, dev);
957 if (retval) {
958 dev_err(&lp->ndev->dev, "Could not allocate interrupt %d\n",
959 dev->irq);
960 if (lp->phy_dev)
961 phy_disconnect(lp->phy_dev);
962 lp->phy_dev = NULL;
963
964 return retval;
965 }
966
967 /* Enable Interrupts */
968 xemaclite_enable_interrupts(lp);
969
970 /* We're ready to go */
971 netif_start_queue(dev);
972
973 return 0;
974 }
975
976 /**
977 * xemaclite_close - Close the network device
978 * @dev: Pointer to the network device
979 *
980 * This function stops the Tx queue, disables interrupts and frees the IRQ for
981 * the Emaclite device.
982 * It also disconnects the phy device associated with the Emaclite device.
983 */
xemaclite_close(struct net_device * dev)984 static int xemaclite_close(struct net_device *dev)
985 {
986 struct net_local *lp = netdev_priv(dev);
987
988 netif_stop_queue(dev);
989 xemaclite_disable_interrupts(lp);
990 free_irq(dev->irq, dev);
991
992 if (lp->phy_dev)
993 phy_disconnect(lp->phy_dev);
994 lp->phy_dev = NULL;
995
996 return 0;
997 }
998
999 /**
1000 * xemaclite_send - Transmit a frame
1001 * @orig_skb: Pointer to the socket buffer to be transmitted
1002 * @dev: Pointer to the network device
1003 *
1004 * This function checks if the Tx buffer of the Emaclite device is free to send
1005 * data. If so, it fills the Tx buffer with data from socket buffer data,
1006 * updates the stats and frees the socket buffer. The Tx completion is signaled
1007 * by an interrupt. If the Tx buffer isn't free, then the socket buffer is
1008 * deferred and the Tx queue is stopped so that the deferred socket buffer can
1009 * be transmitted when the Emaclite device is free to transmit data.
1010 *
1011 * Return: NETDEV_TX_OK, always.
1012 */
1013 static netdev_tx_t
xemaclite_send(struct sk_buff * orig_skb,struct net_device * dev)1014 xemaclite_send(struct sk_buff *orig_skb, struct net_device *dev)
1015 {
1016 struct net_local *lp = netdev_priv(dev);
1017 struct sk_buff *new_skb;
1018 unsigned int len;
1019 unsigned long flags;
1020
1021 len = orig_skb->len;
1022
1023 new_skb = orig_skb;
1024
1025 spin_lock_irqsave(&lp->reset_lock, flags);
1026 if (xemaclite_send_data(lp, (u8 *) new_skb->data, len) != 0) {
1027 /* If the Emaclite Tx buffer is busy, stop the Tx queue and
1028 * defer the skb for transmission during the ISR, after the
1029 * current transmission is complete */
1030 netif_stop_queue(dev);
1031 lp->deferred_skb = new_skb;
1032 /* Take the time stamp now, since we can't do this in an ISR. */
1033 skb_tx_timestamp(new_skb);
1034 spin_unlock_irqrestore(&lp->reset_lock, flags);
1035 return NETDEV_TX_OK;
1036 }
1037 spin_unlock_irqrestore(&lp->reset_lock, flags);
1038
1039 skb_tx_timestamp(new_skb);
1040
1041 dev->stats.tx_bytes += len;
1042 dev_consume_skb_any(new_skb);
1043
1044 return NETDEV_TX_OK;
1045 }
1046
1047 /**
1048 * xemaclite_remove_ndev - Free the network device
1049 * @ndev: Pointer to the network device to be freed
1050 *
1051 * This function un maps the IO region of the Emaclite device and frees the net
1052 * device.
1053 */
xemaclite_remove_ndev(struct net_device * ndev)1054 static void xemaclite_remove_ndev(struct net_device *ndev)
1055 {
1056 if (ndev) {
1057 free_netdev(ndev);
1058 }
1059 }
1060
1061 /**
1062 * get_bool - Get a parameter from the OF device
1063 * @ofdev: Pointer to OF device structure
1064 * @s: Property to be retrieved
1065 *
1066 * This function looks for a property in the device node and returns the value
1067 * of the property if its found or 0 if the property is not found.
1068 *
1069 * Return: Value of the parameter if the parameter is found, or 0 otherwise
1070 */
get_bool(struct platform_device * ofdev,const char * s)1071 static bool get_bool(struct platform_device *ofdev, const char *s)
1072 {
1073 u32 *p = (u32 *)of_get_property(ofdev->dev.of_node, s, NULL);
1074
1075 if (p) {
1076 return (bool)*p;
1077 } else {
1078 dev_warn(&ofdev->dev, "Parameter %s not found,"
1079 "defaulting to false\n", s);
1080 return false;
1081 }
1082 }
1083
1084 static struct net_device_ops xemaclite_netdev_ops;
1085
1086 /**
1087 * xemaclite_of_probe - Probe method for the Emaclite device.
1088 * @ofdev: Pointer to OF device structure
1089 * @match: Pointer to the structure used for matching a device
1090 *
1091 * This function probes for the Emaclite device in the device tree.
1092 * It initializes the driver data structure and the hardware, sets the MAC
1093 * address and registers the network device.
1094 * It also registers a mii_bus for the Emaclite device, if MDIO is included
1095 * in the device.
1096 *
1097 * Return: 0, if the driver is bound to the Emaclite device, or
1098 * a negative error if there is failure.
1099 */
xemaclite_of_probe(struct platform_device * ofdev)1100 static int xemaclite_of_probe(struct platform_device *ofdev)
1101 {
1102 struct resource *res;
1103 struct net_device *ndev = NULL;
1104 struct net_local *lp = NULL;
1105 struct device *dev = &ofdev->dev;
1106 const void *mac_address;
1107
1108 int rc = 0;
1109
1110 dev_info(dev, "Device Tree Probing\n");
1111
1112 /* Create an ethernet device instance */
1113 ndev = alloc_etherdev(sizeof(struct net_local));
1114 if (!ndev)
1115 return -ENOMEM;
1116
1117 dev_set_drvdata(dev, ndev);
1118 SET_NETDEV_DEV(ndev, &ofdev->dev);
1119
1120 lp = netdev_priv(ndev);
1121 lp->ndev = ndev;
1122
1123 /* Get IRQ for the device */
1124 res = platform_get_resource(ofdev, IORESOURCE_IRQ, 0);
1125 if (!res) {
1126 dev_err(dev, "no IRQ found\n");
1127 rc = -ENXIO;
1128 goto error;
1129 }
1130
1131 ndev->irq = res->start;
1132
1133 res = platform_get_resource(ofdev, IORESOURCE_MEM, 0);
1134 lp->base_addr = devm_ioremap_resource(&ofdev->dev, res);
1135 if (IS_ERR(lp->base_addr)) {
1136 rc = PTR_ERR(lp->base_addr);
1137 goto error;
1138 }
1139
1140 ndev->mem_start = res->start;
1141 ndev->mem_end = res->end;
1142
1143 spin_lock_init(&lp->reset_lock);
1144 lp->next_tx_buf_to_use = 0x0;
1145 lp->next_rx_buf_to_use = 0x0;
1146 lp->tx_ping_pong = get_bool(ofdev, "xlnx,tx-ping-pong");
1147 lp->rx_ping_pong = get_bool(ofdev, "xlnx,rx-ping-pong");
1148 mac_address = of_get_mac_address(ofdev->dev.of_node);
1149
1150 if (mac_address)
1151 /* Set the MAC address. */
1152 memcpy(ndev->dev_addr, mac_address, ETH_ALEN);
1153 else
1154 dev_warn(dev, "No MAC address found\n");
1155
1156 /* Clear the Tx CSR's in case this is a restart */
1157 xemaclite_writel(0, lp->base_addr + XEL_TSR_OFFSET);
1158 xemaclite_writel(0, lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
1159
1160 /* Set the MAC address in the EmacLite device */
1161 xemaclite_update_address(lp, ndev->dev_addr);
1162
1163 lp->phy_node = of_parse_phandle(ofdev->dev.of_node, "phy-handle", 0);
1164 rc = xemaclite_mdio_setup(lp, &ofdev->dev);
1165 if (rc)
1166 dev_warn(&ofdev->dev, "error registering MDIO bus\n");
1167
1168 dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr);
1169
1170 ndev->netdev_ops = &xemaclite_netdev_ops;
1171 ndev->flags &= ~IFF_MULTICAST;
1172 ndev->watchdog_timeo = TX_TIMEOUT;
1173
1174 /* Finally, register the device */
1175 rc = register_netdev(ndev);
1176 if (rc) {
1177 dev_err(dev,
1178 "Cannot register network device, aborting\n");
1179 goto error;
1180 }
1181
1182 dev_info(dev,
1183 "Xilinx EmacLite at 0x%08X mapped to 0x%p, irq=%d\n",
1184 (unsigned int __force)ndev->mem_start, lp->base_addr, ndev->irq);
1185 return 0;
1186
1187 error:
1188 xemaclite_remove_ndev(ndev);
1189 return rc;
1190 }
1191
1192 /**
1193 * xemaclite_of_remove - Unbind the driver from the Emaclite device.
1194 * @of_dev: Pointer to OF device structure
1195 *
1196 * This function is called if a device is physically removed from the system or
1197 * if the driver module is being unloaded. It frees any resources allocated to
1198 * the device.
1199 *
1200 * Return: 0, always.
1201 */
xemaclite_of_remove(struct platform_device * of_dev)1202 static int xemaclite_of_remove(struct platform_device *of_dev)
1203 {
1204 struct net_device *ndev = platform_get_drvdata(of_dev);
1205
1206 struct net_local *lp = netdev_priv(ndev);
1207
1208 /* Un-register the mii_bus, if configured */
1209 if (lp->has_mdio) {
1210 mdiobus_unregister(lp->mii_bus);
1211 kfree(lp->mii_bus->irq);
1212 mdiobus_free(lp->mii_bus);
1213 lp->mii_bus = NULL;
1214 }
1215
1216 unregister_netdev(ndev);
1217
1218 of_node_put(lp->phy_node);
1219 lp->phy_node = NULL;
1220
1221 xemaclite_remove_ndev(ndev);
1222
1223 return 0;
1224 }
1225
1226 #ifdef CONFIG_NET_POLL_CONTROLLER
1227 static void
xemaclite_poll_controller(struct net_device * ndev)1228 xemaclite_poll_controller(struct net_device *ndev)
1229 {
1230 disable_irq(ndev->irq);
1231 xemaclite_interrupt(ndev->irq, ndev);
1232 enable_irq(ndev->irq);
1233 }
1234 #endif
1235
1236 static struct net_device_ops xemaclite_netdev_ops = {
1237 .ndo_open = xemaclite_open,
1238 .ndo_stop = xemaclite_close,
1239 .ndo_start_xmit = xemaclite_send,
1240 .ndo_set_mac_address = xemaclite_set_mac_address,
1241 .ndo_tx_timeout = xemaclite_tx_timeout,
1242 #ifdef CONFIG_NET_POLL_CONTROLLER
1243 .ndo_poll_controller = xemaclite_poll_controller,
1244 #endif
1245 };
1246
1247 /* Match table for OF platform binding */
1248 static const struct of_device_id xemaclite_of_match[] = {
1249 { .compatible = "xlnx,opb-ethernetlite-1.01.a", },
1250 { .compatible = "xlnx,opb-ethernetlite-1.01.b", },
1251 { .compatible = "xlnx,xps-ethernetlite-1.00.a", },
1252 { .compatible = "xlnx,xps-ethernetlite-2.00.a", },
1253 { .compatible = "xlnx,xps-ethernetlite-2.01.a", },
1254 { .compatible = "xlnx,xps-ethernetlite-3.00.a", },
1255 { /* end of list */ },
1256 };
1257 MODULE_DEVICE_TABLE(of, xemaclite_of_match);
1258
1259 static struct platform_driver xemaclite_of_driver = {
1260 .driver = {
1261 .name = DRIVER_NAME,
1262 .of_match_table = xemaclite_of_match,
1263 },
1264 .probe = xemaclite_of_probe,
1265 .remove = xemaclite_of_remove,
1266 };
1267
1268 module_platform_driver(xemaclite_of_driver);
1269
1270 MODULE_AUTHOR("Xilinx, Inc.");
1271 MODULE_DESCRIPTION("Xilinx Ethernet MAC Lite driver");
1272 MODULE_LICENSE("GPL");
1273