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Searched refs:to_i915 (Results 1 – 25 of 27) sorted by relevance

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/drivers/gpu/drm/i915/
Dintel_frontbuffer.c83 struct drm_i915_private *dev_priv = to_i915(dev); in intel_fb_obj_invalidate()
120 struct drm_i915_private *dev_priv = to_i915(dev); in intel_frontbuffer_flush()
149 struct drm_i915_private *dev_priv = to_i915(dev); in intel_fb_obj_flush()
186 struct drm_i915_private *dev_priv = to_i915(dev); in intel_frontbuffer_flip_prepare()
210 struct drm_i915_private *dev_priv = to_i915(dev); in intel_frontbuffer_flip_complete()
235 struct drm_i915_private *dev_priv = to_i915(dev); in intel_frontbuffer_flip()
Di915_gem_userptr.c77 struct drm_i915_private *dev_priv = to_i915(dev); in __cancel_userptr__worker()
284 mutex_lock(&to_i915(mm->dev)->mm_lock); in i915_mmu_notifier_find()
290 mutex_unlock(&to_i915(mm->dev)->mm_lock); in i915_mmu_notifier_find()
389 struct drm_i915_private *dev_priv = to_i915(obj->base.dev); in i915_gem_userptr_init__mm_struct()
448 mutex_unlock(&to_i915(mm->dev)->mm_lock); in __i915_mm_struct_free()
462 &to_i915(obj->base.dev)->mm_lock); in i915_gem_userptr_release__mm_struct()
610 &to_i915(dev)->mm.unbound_list); in __i915_gem_userptr_get_pages_worker()
901 struct drm_i915_private *dev_priv = to_i915(dev); in i915_gem_init_userptr()
Di915_vgpu.c63 struct drm_i915_private *dev_priv = to_i915(dev); in i915_check_vgpu()
183 struct drm_i915_private *dev_priv = to_i915(dev); in intel_vgt_balloon()
Di915_gem_debug.c37 struct drm_i915_private *dev_priv = to_i915(dev); in i915_verify_lists()
Di915_gem_context.c562 for_each_ring(signaller, to_i915(ring->dev), i) { in mi_set_context()
587 for_each_ring(signaller, to_i915(ring->dev), i) { in mi_set_context()
851 return i915.enable_execlists || to_i915(dev)->hw_context_size; in contexts_enabled()
Dintel_atomic.c286 intel_atomic_duplicate_dpll_state(to_i915(s->dev), in intel_atomic_get_shared_dpll_state()
Dintel_ringbuffer.c546 struct drm_i915_private *dev_priv = to_i915(ring->dev); in stop_ring()
1927 struct drm_i915_private *dev_priv = to_i915(ring->dev); in cleanup_phys_status_page()
2028 struct drm_i915_private *dev_priv = to_i915(dev); in intel_pin_and_map_ringbuffer_obj()
2061 struct drm_i915_private *dev_priv = to_i915(dev); in intel_alloc_ringbuffer_obj()
2187 dev_priv = to_i915(ring->dev); in intel_cleanup_ring_buffer()
2269 atomic_read(&to_i915(ring->dev)->gpu_error.reset_counter), in intel_ring_idle()
2270 to_i915(ring->dev)->mm.interruptible, in intel_ring_idle()
3063 if (ret && !i915_reset_in_progress(&to_i915(ring->dev)->gpu_error)) in intel_stop_ring_buffer()
Dintel_dp_mst.c416 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); in intel_connector_add_to_fbdev()
424 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); in intel_connector_remove_from_fbdev()
Di915_gem_shrinker.c181 if (to_i915(dev)->mm.shrinker_no_lock_stealing) in i915_gem_shrinker_lock()
Di915_gem.c2313 struct drm_i915_private *i915 = to_i915(obj->base.dev); in i915_gem_object_put_pages()
2540 &to_i915(obj->base.dev)->mm.bound_list); in i915_gem_object_retire__read()
2782 struct drm_i915_private *dev_priv = to_i915(ring->dev); in i915_gem_request_alloc()
3224 struct drm_i915_private *i915 = to_i915(obj->base.dev); in __i915_gem_object_sync()
3801 &to_i915(obj->base.dev)->gtt.base.inactive_list); in i915_gem_object_set_to_gtt_domain()
4240 to_i915(obj->base.dev)->gtt.mappable_end); in __i915_vma_set_map_and_fenceable()
4672 kmem_cache_free(to_i915(vma->obj->base.dev)->vmas, vma); in i915_gem_vma_destroy()
5165 spin_lock(&to_i915(dev)->rps.client_lock); in i915_gem_release()
5167 spin_unlock(&to_i915(dev)->rps.client_lock); in i915_gem_release()
Dintel_pm.c830 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in vlv_write_wm_values()
941 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in vlv_compute_wm_level()
1085 wm_state->num_levels = to_i915(dev)->wm.max_level + 1; in vlv_compute_wm()
1165 for (level = wm_state->num_levels; level < to_i915(dev)->wm.max_level + 1; level++) { in vlv_compute_wm()
1179 struct drm_i915_private *dev_priv = to_i915(dev); in vlv_pipe_set_fifo_size()
1269 wm->level = to_i915(dev)->wm.max_level; in vlv_merge_wm()
4011 struct drm_i915_private *dev_priv = to_i915(dev); in vlv_wm_get_hw_state()
6246 i915_rc6_ctx_wa_init(to_i915(dev)); in intel_init_gt_powersave()
6261 i915_rc6_ctx_wa_cleanup(to_i915(dev)); in intel_cleanup_gt_powersave()
6308 struct drm_i915_private *dev_priv = to_i915(dev); in intel_disable_rc6()
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Dintel_hdmi.c1336 struct drm_i915_private *dev_priv = to_i915(connector->dev); in intel_hdmi_set_edid()
1373 struct drm_i915_private *dev_priv = to_i915(connector->dev); in intel_hdmi_detect()
1622 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in chv_data_lane_soft_reset()
1744 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in chv_hdmi_post_pll_disable()
Di915_debugfs.c132 struct drm_i915_private *dev_priv = to_i915(obj->base.dev); in describe_obj()
153 i915_cache_level_str(to_i915(obj->base.dev), obj->cache_level), in describe_obj()
1057 ret = i915_error_state_buf_init(&error_str, to_i915(error_priv->dev), count, *pos); in i915_error_state_read()
4375 latencies = to_i915(dev)->wm.pri_latency; in pri_wm_latency_show()
4391 latencies = to_i915(dev)->wm.spr_latency; in spr_wm_latency_show()
4407 latencies = to_i915(dev)->wm.cur_latency; in cur_wm_latency_show()
4498 latencies = to_i915(dev)->wm.pri_latency; in pri_wm_latency_write()
4514 latencies = to_i915(dev)->wm.spr_latency; in spr_wm_latency_write()
4530 latencies = to_i915(dev)->wm.cur_latency; in cur_wm_latency_write()
Dintel_dvo.c207 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq; in intel_dvo_mode_valid()
Di915_irq.c1810 struct drm_i915_private *dev_priv = to_i915(dev); in ibx_hpd_irq_handler()
1995 struct drm_i915_private *dev_priv = to_i915(dev); in ilk_hpd_irq_handler()
2184 struct drm_i915_private *dev_priv = to_i915(dev); in bxt_hpd_irq_handler()
2392 struct drm_i915_private *dev_priv = to_i915(dev); in i915_reset_and_wakeup()
3053 struct i915_gpu_error *e = &to_i915(dev)->gpu_error; in i915_queue_hangcheck()
3227 struct drm_i915_private *dev_priv = to_i915(dev); in intel_hpd_enabled_irqs()
Dintel_dp.c2403 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in chv_data_lane_soft_reset()
2980 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in chv_dp_post_pll_disable()
3601 to_i915(intel_dig_port->base.base.dev); in intel_dp_set_link_train()
3642 to_i915(intel_dig_port->base.base.dev); in intel_dp_update_link_train()
4768 intel_display_power_get(to_i915(dev), power_domain); in intel_dp_detect()
4813 intel_display_power_put(to_i915(dev), power_domain); in intel_dp_detect()
4822 struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev); in intel_dp_force()
5061 struct drm_i915_private *dev_priv = to_i915(encoder->dev); in intel_dp_encoder_reset()
Di915_drv.h1974 static inline struct drm_i915_private *to_i915(const struct drm_device *dev) in to_i915() function
1981 return to_i915(dev_get_drvdata(dev)); in dev_to_i915()
2449 __p = to_i915((struct drm_device *)p); \
2766 return to_i915(dev)->vgpu.active; in intel_vgpu_active()
Dintel_display.c2532 struct drm_i915_private *dev_priv = to_i915(dev); in intel_alloc_initial_plane_obj()
3262 struct drm_i915_private *dev_priv = to_i915(dev); in intel_finish_reset()
3315 struct drm_i915_private *dev_priv = to_i915(obj->base.dev); in intel_finish_fb()
3936 struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); in page_flip_completed()
4344 struct drm_i915_private *dev_priv = to_i915(state->dev); in intel_shared_dpll_commit()
6140 struct drm_i915_private *dev_priv = to_i915(dev); in valleyview_crtc_enable()
6212 struct drm_i915_private *dev_priv = to_i915(dev); in i9xx_crtc_enable()
6319 struct drm_i915_private *dev_priv = to_i915(crtc->dev); in intel_crtc_disable_noatomic()
6703 struct drm_i915_private *dev_priv = to_i915(dev); in skylake_get_display_clock_speed()
6750 struct drm_i915_private *dev_priv = to_i915(dev); in broxton_get_display_clock_speed()
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Di915_gem_execbuffer.c1078 struct drm_i915_private *dev_priv = to_i915(ring->dev); in i915_gem_execbuffer_move_to_active()
1129 struct drm_i915_private *dev_priv = to_i915(obj->base.dev); in shadow_batch_pin()
Dintel_fbdev.c124 struct drm_i915_private *dev_priv = to_i915(dev); in intelfb_alloc()
Di915_sysfs.c533 ret = i915_error_state_buf_init(&error_str, to_i915(dev), count, off); in error_state_read()
Dintel_lvds.c287 int max_pixclk = to_i915(connector->dev)->max_dotclk_freq; in intel_lvds_mode_valid()
Dintel_dsi.c725 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq; in intel_dsi_mode_valid()
Dintel_uncore.c1539 struct drm_i915_private *dev_priv = to_i915(dev); in intel_gpu_reset()
Di915_gem_gtt.c1694 struct drm_i915_private *dev_priv = to_i915(ppgtt->base.dev); in vgpu_mm_switch()
3234 vma = kmem_cache_zalloc(to_i915(obj->base.dev)->vmas, GFP_KERNEL); in __i915_gem_vma_create()

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