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Searched refs:v3 (Results 1 – 25 of 33) sorted by relevance

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/drivers/char/mwave/
Dmwavedd.h89 #define PRINTK_4(f,s,v1,v2,v3) \ argument
91 printk(s,v1,v2,v3); \
94 #define PRINTK_5(f,s,v1,v2,v3,v4) \ argument
96 printk(s,v1,v2,v3,v4); \
99 #define PRINTK_6(f,s,v1,v2,v3,v4,v5) \ argument
101 printk(s,v1,v2,v3,v4,v5); \
104 #define PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) \ argument
106 printk(s,v1,v2,v3,v4,v5,v6); \
109 #define PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7) \ argument
111 printk(s,v1,v2,v3,v4,v5,v6,v7); \
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/drivers/gpu/drm/amd/amdgpu/
Datombios_crtc.c237 ENABLE_SPREAD_SPECTRUM_ON_PPLL_V3 v3; member
277 args.v3.usSpreadSpectrumAmountFrac = cpu_to_le16(0); in amdgpu_atombios_crtc_program_ss()
278 args.v3.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK; in amdgpu_atombios_crtc_program_ss()
281 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P1PLL; in amdgpu_atombios_crtc_program_ss()
284 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P2PLL; in amdgpu_atombios_crtc_program_ss()
287 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_DCPLL; in amdgpu_atombios_crtc_program_ss()
292 args.v3.usSpreadSpectrumAmount = cpu_to_le16(ss->amount); in amdgpu_atombios_crtc_program_ss()
293 args.v3.usSpreadSpectrumStep = cpu_to_le16(ss->step); in amdgpu_atombios_crtc_program_ss()
294 args.v3.ucEnable = enable; in amdgpu_atombios_crtc_program_ss()
301 ADJUST_DISPLAY_PLL_PS_ALLOCATION_V3 v3; member
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Datombios_encoders.c569 DIG_ENCODER_CONTROL_PARAMETERS_V3 v3; member
615 args.v3.ucPanelMode = panel_mode; in amdgpu_atombios_encoder_setup_dig_encoder()
647 args.v3.ucAction = action; in amdgpu_atombios_encoder_setup_dig_encoder()
648 args.v3.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_encoder()
650 args.v3.ucPanelMode = panel_mode; in amdgpu_atombios_encoder_setup_dig_encoder()
652 args.v3.ucEncoderMode = amdgpu_atombios_encoder_get_encoder_mode(encoder); in amdgpu_atombios_encoder_setup_dig_encoder()
654 if (ENCODER_MODE_IS_DP(args.v3.ucEncoderMode)) in amdgpu_atombios_encoder_setup_dig_encoder()
655 args.v3.ucLaneNum = dp_lane_count; in amdgpu_atombios_encoder_setup_dig_encoder()
657 args.v3.ucLaneNum = 8; in amdgpu_atombios_encoder_setup_dig_encoder()
659 args.v3.ucLaneNum = 4; in amdgpu_atombios_encoder_setup_dig_encoder()
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Damdgpu_atombios.c804 struct _ATOM_ASIC_SS_ASSIGNMENT_V3 v3; member
882 if ((ss_assign->v3.ucClockIndication == id) && in amdgpu_atombios_get_asic_ss_info()
883 (clock <= le32_to_cpu(ss_assign->v3.ulTargetClockRange))) { in amdgpu_atombios_get_asic_ss_info()
885 le16_to_cpu(ss_assign->v3.usSpreadSpectrumPercentage); in amdgpu_atombios_get_asic_ss_info()
886 ss->type = ss_assign->v3.ucSpreadSpectrumMode; in amdgpu_atombios_get_asic_ss_info()
887 ss->rate = le16_to_cpu(ss_assign->v3.usSpreadRateIn10Hz); in amdgpu_atombios_get_asic_ss_info()
888 if (ss_assign->v3.ucSpreadSpectrumMode & in amdgpu_atombios_get_asic_ss_info()
916 struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V3 v3; member
1088 struct _SET_VOLTAGE_PARAMETERS_V1_3 v3; member
1118 args.v3.ucVoltageType = voltage_type; in amdgpu_atombios_set_voltage()
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/drivers/clocksource/
Dacpi_pm.c43 u32 v1 = 0, v2 = 0, v3 = 0; in acpi_pm_read_verified() local
54 v3 = read_pmtmr(); in acpi_pm_read_verified()
55 } while (unlikely((v1 > v2 && v1 < v3) || (v2 > v3 && v2 < v1) in acpi_pm_read_verified()
56 || (v3 > v1 && v3 < v2))); in acpi_pm_read_verified()
Dh8300_tpu.c55 unsigned long v1, v2, v3; in tpu_get_counter() local
65 v3 = read_tcnt32(p); in tpu_get_counter()
67 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) in tpu_get_counter()
68 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); in tpu_get_counter()
Dh8300_timer16.c69 unsigned long v1, v2, v3; in timer16_get_counter() local
79 v3 = ctrl_inw(p->mapbase + TCNT); in timer16_get_counter()
81 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) in timer16_get_counter()
82 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); in timer16_get_counter()
Dh8300_timer8.c56 unsigned long v1, v2, v3; in timer8_get_counter() local
66 v3 = ctrl_inw(p->mapbase + _8TCNT); in timer8_get_counter()
68 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) in timer8_get_counter()
69 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); in timer8_get_counter()
Dsh_cmt.c287 unsigned long v1, v2, v3; in sh_cmt_get_counter() local
297 v3 = sh_cmt_read_cmcnt(ch); in sh_cmt_get_counter()
299 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) in sh_cmt_get_counter()
300 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); in sh_cmt_get_counter()
/drivers/gpu/drm/radeon/
Datombios_encoders.c836 DIG_ENCODER_CONTROL_PARAMETERS_V3 v3; member
890 args.v3.ucPanelMode = panel_mode; in atombios_dig_encoder_setup2()
924 args.v3.ucAction = action; in atombios_dig_encoder_setup2()
925 args.v3.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dig_encoder_setup2()
927 args.v3.ucPanelMode = panel_mode; in atombios_dig_encoder_setup2()
929 args.v3.ucEncoderMode = atombios_get_encoder_mode(encoder); in atombios_dig_encoder_setup2()
931 if (ENCODER_MODE_IS_DP(args.v3.ucEncoderMode)) in atombios_dig_encoder_setup2()
932 args.v3.ucLaneNum = dp_lane_count; in atombios_dig_encoder_setup2()
934 args.v3.ucLaneNum = 8; in atombios_dig_encoder_setup2()
936 args.v3.ucLaneNum = 4; in atombios_dig_encoder_setup2()
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Datombios_crtc.c437 ENABLE_SPREAD_SPECTRUM_ON_PPLL_V3 v3; member
478 args.v3.usSpreadSpectrumAmountFrac = cpu_to_le16(0); in atombios_crtc_program_ss()
479 args.v3.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK; in atombios_crtc_program_ss()
482 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P1PLL; in atombios_crtc_program_ss()
485 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P2PLL; in atombios_crtc_program_ss()
488 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_DCPLL; in atombios_crtc_program_ss()
493 args.v3.usSpreadSpectrumAmount = cpu_to_le16(ss->amount); in atombios_crtc_program_ss()
494 args.v3.usSpreadSpectrumStep = cpu_to_le16(ss->step); in atombios_crtc_program_ss()
495 args.v3.ucEnable = enable; in atombios_crtc_program_ss()
551 ADJUST_DISPLAY_PLL_PS_ALLOCATION_V3 v3; member
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Dradeon_atombios.c1511 struct _ATOM_ASIC_SS_ASSIGNMENT_V3 v3; member
1589 if ((ss_assign->v3.ucClockIndication == id) && in radeon_atombios_get_asic_ss_info()
1590 (clock <= le32_to_cpu(ss_assign->v3.ulTargetClockRange))) { in radeon_atombios_get_asic_ss_info()
1592 le16_to_cpu(ss_assign->v3.usSpreadSpectrumPercentage); in radeon_atombios_get_asic_ss_info()
1593 ss->type = ss_assign->v3.ucSpreadSpectrumMode; in radeon_atombios_get_asic_ss_info()
1594 ss->rate = le16_to_cpu(ss_assign->v3.usSpreadRateIn10Hz); in radeon_atombios_get_asic_ss_info()
1595 if (ss_assign->v3.ucSpreadSpectrumMode & in radeon_atombios_get_asic_ss_info()
2817 struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V3 v3; member
2873 args.v3.ulClockParams = cpu_to_le32((clock_type << 24) | clock); in radeon_atom_get_clock_dividers()
2877 dividers->post_div = args.v3.ucPostDiv; in radeon_atom_get_clock_dividers()
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/drivers/irqchip/
DMakefile25 obj-$(CONFIG_ARM_GIC_V3) += irq-gic-v3.o irq-gic-common.o
26 obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-pci-msi.o irq-gic-v3-its-platform-…
/drivers/gpu/ipu-v3/
DMakefile1 obj-$(CONFIG_IMX_IPUV3_CORE) += imx-ipu-v3.o
3 imx-ipu-v3-objs := ipu-common.o ipu-cpmem.o ipu-csi.o ipu-dc.o ipu-di.o \
/drivers/net/wireless/realtek/rtl818x/
DKconfig16 Belkin F5D6020 v3
17 Belkin F5D6020 v3
77 (v1 = rt73usb; v3 is rt2070-based,
/drivers/gpu/
DMakefile6 obj-$(CONFIG_IMX_IPUV3_CORE) += ipu-v3/
/drivers/video/fbdev/sis/
Dsis_main.c4310 u8 reg, v1, v2, v3, v4, v5, v6, v7, v8; in sisfb_post_sis300() local
4328 v3 = 0x80; v6 = 0x80; in sisfb_post_sis300()
4340 v3 = bios[rindex++]; in sisfb_post_sis300()
4349 SiS_SetReg(SISSR, 0x2a, v3); in sisfb_post_sis300()
4361 v1 = 0x01; v2 = 0x43; v3 = 0x1e; v4 = 0x2a; in sisfb_post_sis300()
4367 v3 = bios[memtype + 16]; in sisfb_post_sis300()
4375 v3 &= 0xfd; in sisfb_post_sis300()
4378 SiS_SetReg(SISSR, 0x17, v3); in sisfb_post_sis300()
4396 v1 = 0xf6; v2 = 0x0d; v3 = 0x00; in sisfb_post_sis300()
4400 v3 = bios[0xea]; in sisfb_post_sis300()
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/drivers/video/
DKconfig23 source "drivers/gpu/ipu-v3/Kconfig"
/drivers/staging/rtl8188eu/hal/
Dbb_cfg.c586 u32 v3 = array[i + 2]; in config_bb_with_pgheader() local
589 rtl_addr_delay(adapt, v1, v2, v3); in config_bb_with_pgheader()
/drivers/iommu/
DMakefile13 obj-$(CONFIG_ARM_SMMU_V3) += arm-smmu-v3.o
/drivers/net/ethernet/chelsio/cxgb3/
Dmc5.c101 u32 v3) in dbgi_wr_data3() argument
105 t3_write_reg(adapter, A_MC5_DB_DBGI_REQ_DATA2, v3); in dbgi_wr_data3()
/drivers/net/wireless/b43legacy/
Dphy.c1784 s8 v3; in b43legacy_phy_xmitpower() local
1812 v3 = (s8)((tmp & 0xFF00) >> 8); in b43legacy_phy_xmitpower()
1815 if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) { in b43legacy_phy_xmitpower()
1823 v3 = (s8)((tmp & 0xFF00) >> 8); in b43legacy_phy_xmitpower()
1824 if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) in b43legacy_phy_xmitpower()
1829 v3 = (v3 + 0x20) & 0x3F; in b43legacy_phy_xmitpower()
1834 average = (v0 + v1 + v2 + v3 + 2) / 4; in b43legacy_phy_xmitpower()
Dmain.c439 u16 v3; in b43legacy_tsf_read() local
445 v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3); in b43legacy_tsf_read()
453 } while (v3 != test3 || v2 != test2 || v1 != test1); in b43legacy_tsf_read()
455 *tsf = v3; in b43legacy_tsf_read()
507 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48; in b43legacy_tsf_write_locked() local
511 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3); in b43legacy_tsf_write_locked()
/drivers/spi/
DMakefile23 obj-$(CONFIG_SPI_ADI_V3) += spi-adi-v3.o
/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/
Dphy.c674 u32 v1 = 0, v2 = 0, v3 = 0; in phy_config_bb_with_pghdr() local
683 v3 = phy_reg_page[i+2]; in phy_config_bb_with_pghdr()
714 v3 = phy_reg_page[i+2]; in phy_config_bb_with_pghdr()
720 v3 = phy_reg_page[i+2]; in phy_config_bb_with_pghdr()

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