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Searched refs:SST_VDRTCTL2 (Results 1 – 2 of 2) sorted by relevance

/sound/soc/intel/haswell/
Dsst-haswell-dsp.c256 reg = readl(sst->addr.pci_cfg + SST_VDRTCTL2); in hsw_set_dsp_D3()
258 writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2); in hsw_set_dsp_D3()
268 val = readl(sst->addr.pci_cfg + SST_VDRTCTL2); in hsw_set_dsp_D3()
270 writel(val, sst->addr.pci_cfg + SST_VDRTCTL2); in hsw_set_dsp_D3()
283 reg = readl(sst->addr.pci_cfg + SST_VDRTCTL2); in hsw_set_dsp_D3()
285 writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2); in hsw_set_dsp_D3()
312 reg = readl(sst->addr.pci_cfg + SST_VDRTCTL2); in hsw_set_dsp_D0()
314 writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2); in hsw_set_dsp_D0()
356 reg = readl(sst->addr.pci_cfg + SST_VDRTCTL2); in hsw_set_dsp_D0()
358 writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2); in hsw_set_dsp_D0()
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/sound/soc/intel/common/
Dsst-dsp.h157 #define SST_VDRTCTL2 0xa8 macro