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Searched refs:val (Results 1 – 8 of 8) sorted by relevance

/virt/kvm/arm/
Dvgic-v3.c50 u64 val = vcpu->arch.vgic_cpu.vgic_v3.vgic_lr[LR_INDEX(lr)]; in vgic_v3_get_lr() local
53 lr_desc.irq = val & ICH_LR_VIRTUALID_MASK; in vgic_v3_get_lr()
55 lr_desc.irq = val & GICH_LR_VIRTUALID; in vgic_v3_get_lr()
60 lr_desc.source = (val >> GICH_LR_PHYSID_CPUID_SHIFT) & 0x7; in vgic_v3_get_lr()
64 if (val & ICH_LR_PENDING_BIT) in vgic_v3_get_lr()
66 if (val & ICH_LR_ACTIVE_BIT) in vgic_v3_get_lr()
68 if (val & ICH_LR_EOI) in vgic_v3_get_lr()
70 if (val & ICH_LR_HW) { in vgic_v3_get_lr()
72 lr_desc.hwirq = (val >> ICH_LR_PHYS_ID_SHIFT) & GENMASK(9, 0); in vgic_v3_get_lr()
Dvgic-v2.c36 u32 val = vcpu->arch.vgic_cpu.vgic_v2.vgic_lr[lr]; in vgic_v2_get_lr() local
38 lr_desc.irq = val & GICH_LR_VIRTUALID; in vgic_v2_get_lr()
40 lr_desc.source = (val >> GICH_LR_PHYSID_CPUID_SHIFT) & 0x7; in vgic_v2_get_lr()
45 if (val & GICH_LR_PENDING_BIT) in vgic_v2_get_lr()
47 if (val & GICH_LR_ACTIVE_BIT) in vgic_v2_get_lr()
49 if (val & GICH_LR_EOI) in vgic_v2_get_lr()
51 if (val & GICH_LR_HW) { in vgic_v2_get_lr()
53 lr_desc.hwirq = (val & GICH_LR_PHYSID_CPUID) >> GICH_LR_PHYSID_CPUID_SHIFT; in vgic_v2_get_lr()
Dvgic.c180 static unsigned long *u64_to_bitmask(u64 *val) in u64_to_bitmask() argument
183 *val = (*val >> 32) | (*val << 32); in u64_to_bitmask()
185 return (unsigned long *)val; in u64_to_bitmask()
207 int irq, int val) in vgic_bitmap_set_irq_val() argument
218 if (val) in vgic_bitmap_set_irq_val()
618 static u32 vgic_cfg_expand(u16 val) in vgic_cfg_expand() argument
628 res |= ((val >> i) & VGIC_CFG_EDGE) << (2 * i + 1); in vgic_cfg_expand()
633 static u16 vgic_cfg_compress(u32 val) in vgic_cfg_compress() argument
643 res |= ((val >> (i * 2 + 1)) & VGIC_CFG_EDGE) << i; in vgic_cfg_compress()
656 u32 val; in vgic_handle_cfg_reg() local
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Dvgic-v2-emul.c144 u32 val = 0; in vgic_get_target_reg() local
149 val |= 1 << (dist->irq_spi_cpu[irq + i] + i * 8); in vgic_get_target_reg()
151 return val; in vgic_get_target_reg()
154 static void vgic_set_target_reg(struct kvm *kvm, u32 val, int irq) in vgic_set_target_reg() argument
172 target = ffs((val >> shift) & 0xffU); in vgic_set_target_reg()
Dvgic.h54 int irq, int val);
/virt/kvm/
Dkvm_main.c1964 int old, val; in grow_halt_poll_ns() local
1966 old = val = vcpu->halt_poll_ns; in grow_halt_poll_ns()
1968 if (val == 0 && halt_poll_ns_grow) in grow_halt_poll_ns()
1969 val = 10000; in grow_halt_poll_ns()
1971 val *= halt_poll_ns_grow; in grow_halt_poll_ns()
1973 if (val > halt_poll_ns) in grow_halt_poll_ns()
1974 val = halt_poll_ns; in grow_halt_poll_ns()
1976 vcpu->halt_poll_ns = val; in grow_halt_poll_ns()
1977 trace_kvm_halt_poll_ns_grow(vcpu->vcpu_id, val, old); in grow_halt_poll_ns()
1982 int old, val; in shrink_halt_poll_ns() local
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Deventfd.c683 ioeventfd_in_range(struct _ioeventfd *p, gpa_t addr, int len, const void *val) in ioeventfd_in_range() argument
705 BUG_ON(!IS_ALIGNED((unsigned long)val, len)); in ioeventfd_in_range()
709 _val = *(u8 *)val; in ioeventfd_in_range()
712 _val = *(u16 *)val; in ioeventfd_in_range()
715 _val = *(u32 *)val; in ioeventfd_in_range()
718 _val = *(u64 *)val; in ioeventfd_in_range()
730 int len, const void *val) in ioeventfd_write() argument
734 if (!ioeventfd_in_range(p, addr, len, val)) in ioeventfd_write()
Dcoalesced_mmio.c65 int len, const void *val) in coalesced_mmio_write() argument
87 memcpy(ring->coalesced_mmio[insert].data, val, len); in coalesced_mmio_write()