| /drivers/staging/rtl8723au/hal/ |
| D | HalHWImg8723A_BB.c | 211 #define READ_NEXT_PAIR(v1, v2, i) \ argument
213 i += 2; v1 = Array[i]; v2 = Array[i+1]; \
231 u32 v2 = Array[i+1]; in ODM_ReadAndConfig_AGC_TAB_1T_8723A() local
235 odm_ConfigBB_AGC_8723A(pDM_Odm, v1, v2); in ODM_ReadAndConfig_AGC_TAB_1T_8723A()
240 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_AGC_TAB_1T_8723A()
241 while (v2 != 0xDEAD && in ODM_ReadAndConfig_AGC_TAB_1T_8723A()
242 v2 != 0xCDEF && in ODM_ReadAndConfig_AGC_TAB_1T_8723A()
243 v2 != 0xCDCD && i < ArrayLen - 2) in ODM_ReadAndConfig_AGC_TAB_1T_8723A()
244 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_AGC_TAB_1T_8723A()
249 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_AGC_TAB_1T_8723A()
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| D | HalHWImg8723A_RF.c | 209 #define READ_NEXT_PAIR(v1, v2, i) \ in ODM_ReadAndConfig_RadioA_1T_8723A() argument
211 i += 2; v1 = Array[i]; v2 = Array[i+1];\ in ODM_ReadAndConfig_RadioA_1T_8723A()
228 u32 v2 = Array[i+1]; in ODM_ReadAndConfig_RadioA_1T_8723A() local
232 odm_ConfigRFReg_8723A(pDM_Odm, v1, v2, RF_PATH_A, v1); in ODM_ReadAndConfig_RadioA_1T_8723A()
237 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_RadioA_1T_8723A()
238 while (v2 != 0xDEAD && in ODM_ReadAndConfig_RadioA_1T_8723A()
239 v2 != 0xCDEF && in ODM_ReadAndConfig_RadioA_1T_8723A()
240 v2 != 0xCDCD && i < ArrayLen - 2) in ODM_ReadAndConfig_RadioA_1T_8723A()
241 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_RadioA_1T_8723A()
245 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_RadioA_1T_8723A()
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| D | HalHWImg8723A_MAC.c | 139 #define READ_NEXT_PAIR(v1, v2, i) \ in ODM_ReadAndConfig_MAC_REG_8723A() argument
141 i += 2; v1 = Array[i]; v2 = Array[i+1]; \ in ODM_ReadAndConfig_MAC_REG_8723A()
157 u32 v2 = Array[i+1]; in ODM_ReadAndConfig_MAC_REG_8723A() local
161 odm_ConfigMAC_8723A(pDM_Odm, v1, (u8)v2); in ODM_ReadAndConfig_MAC_REG_8723A()
166 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MAC_REG_8723A()
167 while (v2 != 0xDEAD && in ODM_ReadAndConfig_MAC_REG_8723A()
168 v2 != 0xCDEF && in ODM_ReadAndConfig_MAC_REG_8723A()
169 v2 != 0xCDCD && i < ArrayLen - 2) in ODM_ReadAndConfig_MAC_REG_8723A()
170 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MAC_REG_8723A()
174 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MAC_REG_8723A()
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| /drivers/char/mwave/ |
| D | mwavedd.h | 84 #define PRINTK_3(f,s,v1,v2) \ argument
86 printk(s,v1,v2); \
89 #define PRINTK_4(f,s,v1,v2,v3) \ argument
91 printk(s,v1,v2,v3); \
94 #define PRINTK_5(f,s,v1,v2,v3,v4) \ argument
96 printk(s,v1,v2,v3,v4); \
99 #define PRINTK_6(f,s,v1,v2,v3,v4,v5) \ argument
101 printk(s,v1,v2,v3,v4,v5); \
104 #define PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) \ argument
106 printk(s,v1,v2,v3,v4,v5,v6); \
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| /drivers/staging/rtl8188eu/hal/ |
| D | rf_cfg.c | 156 #define READ_NEXT_PAIR(v1, v2, i) \ argument
159 v2 = array[i+1]; \
206 u32 v2 = array[i+1]; in rtl88e_phy_config_rf_with_headerfile() local
209 rtl8188e_config_rf_reg(adapt, v1, v2); in rtl88e_phy_config_rf_with_headerfile()
213 READ_NEXT_PAIR(v1, v2, i); in rtl88e_phy_config_rf_with_headerfile()
214 while (v2 != 0xDEAD && v2 != 0xCDEF && in rtl88e_phy_config_rf_with_headerfile()
215 v2 != 0xCDCD && i < array_len - 2) in rtl88e_phy_config_rf_with_headerfile()
216 READ_NEXT_PAIR(v1, v2, i); in rtl88e_phy_config_rf_with_headerfile()
219 READ_NEXT_PAIR(v1, v2, i); in rtl88e_phy_config_rf_with_headerfile()
220 while (v2 != 0xDEAD && v2 != 0xCDEF && in rtl88e_phy_config_rf_with_headerfile()
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| D | bb_cfg.c | 166 u32 v2 = array[i + 1]; in set_baseband_agc_config() local
169 phy_set_bb_reg(adapt, v1, bMaskDWord, v2); in set_baseband_agc_config()
401 u32 v2 = array[i + 1]; in set_baseband_phy_config() local
404 rtl_bb_delay(adapt, v1, v2); in set_baseband_phy_config()
585 u32 v2 = array[i + 1]; in config_bb_with_pgheader() local
589 rtl_addr_delay(adapt, v1, v2, v3); in config_bb_with_pgheader()
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| /drivers/firmware/google/ |
| D | memconsole.c | 41 } __packed v2; member
89 hdr->v2.buffer_addr, hdr->v2.start, in found_v2_header()
90 hdr->v2.end, hdr->v2.num_bytes); in found_v2_header()
92 memconsole_length = hdr->v2.end - hdr->v2.start; in found_v2_header()
93 memconsole_baseaddr = hdr->v2.buffer_addr + hdr->v2.start; in found_v2_header()
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| /drivers/staging/lustre/include/linux/libcfs/ |
| D | libcfs_private.h | 263 #define LASSERT_ATOMIC_GT_LT(a, v1, v2) \ argument
266 LASSERTF(__v > v1 && __v < v2, "value: %d\n", __v); \
270 #define LASSERT_ATOMIC_GT_LE(a, v1, v2) \ argument
273 LASSERTF(__v > v1 && __v <= v2, "value: %d\n", __v); \
277 #define LASSERT_ATOMIC_GE_LT(a, v1, v2) \ argument
280 LASSERTF(__v >= v1 && __v < v2, "value: %d\n", __v); \
284 #define LASSERT_ATOMIC_GE_LE(a, v1, v2) \ argument
287 LASSERTF(__v >= v1 && __v <= v2, "value: %d\n", __v); \
298 #define LASSERT_ATOMIC_GT_LT(a, v1, v2) do {} while (0) argument
299 #define LASSERT_ATOMIC_GT_LE(a, v1, v2) do {} while (0) argument
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| /drivers/clocksource/ |
| D | acpi_pm.c | 43 u32 v1 = 0, v2 = 0, v3 = 0; in acpi_pm_read_verified() local
53 v2 = read_pmtmr(); in acpi_pm_read_verified()
55 } while (unlikely((v1 > v2 && v1 < v3) || (v2 > v3 && v2 < v1) in acpi_pm_read_verified()
56 || (v3 > v1 && v3 < v2))); in acpi_pm_read_verified()
58 return v2; in acpi_pm_read_verified()
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| D | h8300_timer16.c | 69 unsigned long v1, v2, v3; in timer16_get_counter() local
78 v2 = ctrl_inw(p->mapbase + TCNT); in timer16_get_counter()
81 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) in timer16_get_counter()
82 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); in timer16_get_counter()
84 v2 |= 0x10000; in timer16_get_counter()
85 return v2; in timer16_get_counter()
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| D | h8300_tpu.c | 55 unsigned long v1, v2, v3; in tpu_get_counter() local
64 v2 = read_tcnt32(p); in tpu_get_counter()
67 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) in tpu_get_counter()
68 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); in tpu_get_counter()
70 *val = v2; in tpu_get_counter()
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| D | h8300_timer8.c | 56 unsigned long v1, v2, v3; in timer8_get_counter() local
65 v2 = ctrl_inw(p->mapbase + _8TCNT); in timer8_get_counter()
68 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) in timer8_get_counter()
69 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); in timer8_get_counter()
71 v2 |= o1 << 10; in timer8_get_counter()
72 return v2; in timer8_get_counter()
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| /drivers/gpu/drm/radeon/ |
| D | atombios_encoders.c | 556 LVDS_ENCODER_CONTROL_PS_ALLOCATION_V2 v2; member
624 args.v2.ucMisc = 0; in atombios_digital_setup()
625 args.v2.ucAction = action; in atombios_digital_setup()
628 args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT; in atombios_digital_setup()
631 args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; in atombios_digital_setup()
632 args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_digital_setup()
633 args.v2.ucTruncate = 0; in atombios_digital_setup()
634 args.v2.ucSpatial = 0; in atombios_digital_setup()
635 args.v2.ucTemporal = 0; in atombios_digital_setup()
636 args.v2.ucFRC = 0; in atombios_digital_setup()
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| /drivers/net/wireless/realtek/rtlwifi/rtl8188ee/ |
| D | phy.c | 418 #define READ_NEXT_PAIR(v1, v2, i) \ argument
421 v2 = array_table[i+1]; \
428 u32 v2; in handle_branch1() local
433 v2 = array_table[i+1]; in handle_branch1()
435 _rtl8188e_config_bb_reg(hw, v1, v2); in handle_branch1()
443 READ_NEXT_PAIR(v1, v2, i); in handle_branch1()
444 while (v2 != 0xDEAD && in handle_branch1()
445 v2 != 0xCDEF && in handle_branch1()
446 v2 != 0xCDCD && i < arraylen - 2) in handle_branch1()
447 READ_NEXT_PAIR(v1, v2, i); in handle_branch1()
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| /drivers/net/wireless/realtek/rtlwifi/rtl8192ee/ |
| D | phy.c | 697 #define READ_NEXT_PAIR(v1, v2, i) \ argument
701 v2 = array[i+1]; \
711 u32 v1 = 0, v2 = 0; in phy_config_bb_with_hdr_file() local
719 v2 = array[i+1]; in phy_config_bb_with_hdr_file()
721 _rtl92ee_config_bb_reg(hw, v1, v2); in phy_config_bb_with_hdr_file()
729 READ_NEXT_PAIR(v1, v2, i); in phy_config_bb_with_hdr_file()
730 while (v2 != 0xDEAD && in phy_config_bb_with_hdr_file()
731 v2 != 0xCDEF && in phy_config_bb_with_hdr_file()
732 v2 != 0xCDCD && i < len - 2) { in phy_config_bb_with_hdr_file()
733 READ_NEXT_PAIR(v1, v2, i); in phy_config_bb_with_hdr_file()
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| /drivers/net/wireless/realtek/rtlwifi/rtl8821ae/ |
| D | phy.c | 40 #define READ_NEXT_PAIR(array_table, v1, v2, i) \ argument
44 v2 = array_table[i+1]; \
1798 u32 i, v1, v2; in _rtl8821ae_phy_config_mac_with_headerfile() local
1814 v2 = (u8)ptrarray[i + 1]; in _rtl8821ae_phy_config_mac_with_headerfile()
1816 rtl_write_byte(rtlpriv, v1, (u8)v2); in _rtl8821ae_phy_config_mac_with_headerfile()
1821 READ_NEXT_PAIR(ptrarray, v1, v2, i); in _rtl8821ae_phy_config_mac_with_headerfile()
1822 while (v2 != 0xDEAD && in _rtl8821ae_phy_config_mac_with_headerfile()
1823 v2 != 0xCDEF && in _rtl8821ae_phy_config_mac_with_headerfile()
1824 v2 != 0xCDCD && i < arraylength - 2) { in _rtl8821ae_phy_config_mac_with_headerfile()
1825 READ_NEXT_PAIR(ptrarray, v1, v2, i); in _rtl8821ae_phy_config_mac_with_headerfile()
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| /drivers/net/wireless/iwlwifi/mvm/ |
| D | offloading.c | 93 struct iwl_proto_offload_cmd_v2 v2; in iwl_mvm_send_proto_offload() member
164 memcpy(cmd.v2.ndp_mac_addr, vif->addr, ETH_ALEN); in iwl_mvm_send_proto_offload()
167 BUILD_BUG_ON(sizeof(cmd.v2.target_ipv6_addr[0]) != in iwl_mvm_send_proto_offload()
172 memcpy(cmd.v2.target_ipv6_addr[i], in iwl_mvm_send_proto_offload()
174 sizeof(cmd.v2.target_ipv6_addr[i])); in iwl_mvm_send_proto_offload()
199 common = &cmd.v2.common; in iwl_mvm_send_proto_offload()
200 size = sizeof(cmd.v2); in iwl_mvm_send_proto_offload()
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | atombios_encoders.c | 568 DIG_ENCODER_CONTROL_PARAMETERS_V2 v2; member
714 DIG_TRANSMITTER_CONTROL_PARAMETERS_V2 v2; member
855 args.v2.ucAction = action; in amdgpu_atombios_encoder_setup_dig_transmitter()
857 args.v2.usInitInfo = cpu_to_le16(connector_object_id); in amdgpu_atombios_encoder_setup_dig_transmitter()
859 args.v2.asMode.ucLaneSel = lane_num; in amdgpu_atombios_encoder_setup_dig_transmitter()
860 args.v2.asMode.ucLaneSet = lane_set; in amdgpu_atombios_encoder_setup_dig_transmitter()
863 args.v2.usPixelClock = cpu_to_le16(dp_clock / 10); in amdgpu_atombios_encoder_setup_dig_transmitter()
865 args.v2.usPixelClock = cpu_to_le16((amdgpu_encoder->pixel_clock / 2) / 10); in amdgpu_atombios_encoder_setup_dig_transmitter()
867 args.v2.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_transmitter()
870 args.v2.acConfig.ucEncoderSel = dig_encoder; in amdgpu_atombios_encoder_setup_dig_transmitter()
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| D | atombios_dp.c | 54 PROCESS_AUX_CHANNEL_TRANSACTION_PARAMETERS_V2 v2; member
78 args.v2.lpAuxRequest = cpu_to_le16((u16)(0 + 4)); in amdgpu_atombios_dp_process_aux_ch()
79 args.v2.lpDataOut = cpu_to_le16((u16)(16 + 4)); in amdgpu_atombios_dp_process_aux_ch()
80 args.v2.ucDataOutLen = 0; in amdgpu_atombios_dp_process_aux_ch()
81 args.v2.ucChannelID = chan->rec.i2c_id; in amdgpu_atombios_dp_process_aux_ch()
82 args.v2.ucDelay = delay / 10; in amdgpu_atombios_dp_process_aux_ch()
83 args.v2.ucHPD_ID = chan->rec.hpd; in amdgpu_atombios_dp_process_aux_ch()
87 *ack = args.v2.ucReplyStatus; in amdgpu_atombios_dp_process_aux_ch()
90 if (args.v2.ucReplyStatus == 1) { in amdgpu_atombios_dp_process_aux_ch()
97 if (args.v2.ucReplyStatus == 2) { in amdgpu_atombios_dp_process_aux_ch()
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| /drivers/net/wireless/realtek/rtlwifi/rtl8723be/ |
| D | phy.c | 516 #define READ_NEXT_PAIR(v1, v2, i) \ in _rtl8723be_phy_config_bb_with_headerfile() argument
520 v2 = array_table[i+1]; \ in _rtl8723be_phy_config_bb_with_headerfile()
527 u32 v1 = 0, v2 = 0; in _rtl8723be_phy_config_bb_with_headerfile() local
535 v2 = array_table[i+1]; in _rtl8723be_phy_config_bb_with_headerfile()
537 _rtl8723be_config_bb_reg(hw, v1, v2); in _rtl8723be_phy_config_bb_with_headerfile()
548 READ_NEXT_PAIR(v1, v2, i); in _rtl8723be_phy_config_bb_with_headerfile()
549 while (v2 != 0xDEAD && in _rtl8723be_phy_config_bb_with_headerfile()
550 v2 != 0xCDEF && in _rtl8723be_phy_config_bb_with_headerfile()
551 v2 != 0xCDCD && in _rtl8723be_phy_config_bb_with_headerfile()
553 READ_NEXT_PAIR(v1, v2, i); in _rtl8723be_phy_config_bb_with_headerfile()
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| /drivers/net/wireless/p54/ |
| D | fwio.c | 245 eeprom_hdr->v2.offset = cpu_to_le32(offset); in p54_download_eeprom()
246 eeprom_hdr->v2.len = cpu_to_le16(len); in p54_download_eeprom()
247 eeprom_hdr->v2.magic2 = 0xf; in p54_download_eeprom()
248 memcpy(eeprom_hdr->v2.magic, (const char *)"LOCK", 4); in p54_download_eeprom()
375 setup->v2.rx_addr = cpu_to_le32(priv->rx_end); in p54_setup_mac()
376 setup->v2.max_rx = cpu_to_le16(priv->rx_mtu); in p54_setup_mac()
377 setup->v2.rxhw = cpu_to_le16(priv->rxhw); in p54_setup_mac()
378 setup->v2.timer = cpu_to_le16(priv->wakeup_timer); in p54_setup_mac()
379 setup->v2.truncate = cpu_to_le16(48896); in p54_setup_mac()
380 setup->v2.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask); in p54_setup_mac()
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| /drivers/mfd/ |
| D | tps65010.c | 198 u8 value, v2; in dbg_show() local
263 v2 = i2c_smbus_read_byte_data(tps->client, TPS_LED1_PER); in dbg_show()
266 ? ((v2 & 0x80) ? "on" : "off") in dbg_show()
267 : ((v2 & 0x80) ? "blink" : "(nPG)"), in dbg_show()
268 value, v2, in dbg_show()
269 (value & 0x7f) * 10, (v2 & 0x7f) * 100); in dbg_show()
272 v2 = i2c_smbus_read_byte_data(tps->client, TPS_LED2_PER); in dbg_show()
275 ? ((v2 & 0x80) ? "on" : "off") in dbg_show()
276 : ((v2 & 0x80) ? "blink" : "off"), in dbg_show()
277 value, v2, in dbg_show()
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| /drivers/net/ethernet/chelsio/cxgb3/ |
| D | aq100x.c | 269 unsigned int v, v2, gpio, wait; in t3_aq100x_phy_prep() local
344 v = v2 = 0; in t3_aq100x_phy_prep()
346 t3_mdio_read(phy, MDIO_MMD_PHYXS, AQ_XAUI_TX_CFG, &v2); in t3_aq100x_phy_prep()
347 if (v != 0x1b || v2 != 0x1b) in t3_aq100x_phy_prep()
350 phy_addr, v, v2); in t3_aq100x_phy_prep()
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| /drivers/scsi/cxgbi/ |
| D | libcxgbi.h | 623 u32 v2 = (sw_tag >> (shift - 1)) << shift; in cxgbi_set_non_ddp_tag() local
625 return v2 | v1 | 1 << shift; in cxgbi_set_non_ddp_tag()
638 u32 v2 = sw_tag >> tformat->rsvd_shift; in cxgbi_ddp_tag_base() local
640 v2 <<= tformat->rsvd_bits + tformat->rsvd_shift; in cxgbi_ddp_tag_base()
642 return v2 | v1; in cxgbi_ddp_tag_base()
661 u32 v1, v2; in cxgbi_tag_nonrsvd_bits() local
665 v2 = (tag >> (shift + 1)) << tformat->rsvd_shift; in cxgbi_tag_nonrsvd_bits()
670 v2 = (tag >> 1) & ~mask; in cxgbi_tag_nonrsvd_bits()
672 return v1 | v2; in cxgbi_tag_nonrsvd_bits()
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| /drivers/video/fbdev/sis/ |
| D | sis_main.c | 4310 u8 reg, v1, v2, v3, v4, v5, v6, v7, v8; in sisfb_post_sis300() local
4330 v1 = 0x44; v2 = 0x42; in sisfb_post_sis300()
4333 v1 = 0x68; v2 = 0x43; /* Assume 125Mhz MCLK */ in sisfb_post_sis300()
4339 v2 = bios[rindex++]; in sisfb_post_sis300()
4348 SiS_SetReg(SISSR, 0x29, v2); in sisfb_post_sis300()
4361 v1 = 0x01; v2 = 0x43; v3 = 0x1e; v4 = 0x2a; in sisfb_post_sis300()
4366 v2 = bios[memtype + 8]; in sisfb_post_sis300()
4377 SiS_SetReg(SISSR, 0x16, v2); in sisfb_post_sis300()
4396 v1 = 0xf6; v2 = 0x0d; v3 = 0x00; in sisfb_post_sis300()
4399 v2 = bios[0xe9]; in sisfb_post_sis300()
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