1 /* 2 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) 3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 * 9 * Vineetg: March 2009 (Supporting 2 levels of Interrupts) 10 * Stack switching code can no longer reliably rely on the fact that 11 * if we are NOT in user mode, stack is switched to kernel mode. 12 * e.g. L2 IRQ interrupted a L1 ISR which had not yet completed 13 * it's prologue including stack switching from user mode 14 * 15 * Vineetg: Aug 28th 2008: Bug #94984 16 * -Zero Overhead Loop Context shd be cleared when entering IRQ/EXcp/Trap 17 * Normally CPU does this automatically, however when doing FAKE rtie, 18 * we also need to explicitly do this. The problem in macros 19 * FAKE_RET_FROM_EXCPN and FAKE_RET_FROM_EXCPN_LOCK_IRQ was that this bit 20 * was being "CLEARED" rather then "SET". Actually "SET" clears ZOL context 21 * 22 * Vineetg: May 5th 2008 23 * -Modified CALLEE_REG save/restore macros to handle the fact that 24 * r25 contains the kernel current task ptr 25 * - Defined Stack Switching Macro to be reused in all intr/excp hdlrs 26 * - Shaved off 11 instructions from RESTORE_ALL_INT1 by using the 27 * address Write back load ld.ab instead of seperate ld/add instn 28 * 29 * Amit Bhor, Sameer Dhavale: Codito Technologies 2004 30 */ 31 32 #ifndef __ASM_ARC_ENTRY_COMPACT_H 33 #define __ASM_ARC_ENTRY_COMPACT_H 34 35 #include <asm/asm-offsets.h> 36 #include <asm/irqflags-compact.h> 37 #include <asm/thread_info.h> /* For THREAD_SIZE */ 38 39 /*-------------------------------------------------------------- 40 * Switch to Kernel Mode stack if SP points to User Mode stack 41 * 42 * Entry : r9 contains pre-IRQ/exception/trap status32 43 * Exit : SP set to K mode stack 44 * SP at the time of entry (K/U) saved @ pt_regs->sp 45 * Clobbers: r9 46 *-------------------------------------------------------------*/ 47 48 .macro SWITCH_TO_KERNEL_STK 49 50 /* User Mode when this happened ? Yes: Proceed to switch stack */ 51 bbit1 r9, STATUS_U_BIT, 88f 52 53 /* OK we were already in kernel mode when this event happened, thus can 54 * assume SP is kernel mode SP. _NO_ need to do any stack switching 55 */ 56 57 #ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS 58 /* However.... 59 * If Level 2 Interrupts enabled, we may end up with a corner case: 60 * 1. User Task executing 61 * 2. L1 IRQ taken, ISR starts (CPU auto-switched to KERNEL mode) 62 * 3. But before it could switch SP from USER to KERNEL stack 63 * a L2 IRQ "Interrupts" L1 64 * Thay way although L2 IRQ happened in Kernel mode, stack is still 65 * not switched. 66 * To handle this, we may need to switch stack even if in kernel mode 67 * provided SP has values in range of USER mode stack ( < 0x7000_0000 ) 68 */ 69 brlo sp, VMALLOC_START, 88f 70 71 /* TODO: vineetg: 72 * We need to be a bit more cautious here. What if a kernel bug in 73 * L1 ISR, caused SP to go whaco (some small value which looks like 74 * USER stk) and then we take L2 ISR. 75 * Above brlo alone would treat it as a valid L1-L2 sceanrio 76 * instead of shouting alound 77 * The only feasible way is to make sure this L2 happened in 78 * L1 prelogue ONLY i.e. ilink2 is less than a pre-set marker in 79 * L1 ISR before it switches stack 80 */ 81 82 #endif 83 84 /*------Intr/Ecxp happened in kernel mode, SP already setup ------ */ 85 /* save it nevertheless @ pt_regs->sp for uniformity */ 86 87 b.d 66f 88 st sp, [sp, PT_sp - SZ_PT_REGS] 89 90 88: /*------Intr/Ecxp happened in user mode, "switch" stack ------ */ 91 92 GET_CURR_TASK_ON_CPU r9 93 94 /* With current tsk in r9, get it's kernel mode stack base */ 95 GET_TSK_STACK_BASE r9, r9 96 97 /* save U mode SP @ pt_regs->sp */ 98 st sp, [r9, PT_sp - SZ_PT_REGS] 99 100 /* final SP switch */ 101 mov sp, r9 102 66: 103 .endm 104 105 /*------------------------------------------------------------ 106 * "FAKE" a rtie to return from CPU Exception context 107 * This is to re-enable Exceptions within exception 108 * Look at EV_ProtV to see how this is actually used 109 *-------------------------------------------------------------*/ 110 111 .macro FAKE_RET_FROM_EXCPN 112 113 lr r9, [status32] 114 bclr r9, r9, STATUS_AE_BIT 115 or r9, r9, (STATUS_E1_MASK|STATUS_E2_MASK) 116 sr r9, [erstatus] 117 mov r9, 55f 118 sr r9, [eret] 119 rtie 120 55: 121 .endm 122 123 /*-------------------------------------------------------------- 124 * For early Exception/ISR Prologue, a core reg is temporarily needed to 125 * code the rest of prolog (stack switching). This is done by stashing 126 * it to memory (non-SMP case) or SCRATCH0 Aux Reg (SMP). 127 * 128 * Before saving the full regfile - this reg is restored back, only 129 * to be saved again on kernel mode stack, as part of pt_regs. 130 *-------------------------------------------------------------*/ 131 .macro PROLOG_FREEUP_REG reg, mem 132 #ifdef CONFIG_SMP 133 sr \reg, [ARC_REG_SCRATCH_DATA0] 134 #else 135 st \reg, [\mem] 136 #endif 137 .endm 138 139 .macro PROLOG_RESTORE_REG reg, mem 140 #ifdef CONFIG_SMP 141 lr \reg, [ARC_REG_SCRATCH_DATA0] 142 #else 143 ld \reg, [\mem] 144 #endif 145 .endm 146 147 /*-------------------------------------------------------------- 148 * Exception Entry prologue 149 * -Switches stack to K mode (if not already) 150 * -Saves the register file 151 * 152 * After this it is safe to call the "C" handlers 153 *-------------------------------------------------------------*/ 154 .macro EXCEPTION_PROLOGUE 155 156 /* Need at least 1 reg to code the early exception prologue */ 157 PROLOG_FREEUP_REG r9, @ex_saved_reg1 158 159 /* U/K mode at time of exception (stack not switched if already K) */ 160 lr r9, [erstatus] 161 162 /* ARC700 doesn't provide auto-stack switching */ 163 SWITCH_TO_KERNEL_STK 164 165 #ifdef CONFIG_ARC_CURR_IN_REG 166 /* Treat r25 as scratch reg (save on stack) and load with "current" */ 167 PUSH r25 168 GET_CURR_TASK_ON_CPU r25 169 #else 170 sub sp, sp, 4 171 #endif 172 173 st.a r0, [sp, -8] /* orig_r0 needed for syscall (skip ECR slot) */ 174 sub sp, sp, 4 /* skip pt_regs->sp, already saved above */ 175 176 /* Restore r9 used to code the early prologue */ 177 PROLOG_RESTORE_REG r9, @ex_saved_reg1 178 179 /* now we are ready to save the regfile */ 180 SAVE_R0_TO_R12 181 PUSH gp 182 PUSH fp 183 PUSH blink 184 PUSHAX eret 185 PUSHAX erstatus 186 PUSH lp_count 187 PUSHAX lp_end 188 PUSHAX lp_start 189 PUSHAX erbta 190 191 lr r9, [ecr] 192 st r9, [sp, PT_event] /* EV_Trap expects r9 to have ECR */ 193 .endm 194 195 /*-------------------------------------------------------------- 196 * Restore all registers used by system call or Exceptions 197 * SP should always be pointing to the next free stack element 198 * when entering this macro. 199 * 200 * NOTE: 201 * 202 * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg 203 * for memory load operations. If used in that way interrupts are deffered 204 * by hardware and that is not good. 205 *-------------------------------------------------------------*/ 206 .macro EXCEPTION_EPILOGUE 207 POPAX erbta 208 POPAX lp_start 209 POPAX lp_end 210 211 POP r9 212 mov lp_count, r9 ;LD to lp_count is not allowed 213 214 POPAX erstatus 215 POPAX eret 216 POP blink 217 POP fp 218 POP gp 219 RESTORE_R12_TO_R0 220 221 ld sp, [sp] /* restore original sp */ 222 /* orig_r0, ECR, user_r25 skipped automatically */ 223 .endm 224 225 /* Dummy ECR values for Interrupts */ 226 #define event_IRQ1 0x0031abcd 227 #define event_IRQ2 0x0032abcd 228 229 .macro INTERRUPT_PROLOGUE LVL 230 231 /* free up r9 as scratchpad */ 232 PROLOG_FREEUP_REG r9, @int\LVL\()_saved_reg 233 234 /* Which mode (user/kernel) was the system in when intr occured */ 235 lr r9, [status32_l\LVL\()] 236 237 SWITCH_TO_KERNEL_STK 238 239 #ifdef CONFIG_ARC_CURR_IN_REG 240 /* Treat r25 as scratch reg (save on stack) and load with "current" */ 241 PUSH r25 242 GET_CURR_TASK_ON_CPU r25 243 #else 244 sub sp, sp, 4 245 #endif 246 247 PUSH 0x003\LVL\()abcd /* Dummy ECR */ 248 sub sp, sp, 8 /* skip orig_r0 (not needed) 249 skip pt_regs->sp, already saved above */ 250 251 /* Restore r9 used to code the early prologue */ 252 PROLOG_RESTORE_REG r9, @int\LVL\()_saved_reg 253 254 SAVE_R0_TO_R12 255 PUSH gp 256 PUSH fp 257 PUSH blink 258 PUSH ilink\LVL\() 259 PUSHAX status32_l\LVL\() 260 PUSH lp_count 261 PUSHAX lp_end 262 PUSHAX lp_start 263 PUSHAX bta_l\LVL\() 264 .endm 265 266 /*-------------------------------------------------------------- 267 * Restore all registers used by interrupt handlers. 268 * 269 * NOTE: 270 * 271 * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg 272 * for memory load operations. If used in that way interrupts are deffered 273 * by hardware and that is not good. 274 *-------------------------------------------------------------*/ 275 .macro INTERRUPT_EPILOGUE LVL 276 POPAX bta_l\LVL\() 277 POPAX lp_start 278 POPAX lp_end 279 280 POP r9 281 mov lp_count, r9 ;LD to lp_count is not allowed 282 283 POPAX status32_l\LVL\() 284 POP ilink\LVL\() 285 POP blink 286 POP fp 287 POP gp 288 RESTORE_R12_TO_R0 289 290 ld sp, [sp] /* restore original sp */ 291 /* orig_r0, ECR, user_r25 skipped automatically */ 292 .endm 293 294 /* Get thread_info of "current" tsk */ 295 .macro GET_CURR_THR_INFO_FROM_SP reg 296 bic \reg, sp, (THREAD_SIZE - 1) 297 .endm 298 299 /* Get CPU-ID of this core */ 300 .macro GET_CPU_ID reg 301 lr \reg, [identity] 302 lsr \reg, \reg, 8 303 bmsk \reg, \reg, 7 304 .endm 305 306 #endif /* __ASM_ARC_ENTRY_COMPACT_H */ 307