1/* moxart.dtsi - Device Tree Include file for MOXA ART family SoC 2 * 3 * Copyright (C) 2013 Jonas Jensen <jonas.jensen@gmail.com> 4 * 5 * Licensed under GPLv2 or later. 6 */ 7 8/include/ "skeleton.dtsi" 9#include <dt-bindings/interrupt-controller/irq.h> 10 11/ { 12 compatible = "moxa,moxart"; 13 model = "MOXART"; 14 interrupt-parent = <&intc>; 15 16 cpus { 17 #address-cells = <1>; 18 #size-cells = <0>; 19 20 cpu@0 { 21 device_type = "cpu"; 22 compatible = "faraday,fa526"; 23 reg = <0>; 24 }; 25 }; 26 27 clocks { 28 #address-cells = <1>; 29 #size-cells = <0>; 30 }; 31 32 soc { 33 compatible = "simple-bus"; 34 #address-cells = <1>; 35 #size-cells = <1>; 36 reg = <0x90000000 0x10000000>; 37 ranges; 38 39 intc: interrupt-controller@98800000 { 40 compatible = "moxa,moxart-ic", "faraday,ftintc010"; 41 reg = <0x98800000 0x100>; 42 interrupt-controller; 43 #interrupt-cells = <2>; 44 interrupt-mask = <0x00080000>; 45 }; 46 47 clk_pll: clk_pll@98100000 { 48 compatible = "moxa,moxart-pll-clock"; 49 #clock-cells = <0>; 50 reg = <0x98100000 0x34>; 51 }; 52 53 clk_apb: clk_apb@98100000 { 54 compatible = "moxa,moxart-apb-clock"; 55 #clock-cells = <0>; 56 reg = <0x98100000 0x34>; 57 clocks = <&clk_pll>; 58 }; 59 60 timer: timer@98400000 { 61 compatible = "moxa,moxart-timer"; 62 reg = <0x98400000 0x42>; 63 interrupts = <19 IRQ_TYPE_EDGE_FALLING>; 64 clocks = <&clk_apb>; 65 }; 66 67 gpio: gpio@98700000 { 68 gpio-controller; 69 #gpio-cells = <2>; 70 compatible = "moxa,moxart-gpio"; 71 reg = <0x98700000 0xC>; 72 }; 73 74 rtc: rtc { 75 compatible = "moxa,moxart-rtc"; 76 gpio-rtc-sclk = <&gpio 5 0>; 77 gpio-rtc-data = <&gpio 6 0>; 78 gpio-rtc-reset = <&gpio 7 0>; 79 }; 80 81 dma: dma@90500000 { 82 compatible = "moxa,moxart-dma"; 83 reg = <0x90500080 0x40>; 84 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; 85 #dma-cells = <1>; 86 }; 87 88 watchdog: watchdog@98500000 { 89 compatible = "moxa,moxart-watchdog"; 90 reg = <0x98500000 0x10>; 91 clocks = <&clk_apb>; 92 }; 93 94 sdhci: sdhci@98e00000 { 95 compatible = "moxa,moxart-sdhci"; 96 reg = <0x98e00000 0x5C>; 97 interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; 98 clocks = <&clk_apb>; 99 dmas = <&dma 5>, 100 <&dma 5>; 101 dma-names = "tx", "rx"; 102 status = "disabled"; 103 }; 104 105 mdio0: mdio@90900090 { 106 compatible = "moxa,moxart-mdio"; 107 reg = <0x90900090 0x8>; 108 #address-cells = <1>; 109 #size-cells = <0>; 110 status = "disabled"; 111 }; 112 113 mdio1: mdio@92000090 { 114 compatible = "moxa,moxart-mdio"; 115 reg = <0x92000090 0x8>; 116 #address-cells = <1>; 117 #size-cells = <0>; 118 status = "disabled"; 119 }; 120 121 mac0: mac@90900000 { 122 compatible = "moxa,moxart-mac"; 123 reg = <0x90900000 0x90>; 124 interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; 125 phy-handle = <ðphy0>; 126 phy-mode = "mii"; 127 status = "disabled"; 128 }; 129 130 mac1: mac@92000000 { 131 compatible = "moxa,moxart-mac"; 132 reg = <0x92000000 0x90>; 133 interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; 134 phy-handle = <ðphy1>; 135 phy-mode = "mii"; 136 status = "disabled"; 137 }; 138 139 uart0: uart@98200000 { 140 compatible = "ns16550a"; 141 reg = <0x98200000 0x20>; 142 interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; 143 reg-shift = <2>; 144 reg-io-width = <4>; 145 clock-frequency = <14745600>; 146 status = "disabled"; 147 }; 148 }; 149}; 150