1/* 2 * Device Tree Source for OMAP243x SoC 3 * 4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * This file is licensed under the terms of the GNU General Public License 7 * version 2. This program is licensed "as is" without any warranty of any 8 * kind, whether express or implied. 9 */ 10 11#include "omap2.dtsi" 12 13/ { 14 compatible = "ti,omap2430", "ti,omap2"; 15 16 ocp { 17 l4_wkup: l4_wkup@49000000 { 18 compatible = "ti,omap2-l4-wkup", "simple-bus"; 19 #address-cells = <1>; 20 #size-cells = <1>; 21 ranges = <0 0x49000000 0x31000>; 22 23 prcm: prcm@6000 { 24 compatible = "ti,omap2-prcm"; 25 reg = <0x6000 0x1000>; 26 27 prcm_clocks: clocks { 28 #address-cells = <1>; 29 #size-cells = <0>; 30 }; 31 32 prcm_clockdomains: clockdomains { 33 }; 34 }; 35 36 scm: scm@2000 { 37 compatible = "ti,omap2-scm", "simple-bus"; 38 reg = <0x2000 0x1000>; 39 #address-cells = <1>; 40 #size-cells = <1>; 41 ranges = <0 0x2000 0x1000>; 42 43 omap2430_pmx: pinmux@30 { 44 compatible = "ti,omap2430-padconf", 45 "pinctrl-single"; 46 reg = <0x30 0x0154>; 47 #address-cells = <1>; 48 #size-cells = <0>; 49 pinctrl-single,register-width = <8>; 50 pinctrl-single,function-mask = <0x3f>; 51 }; 52 53 scm_conf: scm_conf@270 { 54 compatible = "syscon", 55 "simple-bus"; 56 reg = <0x270 0x240>; 57 #address-cells = <1>; 58 #size-cells = <1>; 59 ranges = <0 0x270 0x240>; 60 61 scm_clocks: clocks { 62 #address-cells = <1>; 63 #size-cells = <0>; 64 }; 65 66 pbias_regulator: pbias_regulator { 67 compatible = "ti,pbias-omap2", "ti,pbias-omap"; 68 reg = <0x230 0x4>; 69 syscon = <&scm_conf>; 70 pbias_mmc_reg: pbias_mmc_omap2430 { 71 regulator-name = "pbias_mmc_omap2430"; 72 regulator-min-microvolt = <1800000>; 73 regulator-max-microvolt = <3000000>; 74 }; 75 }; 76 }; 77 78 scm_clockdomains: clockdomains { 79 }; 80 }; 81 82 counter32k: counter@20000 { 83 compatible = "ti,omap-counter32k"; 84 reg = <0x20000 0x20>; 85 ti,hwmods = "counter_32k"; 86 }; 87 }; 88 89 gpio1: gpio@4900c000 { 90 compatible = "ti,omap2-gpio"; 91 reg = <0x4900c000 0x200>; 92 interrupts = <29>; 93 ti,hwmods = "gpio1"; 94 ti,gpio-always-on; 95 #gpio-cells = <2>; 96 gpio-controller; 97 #interrupt-cells = <2>; 98 interrupt-controller; 99 }; 100 101 gpio2: gpio@4900e000 { 102 compatible = "ti,omap2-gpio"; 103 reg = <0x4900e000 0x200>; 104 interrupts = <30>; 105 ti,hwmods = "gpio2"; 106 ti,gpio-always-on; 107 #gpio-cells = <2>; 108 gpio-controller; 109 #interrupt-cells = <2>; 110 interrupt-controller; 111 }; 112 113 gpio3: gpio@49010000 { 114 compatible = "ti,omap2-gpio"; 115 reg = <0x49010000 0x200>; 116 interrupts = <31>; 117 ti,hwmods = "gpio3"; 118 ti,gpio-always-on; 119 #gpio-cells = <2>; 120 gpio-controller; 121 #interrupt-cells = <2>; 122 interrupt-controller; 123 }; 124 125 gpio4: gpio@49012000 { 126 compatible = "ti,omap2-gpio"; 127 reg = <0x49012000 0x200>; 128 interrupts = <32>; 129 ti,hwmods = "gpio4"; 130 ti,gpio-always-on; 131 #gpio-cells = <2>; 132 gpio-controller; 133 #interrupt-cells = <2>; 134 interrupt-controller; 135 }; 136 137 gpio5: gpio@480b6000 { 138 compatible = "ti,omap2-gpio"; 139 reg = <0x480b6000 0x200>; 140 interrupts = <33>; 141 ti,hwmods = "gpio5"; 142 #gpio-cells = <2>; 143 gpio-controller; 144 #interrupt-cells = <2>; 145 interrupt-controller; 146 }; 147 148 gpmc: gpmc@6e000000 { 149 compatible = "ti,omap2430-gpmc"; 150 reg = <0x6e000000 0x1000>; 151 #address-cells = <2>; 152 #size-cells = <1>; 153 interrupts = <20>; 154 gpmc,num-cs = <8>; 155 gpmc,num-waitpins = <4>; 156 ti,hwmods = "gpmc"; 157 }; 158 159 mcbsp1: mcbsp@48074000 { 160 compatible = "ti,omap2430-mcbsp"; 161 reg = <0x48074000 0xff>; 162 reg-names = "mpu"; 163 interrupts = <64>, /* OCP compliant interrupt */ 164 <59>, /* TX interrupt */ 165 <60>, /* RX interrupt */ 166 <61>; /* RX overflow interrupt */ 167 interrupt-names = "common", "tx", "rx", "rx_overflow"; 168 ti,buffer-size = <128>; 169 ti,hwmods = "mcbsp1"; 170 dmas = <&sdma 31>, 171 <&sdma 32>; 172 dma-names = "tx", "rx"; 173 status = "disabled"; 174 }; 175 176 mcbsp2: mcbsp@48076000 { 177 compatible = "ti,omap2430-mcbsp"; 178 reg = <0x48076000 0xff>; 179 reg-names = "mpu"; 180 interrupts = <16>, /* OCP compliant interrupt */ 181 <62>, /* TX interrupt */ 182 <63>; /* RX interrupt */ 183 interrupt-names = "common", "tx", "rx"; 184 ti,buffer-size = <128>; 185 ti,hwmods = "mcbsp2"; 186 dmas = <&sdma 33>, 187 <&sdma 34>; 188 dma-names = "tx", "rx"; 189 status = "disabled"; 190 }; 191 192 mcbsp3: mcbsp@4808c000 { 193 compatible = "ti,omap2430-mcbsp"; 194 reg = <0x4808c000 0xff>; 195 reg-names = "mpu"; 196 interrupts = <17>, /* OCP compliant interrupt */ 197 <89>, /* TX interrupt */ 198 <90>; /* RX interrupt */ 199 interrupt-names = "common", "tx", "rx"; 200 ti,buffer-size = <128>; 201 ti,hwmods = "mcbsp3"; 202 dmas = <&sdma 17>, 203 <&sdma 18>; 204 dma-names = "tx", "rx"; 205 status = "disabled"; 206 }; 207 208 mcbsp4: mcbsp@4808e000 { 209 compatible = "ti,omap2430-mcbsp"; 210 reg = <0x4808e000 0xff>; 211 reg-names = "mpu"; 212 interrupts = <18>, /* OCP compliant interrupt */ 213 <54>, /* TX interrupt */ 214 <55>; /* RX interrupt */ 215 interrupt-names = "common", "tx", "rx"; 216 ti,buffer-size = <128>; 217 ti,hwmods = "mcbsp4"; 218 dmas = <&sdma 19>, 219 <&sdma 20>; 220 dma-names = "tx", "rx"; 221 status = "disabled"; 222 }; 223 224 mcbsp5: mcbsp@48096000 { 225 compatible = "ti,omap2430-mcbsp"; 226 reg = <0x48096000 0xff>; 227 reg-names = "mpu"; 228 interrupts = <19>, /* OCP compliant interrupt */ 229 <81>, /* TX interrupt */ 230 <82>; /* RX interrupt */ 231 interrupt-names = "common", "tx", "rx"; 232 ti,buffer-size = <128>; 233 ti,hwmods = "mcbsp5"; 234 dmas = <&sdma 21>, 235 <&sdma 22>; 236 dma-names = "tx", "rx"; 237 status = "disabled"; 238 }; 239 240 mmc1: mmc@4809c000 { 241 compatible = "ti,omap2-hsmmc"; 242 reg = <0x4809c000 0x200>; 243 interrupts = <83>; 244 ti,hwmods = "mmc1"; 245 ti,dual-volt; 246 dmas = <&sdma 61>, <&sdma 62>; 247 dma-names = "tx", "rx"; 248 pbias-supply = <&pbias_mmc_reg>; 249 }; 250 251 mmc2: mmc@480b4000 { 252 compatible = "ti,omap2-hsmmc"; 253 reg = <0x480b4000 0x200>; 254 interrupts = <86>; 255 ti,hwmods = "mmc2"; 256 dmas = <&sdma 47>, <&sdma 48>; 257 dma-names = "tx", "rx"; 258 }; 259 260 mailbox: mailbox@48094000 { 261 compatible = "ti,omap2-mailbox"; 262 reg = <0x48094000 0x200>; 263 interrupts = <26>; 264 ti,hwmods = "mailbox"; 265 #mbox-cells = <1>; 266 ti,mbox-num-users = <4>; 267 ti,mbox-num-fifos = <6>; 268 mbox_dsp: dsp { 269 ti,mbox-tx = <0 0 0>; 270 ti,mbox-rx = <1 0 0>; 271 }; 272 }; 273 274 timer1: timer@49018000 { 275 compatible = "ti,omap2420-timer"; 276 reg = <0x49018000 0x400>; 277 interrupts = <37>; 278 ti,hwmods = "timer1"; 279 ti,timer-alwon; 280 }; 281 282 mcspi3: mcspi@480b8000 { 283 compatible = "ti,omap2-mcspi"; 284 ti,hwmods = "mcspi3"; 285 reg = <0x480b8000 0x100>; 286 interrupts = <91>; 287 dmas = <&sdma 15 &sdma 16 &sdma 23 &sdma 24>; 288 dma-names = "tx0", "rx0", "tx1", "rx1"; 289 }; 290 291 usb_otg_hs: usb_otg_hs@480ac000 { 292 compatible = "ti,omap2-musb"; 293 ti,hwmods = "usb_otg_hs"; 294 reg = <0x480ac000 0x1000>; 295 interrupts = <93>; 296 }; 297 298 wd_timer2: wdt@49016000 { 299 compatible = "ti,omap2-wdt"; 300 ti,hwmods = "wd_timer2"; 301 reg = <0x49016000 0x80>; 302 }; 303 }; 304}; 305 306&i2c1 { 307 compatible = "ti,omap2430-i2c"; 308}; 309 310&i2c2 { 311 compatible = "ti,omap2430-i2c"; 312}; 313 314/include/ "omap24xx-clocks.dtsi" 315/include/ "omap2430-clocks.dtsi" 316