1/* 2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 3 * Copyright (C) 2014 Stefan Roese <sr@denx.de> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 */ 9/dts-v1/; 10 11#include "omap34xx.dtsi" 12 13/* Secure omaps have some devices inaccessible depending on the firmware */ 14&aes { 15 status = "disabled"; 16}; 17 18&sham { 19 status = "disabled"; 20}; 21 22/ { 23 cpus { 24 cpu@0 { 25 cpu0-supply = <&vcc>; 26 }; 27 }; 28 29 memory { 30 device_type = "memory"; 31 reg = <0x80000000 0x10000000>; /* 256 MB */ 32 }; 33 34 /* HS USB Port 2 Power */ 35 hsusb2_power: hsusb2_power_reg { 36 compatible = "regulator-fixed"; 37 regulator-name = "hsusb2_vbus"; 38 regulator-min-microvolt = <3300000>; 39 regulator-max-microvolt = <3300000>; 40 gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */ 41 startup-delay-us = <70000>; 42 }; 43 44 /* HS USB Host PHY on PORT 2 */ 45 hsusb2_phy: hsusb2_phy { 46 compatible = "usb-nop-xceiv"; 47 reset-gpios = <&gpio6 2 GPIO_ACTIVE_LOW>; /* gpio_162 */ 48 vcc-supply = <&hsusb2_power>; 49 }; 50 51 sound { 52 compatible = "ti,omap-twl4030"; 53 ti,model = "omap3beagle"; 54 55 /* McBSP2 is used for onboard sound, same as on beagle */ 56 ti,mcbsp = <&mcbsp2>; 57 }; 58 59 /* Regulator to enable/switch the vcc of the Wifi module */ 60 mmc2_sdio_poweron: regulator-mmc2-sdio-poweron { 61 compatible = "regulator-fixed"; 62 regulator-name = "regulator-mmc2-sdio-poweron"; 63 regulator-min-microvolt = <3150000>; 64 regulator-max-microvolt = <3150000>; 65 gpio = <&gpio5 29 GPIO_ACTIVE_LOW>; /* gpio_157 */ 66 enable-active-low; 67 startup-delay-us = <10000>; 68 }; 69}; 70 71&omap3_pmx_core { 72 hsusbb2_pins: pinmux_hsusbb2_pins { 73 pinctrl-single,pins = < 74 OMAP3_CORE1_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ 75 OMAP3_CORE1_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ 76 OMAP3_CORE1_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ 77 OMAP3_CORE1_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ 78 OMAP3_CORE1_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ 79 OMAP3_CORE1_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ 80 OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */ 81 OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */ 82 OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */ 83 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */ 84 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */ 85 OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */ 86 >; 87 }; 88 89 mmc1_pins: pinmux_mmc1_pins { 90 pinctrl-single,pins = < 91 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ 92 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ 93 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ 94 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ 95 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ 96 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ 97 OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */ 98 OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */ 99 OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */ 100 OMAP3_CORE1_IOPAD(0x2156, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */ 101 >; 102 }; 103 104 mmc2_pins: pinmux_mmc2_pins { 105 pinctrl-single,pins = < 106 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */ 107 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */ 108 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */ 109 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ 110 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ 111 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ 112 >; 113 }; 114 115 /* wlan GPIO output for WLAN_EN */ 116 wlan_gpio: pinmux_wlan_gpio { 117 pinctrl-single,pins = < 118 OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4) /* mcbsp1_fsr gpio_157 */ 119 >; 120 }; 121 122 uart3_pins: pinmux_uart3_pins { 123 pinctrl-single,pins = < 124 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ 125 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ 126 >; 127 }; 128 129 i2c3_pins: pinmux_i2c3_pins { 130 pinctrl-single,pins = < 131 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl.i2c3_scl */ 132 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda.i2c3_sda */ 133 >; 134 }; 135 136 mcspi1_pins: pinmux_mcspi1_pins { 137 pinctrl-single,pins = < 138 OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */ 139 OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */ 140 OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */ 141 OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */ 142 >; 143 }; 144 145 mcspi3_pins: pinmux_mcspi3_pins { 146 pinctrl-single,pins = < 147 OMAP3_CORE1_IOPAD(0x25dc, PIN_OUTPUT | MUX_MODE1) /* etk_d0.mcspi3_simo gpio14 INPUT | MODE1 */ 148 OMAP3_CORE1_IOPAD(0x25de, PIN_INPUT_PULLUP | MUX_MODE1) /* etk_d1.mcspi3_somi gpio15 INPUT | MODE1 */ 149 OMAP3_CORE1_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE1) /* etk_d2.mcspi3_cs0 gpio16 INPUT | MODE1 */ 150 OMAP3_CORE1_IOPAD(0x25e2, PIN_INPUT | MUX_MODE1) /* etk_d3.mcspi3_clk gpio17 INPUT | MODE1 */ 151 >; 152 }; 153 154 mcbsp3_pins: pinmux_mcbsp3_pins { 155 pinctrl-single,pins = < 156 OMAP3_CORE1_IOPAD(0x216c, PIN_OUTPUT | MUX_MODE0) /* mcbsp3_dx.uart2_cts */ 157 OMAP3_CORE1_IOPAD(0x216e, PIN_INPUT | MUX_MODE0) /* mcbsp3_dr.uart2_rts */ 158 OMAP3_CORE1_IOPAD(0x2170, PIN_INPUT | MUX_MODE0) /* mcbsp3_clk.uart2_tx */ 159 OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE0) /* mcbsp3_fsx.uart2_rx */ 160 >; 161 }; 162}; 163 164/* McBSP1: mux'ed with GPIO158 as clock for HA-DSP */ 165&mcbsp1 { 166 status = "disabled"; 167}; 168 169&mcbsp2 { 170 status = "okay"; 171}; 172 173&i2c1 { 174 clock-frequency = <2600000>; 175 176 twl: twl@48 { 177 reg = <0x48>; 178 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 179 interrupt-parent = <&intc>; 180 181 twl_audio: audio { 182 compatible = "ti,twl4030-audio"; 183 codec { 184 }; 185 }; 186 }; 187}; 188 189&i2c3 { 190 clock-frequency = <100000>; 191 192 pinctrl-names = "default"; 193 pinctrl-0 = <&i2c3_pins>; 194}; 195 196&mcspi1 { 197 pinctrl-names = "default"; 198 pinctrl-0 = <&mcspi1_pins>; 199 200 spidev@0 { 201 compatible = "spidev"; 202 spi-max-frequency = <48000000>; 203 reg = <0>; 204 spi-cpha; 205 }; 206}; 207 208&mcspi3 { 209 pinctrl-names = "default"; 210 pinctrl-0 = <&mcspi3_pins>; 211 212 spidev@0 { 213 compatible = "spidev"; 214 spi-max-frequency = <48000000>; 215 reg = <0>; 216 spi-cpha; 217 }; 218}; 219 220#include "twl4030.dtsi" 221#include "twl4030_omap3.dtsi" 222 223&mmc1 { 224 pinctrl-names = "default"; 225 pinctrl-0 = <&mmc1_pins>; 226 vmmc-supply = <&vmmc1>; 227 vmmc_aux-supply = <&vsim>; 228 cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_LOW>; 229 bus-width = <8>; 230}; 231 232// WiFi (Marvell 88W8686) on MMC2/SDIO 233&mmc2 { 234 pinctrl-names = "default"; 235 pinctrl-0 = <&mmc2_pins>; 236 vmmc-supply = <&mmc2_sdio_poweron>; 237 non-removable; 238 bus-width = <4>; 239 cap-power-off-card; 240}; 241 242&mmc3 { 243 status = "disabled"; 244}; 245 246&usbhshost { 247 port2-mode = "ehci-phy"; 248}; 249 250&usbhsehci { 251 phys = <0 &hsusb2_phy>; 252}; 253 254&twl_gpio { 255 ti,use-leds; 256 /* pullups: BIT(1) */ 257 ti,pullups = <0x000002>; 258 /* 259 * pulldowns: 260 * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13) 261 * BIT(15), BIT(16), BIT(17) 262 */ 263 ti,pulldowns = <0x03a1c4>; 264}; 265 266&uart3 { 267 pinctrl-names = "default"; 268 pinctrl-0 = <&uart3_pins>; 269}; 270 271&mcbsp3 { 272 status = "okay"; 273 pinctrl-names = "default"; 274 pinctrl-0 = <&mcbsp3_pins>; 275}; 276 277&gpmc { 278 ranges = <0 0 0x00000000 0x01000000>; 279 280 nand@0,0 { 281 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 282 nand-bus-width = <16>; 283 gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */ 284 ti,nand-ecc-opt = "sw"; 285 286 gpmc,cs-on-ns = <0>; 287 gpmc,cs-rd-off-ns = <36>; 288 gpmc,cs-wr-off-ns = <36>; 289 gpmc,adv-on-ns = <6>; 290 gpmc,adv-rd-off-ns = <24>; 291 gpmc,adv-wr-off-ns = <36>; 292 gpmc,oe-on-ns = <6>; 293 gpmc,oe-off-ns = <48>; 294 gpmc,we-on-ns = <6>; 295 gpmc,we-off-ns = <30>; 296 gpmc,rd-cycle-ns = <72>; 297 gpmc,wr-cycle-ns = <72>; 298 gpmc,access-ns = <54>; 299 gpmc,wr-access-ns = <30>; 300 301 #address-cells = <1>; 302 #size-cells = <1>; 303 304 x-loader@0 { 305 label = "X-Loader"; 306 reg = <0 0x80000>; 307 }; 308 309 bootloaders@80000 { 310 label = "U-Boot"; 311 reg = <0x80000 0x1e0000>; 312 }; 313 314 bootloaders_env@260000 { 315 label = "U-Boot Env"; 316 reg = <0x260000 0x20000>; 317 }; 318 319 kernel@280000 { 320 label = "Kernel"; 321 reg = <0x280000 0x400000>; 322 }; 323 324 filesystem@680000 { 325 label = "File System"; 326 reg = <0x680000 0xf980000>; 327 }; 328 }; 329}; 330 331&usb_otg_hs { 332 interface-type = <0>; 333 usb-phy = <&usb2_phy>; 334 phys = <&usb2_phy>; 335 phy-names = "usb2-phy"; 336 mode = <3>; 337 power = <50>; 338}; 339 340&vaux2 { 341 regulator-name = "vdd_ehci"; 342 regulator-min-microvolt = <1800000>; 343 regulator-max-microvolt = <1800000>; 344 regulator-always-on; 345}; 346