1/* 2 * Copyright (C) 2014 STMicroelectronics Limited. 3 * Author: Peter Griffin <peter.griffin@linaro.org> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * publishhed by the Free Software Foundation. 8 */ 9#include "stih418-clock.dtsi" 10#include "stih407-family.dtsi" 11#include "stih410-pinctrl.dtsi" 12/ { 13 cpus { 14 #address-cells = <1>; 15 #size-cells = <0>; 16 cpu@2 { 17 device_type = "cpu"; 18 compatible = "arm,cortex-a9"; 19 reg = <2>; 20 /* u-boot puts hpen in SBC dmem at 0xa4 offset */ 21 cpu-release-addr = <0x94100A4>; 22 }; 23 cpu@3 { 24 device_type = "cpu"; 25 compatible = "arm,cortex-a9"; 26 reg = <3>; 27 /* u-boot puts hpen in SBC dmem at 0xa4 offset */ 28 cpu-release-addr = <0x94100A4>; 29 }; 30 }; 31 32 soc { 33 usb2_picophy1: phy2 { 34 compatible = "st,stih407-usb2-phy"; 35 #phy-cells = <0>; 36 st,syscfg = <&syscfg_core 0xf8 0xf4>; 37 resets = <&softreset STIH407_PICOPHY_SOFTRESET>, 38 <&picophyreset STIH407_PICOPHY0_RESET>; 39 reset-names = "global", "port"; 40 }; 41 42 usb2_picophy2: phy3 { 43 compatible = "st,stih407-usb2-phy"; 44 #phy-cells = <0>; 45 st,syscfg = <&syscfg_core 0xfc 0xf4>; 46 resets = <&softreset STIH407_PICOPHY_SOFTRESET>, 47 <&picophyreset STIH407_PICOPHY1_RESET>; 48 reset-names = "global", "port"; 49 }; 50 51 ohci0: usb@9a03c00 { 52 compatible = "st,st-ohci-300x"; 53 reg = <0x9a03c00 0x100>; 54 interrupts = <GIC_SPI 180 IRQ_TYPE_NONE>; 55 clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>; 56 resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>, 57 <&softreset STIH407_USB2_PORT0_SOFTRESET>; 58 reset-names = "power", "softreset"; 59 phys = <&usb2_picophy1>; 60 phy-names = "usb"; 61 }; 62 63 ehci0: usb@9a03e00 { 64 compatible = "st,st-ehci-300x"; 65 reg = <0x9a03e00 0x100>; 66 interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>; 67 pinctrl-names = "default"; 68 pinctrl-0 = <&pinctrl_usb0>; 69 clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>; 70 resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>, 71 <&softreset STIH407_USB2_PORT0_SOFTRESET>; 72 reset-names = "power", "softreset"; 73 phys = <&usb2_picophy1>; 74 phy-names = "usb"; 75 }; 76 77 ohci1: usb@9a83c00 { 78 compatible = "st,st-ohci-300x"; 79 reg = <0x9a83c00 0x100>; 80 interrupts = <GIC_SPI 181 IRQ_TYPE_NONE>; 81 clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>; 82 resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>, 83 <&softreset STIH407_USB2_PORT1_SOFTRESET>; 84 reset-names = "power", "softreset"; 85 phys = <&usb2_picophy2>; 86 phy-names = "usb"; 87 }; 88 89 ehci1: usb@9a83e00 { 90 compatible = "st,st-ehci-300x"; 91 reg = <0x9a83e00 0x100>; 92 interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>; 93 pinctrl-names = "default"; 94 pinctrl-0 = <&pinctrl_usb1>; 95 clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>; 96 resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>, 97 <&softreset STIH407_USB2_PORT1_SOFTRESET>; 98 reset-names = "power", "softreset"; 99 phys = <&usb2_picophy2>; 100 phy-names = "usb"; 101 }; 102 103 mmc0: sdhci@09060000 { 104 assigned-clocks = <&clk_s_c0_flexgen CLK_MMC_0>; 105 assigned-clock-parents = <&clk_s_c0_pll1 0>; 106 assigned-clock-rates = <200000000>; 107 }; 108 }; 109}; 110