1/* 2 * Copyright 2013 Freescale Semiconductor, Inc. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 */ 9 10#include "vf610-pinfunc.h" 11#include <dt-bindings/clock/vf610-clock.h> 12#include <dt-bindings/interrupt-controller/irq.h> 13#include <dt-bindings/gpio/gpio.h> 14 15/ { 16 aliases { 17 can0 = &can0; 18 can1 = &can1; 19 serial0 = &uart0; 20 serial1 = &uart1; 21 serial2 = &uart2; 22 serial3 = &uart3; 23 serial4 = &uart4; 24 serial5 = &uart5; 25 gpio0 = &gpio0; 26 gpio1 = &gpio1; 27 gpio2 = &gpio2; 28 gpio3 = &gpio3; 29 gpio4 = &gpio4; 30 usbphy0 = &usbphy0; 31 usbphy1 = &usbphy1; 32 }; 33 34 fxosc: fxosc { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <24000000>; 38 }; 39 40 sxosc: sxosc { 41 compatible = "fixed-clock"; 42 #clock-cells = <0>; 43 clock-frequency = <32768>; 44 }; 45 46 reboot: syscon-reboot { 47 compatible = "syscon-reboot"; 48 regmap = <&src>; 49 offset = <0x0>; 50 mask = <0x1000>; 51 }; 52 53 soc { 54 #address-cells = <1>; 55 #size-cells = <1>; 56 compatible = "simple-bus"; 57 interrupt-parent = <&mscm_ir>; 58 ranges; 59 60 aips0: aips-bus@40000000 { 61 compatible = "fsl,aips-bus", "simple-bus"; 62 #address-cells = <1>; 63 #size-cells = <1>; 64 ranges; 65 66 mscm_cpucfg: cpucfg@40001000 { 67 compatible = "fsl,vf610-mscm-cpucfg", "syscon"; 68 reg = <0x40001000 0x800>; 69 }; 70 71 mscm_ir: interrupt-controller@40001800 { 72 compatible = "fsl,vf610-mscm-ir"; 73 reg = <0x40001800 0x400>; 74 fsl,cpucfg = <&mscm_cpucfg>; 75 interrupt-controller; 76 #interrupt-cells = <2>; 77 }; 78 79 edma0: dma-controller@40018000 { 80 #dma-cells = <2>; 81 compatible = "fsl,vf610-edma"; 82 reg = <0x40018000 0x2000>, 83 <0x40024000 0x1000>, 84 <0x40025000 0x1000>; 85 dma-channels = <32>; 86 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>, 87 <9 IRQ_TYPE_LEVEL_HIGH>; 88 interrupt-names = "edma-tx", "edma-err"; 89 clock-names = "dmamux0", "dmamux1"; 90 clocks = <&clks VF610_CLK_DMAMUX0>, 91 <&clks VF610_CLK_DMAMUX1>; 92 status = "disabled"; 93 }; 94 95 can0: flexcan@40020000 { 96 compatible = "fsl,vf610-flexcan"; 97 reg = <0x40020000 0x4000>; 98 interrupts = <58 IRQ_TYPE_LEVEL_HIGH>; 99 clocks = <&clks VF610_CLK_FLEXCAN0>, 100 <&clks VF610_CLK_FLEXCAN0>; 101 clock-names = "ipg", "per"; 102 status = "disabled"; 103 }; 104 105 uart0: serial@40027000 { 106 compatible = "fsl,vf610-lpuart"; 107 reg = <0x40027000 0x1000>; 108 interrupts = <61 IRQ_TYPE_LEVEL_HIGH>; 109 clocks = <&clks VF610_CLK_UART0>; 110 clock-names = "ipg"; 111 dmas = <&edma0 0 2>, 112 <&edma0 0 3>; 113 dma-names = "rx","tx"; 114 status = "disabled"; 115 }; 116 117 uart1: serial@40028000 { 118 compatible = "fsl,vf610-lpuart"; 119 reg = <0x40028000 0x1000>; 120 interrupts = <62 IRQ_TYPE_LEVEL_HIGH>; 121 clocks = <&clks VF610_CLK_UART1>; 122 clock-names = "ipg"; 123 dmas = <&edma0 0 4>, 124 <&edma0 0 5>; 125 dma-names = "rx","tx"; 126 status = "disabled"; 127 }; 128 129 uart2: serial@40029000 { 130 compatible = "fsl,vf610-lpuart"; 131 reg = <0x40029000 0x1000>; 132 interrupts = <63 IRQ_TYPE_LEVEL_HIGH>; 133 clocks = <&clks VF610_CLK_UART2>; 134 clock-names = "ipg"; 135 dmas = <&edma0 0 6>, 136 <&edma0 0 7>; 137 dma-names = "rx","tx"; 138 status = "disabled"; 139 }; 140 141 uart3: serial@4002a000 { 142 compatible = "fsl,vf610-lpuart"; 143 reg = <0x4002a000 0x1000>; 144 interrupts = <64 IRQ_TYPE_LEVEL_HIGH>; 145 clocks = <&clks VF610_CLK_UART3>; 146 clock-names = "ipg"; 147 dmas = <&edma0 0 8>, 148 <&edma0 0 9>; 149 dma-names = "rx","tx"; 150 status = "disabled"; 151 }; 152 153 dspi0: dspi0@4002c000 { 154 #address-cells = <1>; 155 #size-cells = <0>; 156 compatible = "fsl,vf610-dspi"; 157 reg = <0x4002c000 0x1000>; 158 interrupts = <67 IRQ_TYPE_LEVEL_HIGH>; 159 clocks = <&clks VF610_CLK_DSPI0>; 160 clock-names = "dspi"; 161 spi-num-chipselects = <6>; 162 status = "disabled"; 163 }; 164 165 dspi1: dspi1@4002d000 { 166 #address-cells = <1>; 167 #size-cells = <0>; 168 compatible = "fsl,vf610-dspi"; 169 reg = <0x4002d000 0x1000>; 170 interrupts = <68 IRQ_TYPE_LEVEL_HIGH>; 171 clocks = <&clks VF610_CLK_DSPI1>; 172 clock-names = "dspi"; 173 spi-num-chipselects = <4>; 174 status = "disabled"; 175 }; 176 177 sai2: sai@40031000 { 178 compatible = "fsl,vf610-sai"; 179 reg = <0x40031000 0x1000>; 180 interrupts = <86 IRQ_TYPE_LEVEL_HIGH>; 181 clocks = <&clks VF610_CLK_SAI2>, 182 <&clks VF610_CLK_SAI2_DIV>, 183 <&clks 0>, <&clks 0>; 184 clock-names = "bus", "mclk1", "mclk2", "mclk3"; 185 dma-names = "tx", "rx"; 186 dmas = <&edma0 0 21>, 187 <&edma0 0 20>; 188 status = "disabled"; 189 }; 190 191 pit: pit@40037000 { 192 compatible = "fsl,vf610-pit"; 193 reg = <0x40037000 0x1000>; 194 interrupts = <39 IRQ_TYPE_LEVEL_HIGH>; 195 clocks = <&clks VF610_CLK_PIT>; 196 clock-names = "pit"; 197 }; 198 199 pwm0: pwm@40038000 { 200 compatible = "fsl,vf610-ftm-pwm"; 201 #pwm-cells = <3>; 202 reg = <0x40038000 0x1000>; 203 clock-names = "ftm_sys", "ftm_ext", 204 "ftm_fix", "ftm_cnt_clk_en"; 205 clocks = <&clks VF610_CLK_FTM0>, 206 <&clks VF610_CLK_FTM0_EXT_SEL>, 207 <&clks VF610_CLK_FTM0_FIX_SEL>, 208 <&clks VF610_CLK_FTM0_EXT_FIX_EN>; 209 status = "disabled"; 210 }; 211 212 pwm1: pwm@40039000 { 213 compatible = "fsl,vf610-ftm-pwm"; 214 #pwm-cells = <3>; 215 reg = <0x40039000 0x1000>; 216 clock-names = "ftm_sys", "ftm_ext", 217 "ftm_fix", "ftm_cnt_clk_en"; 218 clocks = <&clks VF610_CLK_FTM1>, 219 <&clks VF610_CLK_FTM1_EXT_SEL>, 220 <&clks VF610_CLK_FTM1_FIX_SEL>, 221 <&clks VF610_CLK_FTM1_EXT_FIX_EN>; 222 status = "disabled"; 223 }; 224 225 adc0: adc@4003b000 { 226 compatible = "fsl,vf610-adc"; 227 reg = <0x4003b000 0x1000>; 228 interrupts = <53 IRQ_TYPE_LEVEL_HIGH>; 229 clocks = <&clks VF610_CLK_ADC0>; 230 clock-names = "adc"; 231 #io-channel-cells = <1>; 232 status = "disabled"; 233 fsl,adck-max-frequency = <30000000>, <40000000>, 234 <20000000>; 235 }; 236 237 wdoga5: wdog@4003e000 { 238 compatible = "fsl,vf610-wdt", "fsl,imx21-wdt"; 239 reg = <0x4003e000 0x1000>; 240 interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; 241 clocks = <&clks VF610_CLK_WDT>; 242 clock-names = "wdog"; 243 status = "disabled"; 244 }; 245 246 qspi0: quadspi@40044000 { 247 #address-cells = <1>; 248 #size-cells = <0>; 249 compatible = "fsl,vf610-qspi"; 250 reg = <0x40044000 0x1000>, <0x20000000 0x10000000>; 251 reg-names = "QuadSPI", "QuadSPI-memory"; 252 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; 253 clocks = <&clks VF610_CLK_QSPI0_EN>, 254 <&clks VF610_CLK_QSPI0>; 255 clock-names = "qspi_en", "qspi"; 256 status = "disabled"; 257 }; 258 259 iomuxc: iomuxc@40048000 { 260 compatible = "fsl,vf610-iomuxc"; 261 reg = <0x40048000 0x1000>; 262 }; 263 264 gpio0: gpio@40049000 { 265 compatible = "fsl,vf610-gpio"; 266 reg = <0x40049000 0x1000 0x400ff000 0x40>; 267 gpio-controller; 268 #gpio-cells = <2>; 269 interrupts = <107 IRQ_TYPE_LEVEL_HIGH>; 270 interrupt-controller; 271 #interrupt-cells = <2>; 272 gpio-ranges = <&iomuxc 0 0 32>; 273 }; 274 275 gpio1: gpio@4004a000 { 276 compatible = "fsl,vf610-gpio"; 277 reg = <0x4004a000 0x1000 0x400ff040 0x40>; 278 gpio-controller; 279 #gpio-cells = <2>; 280 interrupts = <108 IRQ_TYPE_LEVEL_HIGH>; 281 interrupt-controller; 282 #interrupt-cells = <2>; 283 gpio-ranges = <&iomuxc 0 32 32>; 284 }; 285 286 gpio2: gpio@4004b000 { 287 compatible = "fsl,vf610-gpio"; 288 reg = <0x4004b000 0x1000 0x400ff080 0x40>; 289 gpio-controller; 290 #gpio-cells = <2>; 291 interrupts = <109 IRQ_TYPE_LEVEL_HIGH>; 292 interrupt-controller; 293 #interrupt-cells = <2>; 294 gpio-ranges = <&iomuxc 0 64 32>; 295 }; 296 297 gpio3: gpio@4004c000 { 298 compatible = "fsl,vf610-gpio"; 299 reg = <0x4004c000 0x1000 0x400ff0c0 0x40>; 300 gpio-controller; 301 #gpio-cells = <2>; 302 interrupts = <110 IRQ_TYPE_LEVEL_HIGH>; 303 interrupt-controller; 304 #interrupt-cells = <2>; 305 gpio-ranges = <&iomuxc 0 96 32>; 306 }; 307 308 gpio4: gpio@4004d000 { 309 compatible = "fsl,vf610-gpio"; 310 reg = <0x4004d000 0x1000 0x400ff100 0x40>; 311 gpio-controller; 312 #gpio-cells = <2>; 313 interrupts = <111 IRQ_TYPE_LEVEL_HIGH>; 314 interrupt-controller; 315 #interrupt-cells = <2>; 316 gpio-ranges = <&iomuxc 0 128 7>; 317 }; 318 319 anatop: anatop@40050000 { 320 compatible = "fsl,vf610-anatop", "syscon"; 321 reg = <0x40050000 0x400>; 322 }; 323 324 usbphy0: usbphy@40050800 { 325 compatible = "fsl,vf610-usbphy"; 326 reg = <0x40050800 0x400>; 327 interrupts = <50 IRQ_TYPE_LEVEL_HIGH>; 328 clocks = <&clks VF610_CLK_USBPHY0>; 329 fsl,anatop = <&anatop>; 330 status = "disabled"; 331 }; 332 333 usbphy1: usbphy@40050c00 { 334 compatible = "fsl,vf610-usbphy"; 335 reg = <0x40050c00 0x400>; 336 interrupts = <51 IRQ_TYPE_LEVEL_HIGH>; 337 clocks = <&clks VF610_CLK_USBPHY1>; 338 fsl,anatop = <&anatop>; 339 status = "disabled"; 340 }; 341 342 i2c0: i2c@40066000 { 343 #address-cells = <1>; 344 #size-cells = <0>; 345 compatible = "fsl,vf610-i2c"; 346 reg = <0x40066000 0x1000>; 347 interrupts = <71 IRQ_TYPE_LEVEL_HIGH>; 348 clocks = <&clks VF610_CLK_I2C0>; 349 clock-names = "ipg"; 350 dmas = <&edma0 0 50>, 351 <&edma0 0 51>; 352 dma-names = "rx","tx"; 353 status = "disabled"; 354 }; 355 356 i2c1: i2c@40067000 { 357 #address-cells = <1>; 358 #size-cells = <0>; 359 compatible = "fsl,vf610-i2c"; 360 reg = <0x40067000 0x1000>; 361 interrupts = <72 IRQ_TYPE_LEVEL_HIGH>; 362 clocks = <&clks VF610_CLK_I2C1>; 363 clock-names = "ipg"; 364 dmas = <&edma0 0 52>, 365 <&edma0 0 53>; 366 dma-names = "rx","tx"; 367 status = "disabled"; 368 }; 369 370 clks: ccm@4006b000 { 371 compatible = "fsl,vf610-ccm"; 372 reg = <0x4006b000 0x1000>; 373 clocks = <&sxosc>, <&fxosc>; 374 clock-names = "sxosc", "fxosc"; 375 #clock-cells = <1>; 376 }; 377 378 usbdev0: usb@40034000 { 379 compatible = "fsl,vf610-usb", "fsl,imx27-usb"; 380 reg = <0x40034000 0x800>; 381 interrupts = <75 IRQ_TYPE_LEVEL_HIGH>; 382 clocks = <&clks VF610_CLK_USBC0>; 383 fsl,usbphy = <&usbphy0>; 384 fsl,usbmisc = <&usbmisc0 0>; 385 dr_mode = "peripheral"; 386 status = "disabled"; 387 }; 388 389 usbmisc0: usb@40034800 { 390 #index-cells = <1>; 391 compatible = "fsl,vf610-usbmisc"; 392 reg = <0x40034800 0x200>; 393 clocks = <&clks VF610_CLK_USBC0>; 394 status = "disabled"; 395 }; 396 397 src: src@4006e000 { 398 compatible = "fsl,vf610-src", "syscon"; 399 reg = <0x4006e000 0x1000>; 400 interrupts = <96 IRQ_TYPE_LEVEL_HIGH>; 401 }; 402 }; 403 404 aips1: aips-bus@40080000 { 405 compatible = "fsl,aips-bus", "simple-bus"; 406 #address-cells = <1>; 407 #size-cells = <1>; 408 ranges; 409 410 edma1: dma-controller@40098000 { 411 #dma-cells = <2>; 412 compatible = "fsl,vf610-edma"; 413 reg = <0x40098000 0x2000>, 414 <0x400a1000 0x1000>, 415 <0x400a2000 0x1000>; 416 dma-channels = <32>; 417 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>, 418 <11 IRQ_TYPE_LEVEL_HIGH>; 419 interrupt-names = "edma-tx", "edma-err"; 420 clock-names = "dmamux0", "dmamux1"; 421 clocks = <&clks VF610_CLK_DMAMUX2>, 422 <&clks VF610_CLK_DMAMUX3>; 423 status = "disabled"; 424 }; 425 426 snvs0: snvs@400a7000 { 427 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; 428 reg = <0x400a7000 0x2000>; 429 430 snvsrtc: snvs-rtc-lp { 431 compatible = "fsl,sec-v4.0-mon-rtc-lp"; 432 regmap = <&snvs0>; 433 offset = <0x34>; 434 interrupts = <100 IRQ_TYPE_LEVEL_HIGH>; 435 clocks = <&clks VF610_CLK_SNVS>; 436 clock-names = "snvs-rtc"; 437 }; 438 }; 439 440 uart4: serial@400a9000 { 441 compatible = "fsl,vf610-lpuart"; 442 reg = <0x400a9000 0x1000>; 443 interrupts = <65 IRQ_TYPE_LEVEL_HIGH>; 444 clocks = <&clks VF610_CLK_UART4>; 445 clock-names = "ipg"; 446 status = "disabled"; 447 }; 448 449 uart5: serial@400aa000 { 450 compatible = "fsl,vf610-lpuart"; 451 reg = <0x400aa000 0x1000>; 452 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; 453 clocks = <&clks VF610_CLK_UART5>; 454 clock-names = "ipg"; 455 status = "disabled"; 456 }; 457 458 adc1: adc@400bb000 { 459 compatible = "fsl,vf610-adc"; 460 reg = <0x400bb000 0x1000>; 461 interrupts = <54 IRQ_TYPE_LEVEL_HIGH>; 462 clocks = <&clks VF610_CLK_ADC1>; 463 clock-names = "adc"; 464 #io-channel-cells = <1>; 465 status = "disabled"; 466 fsl,adck-max-frequency = <30000000>, <40000000>, 467 <20000000>; 468 }; 469 470 esdhc0: esdhc@400b1000 { 471 compatible = "fsl,imx53-esdhc"; 472 reg = <0x400b1000 0x1000>; 473 interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; 474 clocks = <&clks VF610_CLK_IPG_BUS>, 475 <&clks VF610_CLK_PLATFORM_BUS>, 476 <&clks VF610_CLK_ESDHC0>; 477 clock-names = "ipg", "ahb", "per"; 478 status = "disabled"; 479 }; 480 481 esdhc1: esdhc@400b2000 { 482 compatible = "fsl,imx53-esdhc"; 483 reg = <0x400b2000 0x1000>; 484 interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; 485 clocks = <&clks VF610_CLK_IPG_BUS>, 486 <&clks VF610_CLK_PLATFORM_BUS>, 487 <&clks VF610_CLK_ESDHC1>; 488 clock-names = "ipg", "ahb", "per"; 489 status = "disabled"; 490 }; 491 492 usbh1: usb@400b4000 { 493 compatible = "fsl,vf610-usb", "fsl,imx27-usb"; 494 reg = <0x400b4000 0x800>; 495 interrupts = <76 IRQ_TYPE_LEVEL_HIGH>; 496 clocks = <&clks VF610_CLK_USBC1>; 497 fsl,usbphy = <&usbphy1>; 498 fsl,usbmisc = <&usbmisc1 0>; 499 dr_mode = "host"; 500 status = "disabled"; 501 }; 502 503 usbmisc1: usb@400b4800 { 504 #index-cells = <1>; 505 compatible = "fsl,vf610-usbmisc"; 506 reg = <0x400b4800 0x200>; 507 clocks = <&clks VF610_CLK_USBC1>; 508 status = "disabled"; 509 }; 510 511 ftm: ftm@400b8000 { 512 compatible = "fsl,ftm-timer"; 513 reg = <0x400b8000 0x1000 0x400b9000 0x1000>; 514 interrupts = <44 IRQ_TYPE_LEVEL_HIGH>; 515 clock-names = "ftm-evt", "ftm-src", 516 "ftm-evt-counter-en", "ftm-src-counter-en"; 517 clocks = <&clks VF610_CLK_FTM2>, 518 <&clks VF610_CLK_FTM3>, 519 <&clks VF610_CLK_FTM2_EXT_FIX_EN>, 520 <&clks VF610_CLK_FTM3_EXT_FIX_EN>; 521 status = "disabled"; 522 }; 523 524 qspi1: quadspi@400c4000 { 525 #address-cells = <1>; 526 #size-cells = <0>; 527 compatible = "fsl,vf610-qspi"; 528 reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>; 529 reg-names = "QuadSPI", "QuadSPI-memory"; 530 interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; 531 clocks = <&clks VF610_CLK_QSPI1_EN>, 532 <&clks VF610_CLK_QSPI1>; 533 clock-names = "qspi_en", "qspi"; 534 status = "disabled"; 535 }; 536 537 fec0: ethernet@400d0000 { 538 compatible = "fsl,mvf600-fec"; 539 reg = <0x400d0000 0x1000>; 540 interrupts = <78 IRQ_TYPE_LEVEL_HIGH>; 541 clocks = <&clks VF610_CLK_ENET0>, 542 <&clks VF610_CLK_ENET0>, 543 <&clks VF610_CLK_ENET>; 544 clock-names = "ipg", "ahb", "ptp"; 545 status = "disabled"; 546 }; 547 548 fec1: ethernet@400d1000 { 549 compatible = "fsl,mvf600-fec"; 550 reg = <0x400d1000 0x1000>; 551 interrupts = <79 IRQ_TYPE_LEVEL_HIGH>; 552 clocks = <&clks VF610_CLK_ENET1>, 553 <&clks VF610_CLK_ENET1>, 554 <&clks VF610_CLK_ENET>; 555 clock-names = "ipg", "ahb", "ptp"; 556 status = "disabled"; 557 }; 558 559 can1: flexcan@400d4000 { 560 compatible = "fsl,vf610-flexcan"; 561 reg = <0x400d4000 0x4000>; 562 interrupts = <59 IRQ_TYPE_LEVEL_HIGH>; 563 clocks = <&clks VF610_CLK_FLEXCAN1>, 564 <&clks VF610_CLK_FLEXCAN1>; 565 clock-names = "ipg", "per"; 566 status = "disabled"; 567 }; 568 569 nfc: nand@400e0000 { 570 #address-cells = <1>; 571 #size-cells = <0>; 572 compatible = "fsl,vf610-nfc"; 573 reg = <0x400e0000 0x4000>; 574 interrupts = <83 IRQ_TYPE_LEVEL_HIGH>; 575 clocks = <&clks VF610_CLK_NFC>; 576 clock-names = "nfc"; 577 status = "disabled"; 578 }; 579 580 i2c2: i2c@400e6000 { 581 #address-cells = <1>; 582 #size-cells = <0>; 583 compatible = "fsl,vf610-i2c"; 584 reg = <0x400e6000 0x1000>; 585 interrupts = <73 IRQ_TYPE_LEVEL_HIGH>; 586 clocks = <&clks VF610_CLK_I2C2>; 587 clock-names = "ipg"; 588 dmas = <&edma0 1 36>, 589 <&edma0 1 37>; 590 dma-names = "rx","tx"; 591 status = "disabled"; 592 }; 593 594 i2c3: i2c@400e7000 { 595 #address-cells = <1>; 596 #size-cells = <0>; 597 compatible = "fsl,vf610-i2c"; 598 reg = <0x400e7000 0x1000>; 599 interrupts = <74 IRQ_TYPE_LEVEL_HIGH>; 600 clocks = <&clks VF610_CLK_I2C3>; 601 clock-names = "ipg"; 602 dmas = <&edma0 1 38>, 603 <&edma0 1 39>; 604 dma-names = "rx","tx"; 605 status = "disabled"; 606 }; 607 }; 608 }; 609}; 610