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1 /*
2  * Copyright (C) 2015 Freescale Semiconductor, Inc.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8 #include <linux/irqchip.h>
9 #include <linux/mfd/syscon.h>
10 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
11 #include <linux/micrel_phy.h>
12 #include <linux/of_platform.h>
13 #include <linux/phy.h>
14 #include <linux/regmap.h>
15 #include <asm/mach/arch.h>
16 #include <asm/mach/map.h>
17 
18 #include "common.h"
19 
imx6ul_enet_clk_init(void)20 static void __init imx6ul_enet_clk_init(void)
21 {
22 	struct regmap *gpr;
23 
24 	gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr");
25 	if (!IS_ERR(gpr))
26 		regmap_update_bits(gpr, IOMUXC_GPR1, IMX6UL_GPR1_ENET_CLK_DIR,
27 				   IMX6UL_GPR1_ENET_CLK_OUTPUT);
28 	else
29 		pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n");
30 
31 }
32 
ksz8081_phy_fixup(struct phy_device * dev)33 static int ksz8081_phy_fixup(struct phy_device *dev)
34 {
35 	if (dev && dev->interface == PHY_INTERFACE_MODE_MII) {
36 		phy_write(dev, 0x1f, 0x8110);
37 		phy_write(dev, 0x16, 0x201);
38 	} else if (dev && dev->interface == PHY_INTERFACE_MODE_RMII) {
39 		phy_write(dev, 0x1f, 0x8190);
40 		phy_write(dev, 0x16, 0x202);
41 	}
42 
43 	return 0;
44 }
45 
imx6ul_enet_phy_init(void)46 static void __init imx6ul_enet_phy_init(void)
47 {
48 	if (IS_BUILTIN(CONFIG_PHYLIB))
49 		phy_register_fixup_for_uid(PHY_ID_KSZ8081, MICREL_PHY_ID_MASK,
50 					   ksz8081_phy_fixup);
51 }
52 
imx6ul_enet_init(void)53 static inline void imx6ul_enet_init(void)
54 {
55 	imx6ul_enet_clk_init();
56 	imx6ul_enet_phy_init();
57 }
58 
imx6ul_init_machine(void)59 static void __init imx6ul_init_machine(void)
60 {
61 	struct device *parent;
62 
63 	parent = imx_soc_device_init();
64 	if (parent == NULL)
65 		pr_warn("failed to initialize soc device\n");
66 
67 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
68 	imx6ul_enet_init();
69 	imx_anatop_init();
70 	imx6ul_pm_init();
71 }
72 
imx6ul_init_irq(void)73 static void __init imx6ul_init_irq(void)
74 {
75 	imx_init_revision_from_anatop();
76 	imx_src_init();
77 	irqchip_init();
78 	imx6_pm_ccm_init("fsl,imx6ul-ccm");
79 }
80 
imx6ul_init_late(void)81 static void __init imx6ul_init_late(void)
82 {
83 	if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
84 		platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
85 }
86 
87 static const char *imx6ul_dt_compat[] __initconst = {
88 	"fsl,imx6ul",
89 	NULL,
90 };
91 
92 DT_MACHINE_START(IMX6UL, "Freescale i.MX6 Ultralite (Device Tree)")
93 	.init_irq	= imx6ul_init_irq,
94 	.init_machine	= imx6ul_init_machine,
95 	.init_late	= imx6ul_init_late,
96 	.dt_compat	= imx6ul_dt_compat,
97 MACHINE_END
98