1 /*
2 * Symmetric Multi Processing (SMP) support for Armada XP
3 *
4 * Copyright (C) 2012 Marvell
5 *
6 * Lior Amsalem <alior@marvell.com>
7 * Yehuda Yitschak <yehuday@marvell.com>
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 *
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
14 *
15 * The Armada XP SoC has 4 ARMv7 PJ4B CPUs running in full HW coherency
16 * This file implements the routines for preparing the SMP infrastructure
17 * and waking up the secondary CPUs
18 */
19
20 #include <linux/init.h>
21 #include <linux/smp.h>
22 #include <linux/clk.h>
23 #include <linux/of.h>
24 #include <linux/of_address.h>
25 #include <linux/mbus.h>
26 #include <asm/cacheflush.h>
27 #include <asm/smp_plat.h>
28 #include "common.h"
29 #include "armada-370-xp.h"
30 #include "pmsu.h"
31 #include "coherency.h"
32
33 #define ARMADA_XP_MAX_CPUS 4
34
35 #define AXP_BOOTROM_BASE 0xfff00000
36 #define AXP_BOOTROM_SIZE 0x100000
37
get_cpu_clk(int cpu)38 static struct clk *get_cpu_clk(int cpu)
39 {
40 struct clk *cpu_clk;
41 struct device_node *np = of_get_cpu_node(cpu, NULL);
42
43 if (WARN(!np, "missing cpu node\n"))
44 return NULL;
45 cpu_clk = of_clk_get(np, 0);
46 if (WARN_ON(IS_ERR(cpu_clk)))
47 return NULL;
48 return cpu_clk;
49 }
50
set_secondary_cpu_clock(unsigned int cpu)51 static void set_secondary_cpu_clock(unsigned int cpu)
52 {
53 int thiscpu;
54 unsigned long rate;
55 struct clk *cpu_clk;
56
57 thiscpu = get_cpu();
58
59 cpu_clk = get_cpu_clk(thiscpu);
60 if (!cpu_clk)
61 goto out;
62 clk_prepare_enable(cpu_clk);
63 rate = clk_get_rate(cpu_clk);
64
65 cpu_clk = get_cpu_clk(cpu);
66 if (!cpu_clk)
67 goto out;
68 clk_set_rate(cpu_clk, rate);
69 clk_prepare_enable(cpu_clk);
70
71 out:
72 put_cpu();
73 }
74
armada_xp_boot_secondary(unsigned int cpu,struct task_struct * idle)75 static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle)
76 {
77 int ret, hw_cpu;
78
79 pr_info("Booting CPU %d\n", cpu);
80
81 hw_cpu = cpu_logical_map(cpu);
82 set_secondary_cpu_clock(hw_cpu);
83 mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup);
84
85 /*
86 * This is needed to wake up CPUs in the offline state after
87 * using CPU hotplug.
88 */
89 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
90
91 /*
92 * This is needed to take secondary CPUs out of reset on the
93 * initial boot.
94 */
95 ret = mvebu_cpu_reset_deassert(hw_cpu);
96 if (ret) {
97 pr_warn("unable to boot CPU: %d\n", ret);
98 return ret;
99 }
100
101 return 0;
102 }
103
104 /*
105 * When a CPU is brought back online, either through CPU hotplug, or
106 * because of the boot of a kexec'ed kernel, the PMSU configuration
107 * for this CPU might be in the deep idle state, preventing this CPU
108 * from receiving interrupts. Here, we therefore take out the current
109 * CPU from this state, which was entered by armada_xp_cpu_die()
110 * below.
111 */
armada_xp_secondary_init(unsigned int cpu)112 static void armada_xp_secondary_init(unsigned int cpu)
113 {
114 mvebu_v7_pmsu_idle_exit();
115 }
116
armada_xp_smp_init_cpus(void)117 static void __init armada_xp_smp_init_cpus(void)
118 {
119 unsigned int ncores = num_possible_cpus();
120
121 if (ncores == 0 || ncores > ARMADA_XP_MAX_CPUS)
122 panic("Invalid number of CPUs in DT\n");
123 }
124
armada_xp_smp_prepare_cpus(unsigned int max_cpus)125 static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
126 {
127 struct device_node *node;
128 struct resource res;
129 int err;
130
131 flush_cache_all();
132 set_cpu_coherent();
133
134 /*
135 * In order to boot the secondary CPUs we need to ensure
136 * the bootROM is mapped at the correct address.
137 */
138 node = of_find_compatible_node(NULL, NULL, "marvell,bootrom");
139 if (!node)
140 panic("Cannot find 'marvell,bootrom' compatible node");
141
142 err = of_address_to_resource(node, 0, &res);
143 if (err < 0)
144 panic("Cannot get 'bootrom' node address");
145
146 if (res.start != AXP_BOOTROM_BASE ||
147 resource_size(&res) != AXP_BOOTROM_SIZE)
148 panic("The address for the BootROM is incorrect");
149 }
150
151 #ifdef CONFIG_HOTPLUG_CPU
armada_xp_cpu_die(unsigned int cpu)152 static void armada_xp_cpu_die(unsigned int cpu)
153 {
154 /*
155 * CPU hotplug is implemented by putting offline CPUs into the
156 * deep idle sleep state.
157 */
158 armada_370_xp_pmsu_idle_enter(true);
159 }
160
161 /*
162 * We need a dummy function, so that platform_can_cpu_hotplug() knows
163 * we support CPU hotplug. However, the function does not need to do
164 * anything, because CPUs going offline can enter the deep idle state
165 * by themselves, without any help from a still alive CPU.
166 */
armada_xp_cpu_kill(unsigned int cpu)167 static int armada_xp_cpu_kill(unsigned int cpu)
168 {
169 return 1;
170 }
171 #endif
172
173 struct smp_operations armada_xp_smp_ops __initdata = {
174 .smp_init_cpus = armada_xp_smp_init_cpus,
175 .smp_prepare_cpus = armada_xp_smp_prepare_cpus,
176 .smp_boot_secondary = armada_xp_boot_secondary,
177 .smp_secondary_init = armada_xp_secondary_init,
178 #ifdef CONFIG_HOTPLUG_CPU
179 .cpu_die = armada_xp_cpu_die,
180 .cpu_kill = armada_xp_cpu_kill,
181 #endif
182 };
183
184 CPU_METHOD_OF_DECLARE(armada_xp_smp, "marvell,armada-xp-smp",
185 &armada_xp_smp_ops);
186