1 /* linux/arch/arm/mach-s3c2410/include/pm-core.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * S3C24xx - PM core support for arch/arm/plat-s3c/pm.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13 #include <linux/delay.h>
14 #include <linux/io.h>
15
16 #include "regs-clock.h"
17 #include "regs-irq.h"
18
s3c_pm_debug_init_uart(void)19 static inline void s3c_pm_debug_init_uart(void)
20 {
21 unsigned long tmp = __raw_readl(S3C2410_CLKCON);
22
23 /* re-start uart clocks */
24 tmp |= S3C2410_CLKCON_UART0;
25 tmp |= S3C2410_CLKCON_UART1;
26 tmp |= S3C2410_CLKCON_UART2;
27
28 __raw_writel(tmp, S3C2410_CLKCON);
29 udelay(10);
30 }
31
s3c_pm_arch_prepare_irqs(void)32 static inline void s3c_pm_arch_prepare_irqs(void)
33 {
34 __raw_writel(s3c_irqwake_intmask, S3C2410_INTMSK);
35 __raw_writel(s3c_irqwake_eintmask, S3C2410_EINTMASK);
36
37 /* ack any outstanding external interrupts before we go to sleep */
38
39 __raw_writel(__raw_readl(S3C2410_EINTPEND), S3C2410_EINTPEND);
40 __raw_writel(__raw_readl(S3C2410_INTPND), S3C2410_INTPND);
41 __raw_writel(__raw_readl(S3C2410_SRCPND), S3C2410_SRCPND);
42
43 }
44
s3c_pm_arch_stop_clocks(void)45 static inline void s3c_pm_arch_stop_clocks(void)
46 {
47 __raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */
48 }
49
50 /* s3c2410_pm_show_resume_irqs
51 *
52 * print any IRQs asserted at resume time (ie, we woke from)
53 */
s3c_pm_show_resume_irqs(int start,unsigned long which,unsigned long mask)54 static inline void s3c_pm_show_resume_irqs(int start, unsigned long which,
55 unsigned long mask)
56 {
57 int i;
58
59 which &= ~mask;
60
61 for (i = 0; i <= 31; i++) {
62 if (which & (1L<<i)) {
63 S3C_PMDBG("IRQ %d asserted at resume\n", start+i);
64 }
65 }
66 }
67
s3c_pm_arch_show_resume_irqs(void)68 static inline void s3c_pm_arch_show_resume_irqs(void)
69 {
70 S3C_PMDBG("post sleep: IRQs 0x%08x, 0x%08x\n",
71 __raw_readl(S3C2410_SRCPND),
72 __raw_readl(S3C2410_EINTPEND));
73
74 s3c_pm_show_resume_irqs(IRQ_EINT0, __raw_readl(S3C2410_SRCPND),
75 s3c_irqwake_intmask);
76
77 s3c_pm_show_resume_irqs(IRQ_EINT4-4, __raw_readl(S3C2410_EINTPEND),
78 s3c_irqwake_eintmask);
79 }
80
s3c_pm_arch_update_uart(void __iomem * regs,struct pm_uart_save * save)81 static inline void s3c_pm_arch_update_uart(void __iomem *regs,
82 struct pm_uart_save *save)
83 {
84 }
85
s3c_pm_restored_gpios(void)86 static inline void s3c_pm_restored_gpios(void) { }
samsung_pm_saved_gpios(void)87 static inline void samsung_pm_saved_gpios(void) { }
88