1 /*
2 * arch/arm/probes/kprobes/test-thumb.c
3 *
4 * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <asm/opcodes.h>
14 #include <asm/probes.h>
15
16 #include "test-core.h"
17
18
19 #define TEST_ISA "16"
20
21 #define DONT_TEST_IN_ITBLOCK(tests) \
22 kprobe_test_flags |= TEST_FLAG_NO_ITBLOCK; \
23 tests \
24 kprobe_test_flags &= ~TEST_FLAG_NO_ITBLOCK;
25
26 #define CONDITION_INSTRUCTIONS(cc_pos, tests) \
27 kprobe_test_cc_position = cc_pos; \
28 DONT_TEST_IN_ITBLOCK(tests) \
29 kprobe_test_cc_position = 0;
30
31 #define TEST_ITBLOCK(code) \
32 kprobe_test_flags |= TEST_FLAG_FULL_ITBLOCK; \
33 TESTCASE_START(code) \
34 TEST_ARG_END("") \
35 "50: nop \n\t" \
36 "1: "code" \n\t" \
37 " mov r1, #0x11 \n\t" \
38 " mov r2, #0x22 \n\t" \
39 " mov r3, #0x33 \n\t" \
40 "2: nop \n\t" \
41 TESTCASE_END \
42 kprobe_test_flags &= ~TEST_FLAG_FULL_ITBLOCK;
43
44 #define TEST_THUMB_TO_ARM_INTERWORK_P(code1, reg, val, code2) \
45 TESTCASE_START(code1 #reg code2) \
46 TEST_ARG_PTR(reg, val) \
47 TEST_ARG_REG(14, 99f+1) \
48 TEST_ARG_MEM(15, 3f) \
49 TEST_ARG_END("") \
50 " nop \n\t" /* To align 1f */ \
51 "50: nop \n\t" \
52 "1: "code1 #reg code2" \n\t" \
53 " bx lr \n\t" \
54 ".arm \n\t" \
55 "3: adr lr, 2f+1 \n\t" \
56 " bx lr \n\t" \
57 ".thumb \n\t" \
58 "2: nop \n\t" \
59 TESTCASE_END
60
61
kprobe_thumb16_test_cases(void)62 void kprobe_thumb16_test_cases(void)
63 {
64 kprobe_test_flags = TEST_FLAG_NARROW_INSTR;
65
66 TEST_GROUP("Shift (immediate), add, subtract, move, and compare")
67
68 TEST_R( "lsls r7, r",0,VAL1,", #5")
69 TEST_R( "lsls r0, r",7,VAL2,", #11")
70 TEST_R( "lsrs r7, r",0,VAL1,", #5")
71 TEST_R( "lsrs r0, r",7,VAL2,", #11")
72 TEST_R( "asrs r7, r",0,VAL1,", #5")
73 TEST_R( "asrs r0, r",7,VAL2,", #11")
74 TEST_RR( "adds r2, r",0,VAL1,", r",7,VAL2,"")
75 TEST_RR( "adds r5, r",7,VAL2,", r",0,VAL2,"")
76 TEST_RR( "subs r2, r",0,VAL1,", r",7,VAL2,"")
77 TEST_RR( "subs r5, r",7,VAL2,", r",0,VAL2,"")
78 TEST_R( "adds r7, r",0,VAL1,", #5")
79 TEST_R( "adds r0, r",7,VAL2,", #2")
80 TEST_R( "subs r7, r",0,VAL1,", #5")
81 TEST_R( "subs r0, r",7,VAL2,", #2")
82 TEST( "movs.n r0, #0x5f")
83 TEST( "movs.n r7, #0xa0")
84 TEST_R( "cmp.n r",0,0x5e, ", #0x5f")
85 TEST_R( "cmp.n r",5,0x15f,", #0x5f")
86 TEST_R( "cmp.n r",7,0xa0, ", #0xa0")
87 TEST_R( "adds.n r",0,VAL1,", #0x5f")
88 TEST_R( "adds.n r",7,VAL2,", #0xa0")
89 TEST_R( "subs.n r",0,VAL1,", #0x5f")
90 TEST_R( "subs.n r",7,VAL2,", #0xa0")
91
92 TEST_GROUP("16-bit Thumb data-processing instructions")
93
94 #define DATA_PROCESSING16(op,val) \
95 TEST_RR( op" r",0,VAL1,", r",7,val,"") \
96 TEST_RR( op" r",7,VAL2,", r",0,val,"")
97
98 DATA_PROCESSING16("ands",0xf00f00ff)
99 DATA_PROCESSING16("eors",0xf00f00ff)
100 DATA_PROCESSING16("lsls",11)
101 DATA_PROCESSING16("lsrs",11)
102 DATA_PROCESSING16("asrs",11)
103 DATA_PROCESSING16("adcs",VAL2)
104 DATA_PROCESSING16("sbcs",VAL2)
105 DATA_PROCESSING16("rors",11)
106 DATA_PROCESSING16("tst",0xf00f00ff)
107 TEST_R("rsbs r",0,VAL1,", #0")
108 TEST_R("rsbs r",7,VAL2,", #0")
109 DATA_PROCESSING16("cmp",0xf00f00ff)
110 DATA_PROCESSING16("cmn",0xf00f00ff)
111 DATA_PROCESSING16("orrs",0xf00f00ff)
112 DATA_PROCESSING16("muls",VAL2)
113 DATA_PROCESSING16("bics",0xf00f00ff)
114 DATA_PROCESSING16("mvns",VAL2)
115
116 TEST_GROUP("Special data instructions and branch and exchange")
117
118 TEST_RR( "add r",0, VAL1,", r",7,VAL2,"")
119 TEST_RR( "add r",3, VAL2,", r",8,VAL3,"")
120 TEST_RR( "add r",8, VAL3,", r",0,VAL1,"")
121 TEST_R( "add sp" ", r",8,-8, "")
122 TEST_R( "add r",14,VAL1,", pc")
123 TEST_BF_R("add pc" ", r",0,2f-1f-8,"")
124 TEST_UNSUPPORTED(__inst_thumb16(0x44ff) " @ add pc, pc")
125
126 TEST_RR( "cmp r",3,VAL1,", r",8,VAL2,"")
127 TEST_RR( "cmp r",8,VAL2,", r",0,VAL1,"")
128 TEST_R( "cmp sp" ", r",8,-8, "")
129
130 TEST_R( "mov r0, r",7,VAL2,"")
131 TEST_R( "mov r3, r",8,VAL3,"")
132 TEST_R( "mov r8, r",0,VAL1,"")
133 TEST_P( "mov sp, r",8,-8, "")
134 TEST( "mov lr, pc")
135 TEST_BF_R("mov pc, r",0,2f, "")
136
137 TEST_BF_R("bx r",0, 2f+1,"")
138 TEST_BF_R("bx r",14,2f+1,"")
139 TESTCASE_START("bx pc")
140 TEST_ARG_REG(14, 99f+1)
141 TEST_ARG_END("")
142 " nop \n\t" /* To align the bx pc*/
143 "50: nop \n\t"
144 "1: bx pc \n\t"
145 " bx lr \n\t"
146 ".arm \n\t"
147 " adr lr, 2f+1 \n\t"
148 " bx lr \n\t"
149 ".thumb \n\t"
150 "2: nop \n\t"
151 TESTCASE_END
152
153 TEST_BF_R("blx r",0, 2f+1,"")
154 TEST_BB_R("blx r",14,2f+1,"")
155 TEST_UNSUPPORTED(__inst_thumb16(0x47f8) " @ blx pc")
156
157 TEST_GROUP("Load from Literal Pool")
158
159 TEST_X( "ldr r0, 3f",
160 ".align \n\t"
161 "3: .word "__stringify(VAL1))
162 TEST_X( "ldr r7, 3f",
163 ".space 128 \n\t"
164 ".align \n\t"
165 "3: .word "__stringify(VAL2))
166
167 TEST_GROUP("16-bit Thumb Load/store instructions")
168
169 TEST_RPR("str r",0, VAL1,", [r",1, 24,", r",2, 48,"]")
170 TEST_RPR("str r",7, VAL2,", [r",6, 24,", r",5, 48,"]")
171 TEST_RPR("strh r",0, VAL1,", [r",1, 24,", r",2, 48,"]")
172 TEST_RPR("strh r",7, VAL2,", [r",6, 24,", r",5, 48,"]")
173 TEST_RPR("strb r",0, VAL1,", [r",1, 24,", r",2, 48,"]")
174 TEST_RPR("strb r",7, VAL2,", [r",6, 24,", r",5, 48,"]")
175 TEST_PR( "ldrsb r0, [r",1, 24,", r",2, 48,"]")
176 TEST_PR( "ldrsb r7, [r",6, 24,", r",5, 50,"]")
177 TEST_PR( "ldr r0, [r",1, 24,", r",2, 48,"]")
178 TEST_PR( "ldr r7, [r",6, 24,", r",5, 48,"]")
179 TEST_PR( "ldrh r0, [r",1, 24,", r",2, 48,"]")
180 TEST_PR( "ldrh r7, [r",6, 24,", r",5, 50,"]")
181 TEST_PR( "ldrb r0, [r",1, 24,", r",2, 48,"]")
182 TEST_PR( "ldrb r7, [r",6, 24,", r",5, 50,"]")
183 TEST_PR( "ldrsh r0, [r",1, 24,", r",2, 48,"]")
184 TEST_PR( "ldrsh r7, [r",6, 24,", r",5, 50,"]")
185
186 TEST_RP("str r",0, VAL1,", [r",1, 24,", #120]")
187 TEST_RP("str r",7, VAL2,", [r",6, 24,", #120]")
188 TEST_P( "ldr r0, [r",1, 24,", #120]")
189 TEST_P( "ldr r7, [r",6, 24,", #120]")
190 TEST_RP("strb r",0, VAL1,", [r",1, 24,", #30]")
191 TEST_RP("strb r",7, VAL2,", [r",6, 24,", #30]")
192 TEST_P( "ldrb r0, [r",1, 24,", #30]")
193 TEST_P( "ldrb r7, [r",6, 24,", #30]")
194 TEST_RP("strh r",0, VAL1,", [r",1, 24,", #60]")
195 TEST_RP("strh r",7, VAL2,", [r",6, 24,", #60]")
196 TEST_P( "ldrh r0, [r",1, 24,", #60]")
197 TEST_P( "ldrh r7, [r",6, 24,", #60]")
198
199 TEST_R( "str r",0, VAL1,", [sp, #0]")
200 TEST_R( "str r",7, VAL2,", [sp, #160]")
201 TEST( "ldr r0, [sp, #0]")
202 TEST( "ldr r7, [sp, #160]")
203
204 TEST_RP("str r",0, VAL1,", [r",0, 24,"]")
205 TEST_P( "ldr r0, [r",0, 24,"]")
206
207 TEST_GROUP("Generate PC-/SP-relative address")
208
209 TEST("add r0, pc, #4")
210 TEST("add r7, pc, #1020")
211 TEST("add r0, sp, #4")
212 TEST("add r7, sp, #1020")
213
214 TEST_GROUP("Miscellaneous 16-bit instructions")
215
216 TEST_UNSUPPORTED( "cpsie i")
217 TEST_UNSUPPORTED( "cpsid i")
218 TEST_UNSUPPORTED( "setend le")
219 TEST_UNSUPPORTED( "setend be")
220
221 TEST("add sp, #"__stringify(TEST_MEMORY_SIZE)) /* Assumes TEST_MEMORY_SIZE < 0x400 */
222 TEST("sub sp, #0x7f*4")
223
224 DONT_TEST_IN_ITBLOCK(
225 TEST_BF_R( "cbnz r",0,0, ", 2f")
226 TEST_BF_R( "cbz r",2,-1,", 2f")
227 TEST_BF_RX( "cbnz r",4,1, ", 2f", SPACE_0x20)
228 TEST_BF_RX( "cbz r",7,0, ", 2f", SPACE_0x40)
229 )
230 TEST_R("sxth r0, r",7, HH1,"")
231 TEST_R("sxth r7, r",0, HH2,"")
232 TEST_R("sxtb r0, r",7, HH1,"")
233 TEST_R("sxtb r7, r",0, HH2,"")
234 TEST_R("uxth r0, r",7, HH1,"")
235 TEST_R("uxth r7, r",0, HH2,"")
236 TEST_R("uxtb r0, r",7, HH1,"")
237 TEST_R("uxtb r7, r",0, HH2,"")
238 TEST_R("rev r0, r",7, VAL1,"")
239 TEST_R("rev r7, r",0, VAL2,"")
240 TEST_R("rev16 r0, r",7, VAL1,"")
241 TEST_R("rev16 r7, r",0, VAL2,"")
242 TEST_UNSUPPORTED(__inst_thumb16(0xba80) "")
243 TEST_UNSUPPORTED(__inst_thumb16(0xbabf) "")
244 TEST_R("revsh r0, r",7, VAL1,"")
245 TEST_R("revsh r7, r",0, VAL2,"")
246
247 #define TEST_POPPC(code, offset) \
248 TESTCASE_START(code) \
249 TEST_ARG_PTR(13, offset) \
250 TEST_ARG_END("") \
251 TEST_BRANCH_F(code) \
252 TESTCASE_END
253
254 TEST("push {r0}")
255 TEST("push {r7}")
256 TEST("push {r14}")
257 TEST("push {r0-r7,r14}")
258 TEST("push {r0,r2,r4,r6,r14}")
259 TEST("push {r1,r3,r5,r7}")
260 TEST("pop {r0}")
261 TEST("pop {r7}")
262 TEST("pop {r0,r2,r4,r6}")
263 TEST_POPPC("pop {pc}",15*4)
264 TEST_POPPC("pop {r0-r7,pc}",7*4)
265 TEST_POPPC("pop {r1,r3,r5,r7,pc}",11*4)
266 TEST_THUMB_TO_ARM_INTERWORK_P("pop {pc} @ ",13,15*4,"")
267 TEST_THUMB_TO_ARM_INTERWORK_P("pop {r0-r7,pc} @ ",13,7*4,"")
268
269 TEST_UNSUPPORTED("bkpt.n 0")
270 TEST_UNSUPPORTED("bkpt.n 255")
271
272 TEST_SUPPORTED("yield")
273 TEST("sev")
274 TEST("nop")
275 TEST("wfi")
276 TEST_SUPPORTED("wfe")
277 TEST_UNSUPPORTED(__inst_thumb16(0xbf50) "") /* Unassigned hints */
278 TEST_UNSUPPORTED(__inst_thumb16(0xbff0) "") /* Unassigned hints */
279
280 #define TEST_IT(code, code2) \
281 TESTCASE_START(code) \
282 TEST_ARG_END("") \
283 "50: nop \n\t" \
284 "1: "code" \n\t" \
285 " "code2" \n\t" \
286 "2: nop \n\t" \
287 TESTCASE_END
288
289 DONT_TEST_IN_ITBLOCK(
290 TEST_IT("it eq","moveq r0,#0")
291 TEST_IT("it vc","movvc r0,#0")
292 TEST_IT("it le","movle r0,#0")
293 TEST_IT("ite eq","moveq r0,#0\n\t movne r1,#1")
294 TEST_IT("itet vc","movvc r0,#0\n\t movvs r1,#1\n\t movvc r2,#2")
295 TEST_IT("itete le","movle r0,#0\n\t movgt r1,#1\n\t movle r2,#2\n\t movgt r3,#3")
296 TEST_IT("itttt le","movle r0,#0\n\t movle r1,#1\n\t movle r2,#2\n\t movle r3,#3")
297 TEST_IT("iteee le","movle r0,#0\n\t movgt r1,#1\n\t movgt r2,#2\n\t movgt r3,#3")
298 )
299
300 TEST_GROUP("Load and store multiple")
301
302 TEST_P("ldmia r",4, 16*4,"!, {r0,r7}")
303 TEST_P("ldmia r",7, 16*4,"!, {r0-r6}")
304 TEST_P("stmia r",4, 16*4,"!, {r0,r7}")
305 TEST_P("stmia r",0, 16*4,"!, {r0-r7}")
306
307 TEST_GROUP("Conditional branch and Supervisor Call instructions")
308
309 CONDITION_INSTRUCTIONS(8,
310 TEST_BF("beq 2f")
311 TEST_BB("bne 2b")
312 TEST_BF("bgt 2f")
313 TEST_BB("blt 2b")
314 )
315 TEST_UNSUPPORTED(__inst_thumb16(0xde00) "")
316 TEST_UNSUPPORTED(__inst_thumb16(0xdeff) "")
317 TEST_UNSUPPORTED("svc #0x00")
318 TEST_UNSUPPORTED("svc #0xff")
319
320 TEST_GROUP("Unconditional branch")
321
322 TEST_BF( "b 2f")
323 TEST_BB( "b 2b")
324 TEST_BF_X("b 2f", SPACE_0x400)
325 TEST_BB_X("b 2b", SPACE_0x400)
326
327 TEST_GROUP("Testing instructions in IT blocks")
328
329 TEST_ITBLOCK("subs.n r0, r0")
330
331 verbose("\n");
332 }
333
334
kprobe_thumb32_test_cases(void)335 void kprobe_thumb32_test_cases(void)
336 {
337 kprobe_test_flags = 0;
338
339 TEST_GROUP("Load/store multiple")
340
341 TEST_UNSUPPORTED("rfedb sp")
342 TEST_UNSUPPORTED("rfeia sp")
343 TEST_UNSUPPORTED("rfedb sp!")
344 TEST_UNSUPPORTED("rfeia sp!")
345
346 TEST_P( "stmia r",0, 16*4,", {r0,r8}")
347 TEST_P( "stmia r",4, 16*4,", {r0-r12,r14}")
348 TEST_P( "stmia r",7, 16*4,"!, {r8-r12,r14}")
349 TEST_P( "stmia r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
350
351 TEST_P( "ldmia r",0, 16*4,", {r0,r8}")
352 TEST_P( "ldmia r",4, 0, ", {r0-r12,r14}")
353 TEST_BF_P("ldmia r",5, 8*4, "!, {r6-r12,r15}")
354 TEST_P( "ldmia r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
355 TEST_BF_P("ldmia r",14,14*4,"!, {r4,pc}")
356
357 TEST_P( "stmdb r",0, 16*4,", {r0,r8}")
358 TEST_P( "stmdb r",4, 16*4,", {r0-r12,r14}")
359 TEST_P( "stmdb r",5, 16*4,"!, {r8-r12,r14}")
360 TEST_P( "stmdb r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
361
362 TEST_P( "ldmdb r",0, 16*4,", {r0,r8}")
363 TEST_P( "ldmdb r",4, 16*4,", {r0-r12,r14}")
364 TEST_BF_P("ldmdb r",5, 16*4,"!, {r6-r12,r15}")
365 TEST_P( "ldmdb r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
366 TEST_BF_P("ldmdb r",14,16*4,"!, {r4,pc}")
367
368 TEST_P( "stmdb r",13,16*4,"!, {r3-r12,lr}")
369 TEST_P( "stmdb r",13,16*4,"!, {r3-r12}")
370 TEST_P( "stmdb r",2, 16*4,", {r3-r12,lr}")
371 TEST_P( "stmdb r",13,16*4,"!, {r2-r12,lr}")
372 TEST_P( "stmdb r",0, 16*4,", {r0-r12}")
373 TEST_P( "stmdb r",0, 16*4,", {r0-r12,lr}")
374
375 TEST_BF_P("ldmia r",13,5*4, "!, {r3-r12,pc}")
376 TEST_P( "ldmia r",13,5*4, "!, {r3-r12}")
377 TEST_BF_P("ldmia r",2, 5*4, "!, {r3-r12,pc}")
378 TEST_BF_P("ldmia r",13,4*4, "!, {r2-r12,pc}")
379 TEST_P( "ldmia r",0, 16*4,", {r0-r12}")
380 TEST_P( "ldmia r",0, 16*4,", {r0-r12,lr}")
381
382 TEST_THUMB_TO_ARM_INTERWORK_P("ldmia r",0,14*4,", {r12,pc}")
383 TEST_THUMB_TO_ARM_INTERWORK_P("ldmia r",13,2*4,", {r0-r12,pc}")
384
385 TEST_UNSUPPORTED(__inst_thumb32(0xe88f0101) " @ stmia pc, {r0,r8}")
386 TEST_UNSUPPORTED(__inst_thumb32(0xe92f5f00) " @ stmdb pc!, {r8-r12,r14}")
387 TEST_UNSUPPORTED(__inst_thumb32(0xe8bdc000) " @ ldmia r13!, {r14,pc}")
388 TEST_UNSUPPORTED(__inst_thumb32(0xe93ec000) " @ ldmdb r14!, {r14,pc}")
389 TEST_UNSUPPORTED(__inst_thumb32(0xe8a73f00) " @ stmia r7!, {r8-r12,sp}")
390 TEST_UNSUPPORTED(__inst_thumb32(0xe8a79f00) " @ stmia r7!, {r8-r12,pc}")
391 TEST_UNSUPPORTED(__inst_thumb32(0xe93e2010) " @ ldmdb r14!, {r4,sp}")
392
393 TEST_GROUP("Load/store double or exclusive, table branch")
394
395 TEST_P( "ldrd r0, r1, [r",1, 24,", #-16]")
396 TEST( "ldrd r12, r14, [sp, #16]")
397 TEST_P( "ldrd r1, r0, [r",7, 24,", #-16]!")
398 TEST( "ldrd r14, r12, [sp, #16]!")
399 TEST_P( "ldrd r1, r0, [r",7, 24,"], #16")
400 TEST( "ldrd r7, r8, [sp], #-16")
401
402 TEST_X( "ldrd r12, r14, 3f",
403 ".align 3 \n\t"
404 "3: .word "__stringify(VAL1)" \n\t"
405 " .word "__stringify(VAL2))
406
407 TEST_UNSUPPORTED(__inst_thumb32(0xe9ffec04) " @ ldrd r14, r12, [pc, #16]!")
408 TEST_UNSUPPORTED(__inst_thumb32(0xe8ffec04) " @ ldrd r14, r12, [pc], #16")
409 TEST_UNSUPPORTED(__inst_thumb32(0xe9d4d800) " @ ldrd sp, r8, [r4]")
410 TEST_UNSUPPORTED(__inst_thumb32(0xe9d4f800) " @ ldrd pc, r8, [r4]")
411 TEST_UNSUPPORTED(__inst_thumb32(0xe9d47d00) " @ ldrd r7, sp, [r4]")
412 TEST_UNSUPPORTED(__inst_thumb32(0xe9d47f00) " @ ldrd r7, pc, [r4]")
413
414 TEST_RRP("strd r",0, VAL1,", r",1, VAL2,", [r",1, 24,", #-16]")
415 TEST_RR( "strd r",12,VAL2,", r",14,VAL1,", [sp, #16]")
416 TEST_RRP("strd r",1, VAL1,", r",0, VAL2,", [r",7, 24,", #-16]!")
417 TEST_RR( "strd r",14,VAL2,", r",12,VAL1,", [sp, #16]!")
418 TEST_RRP("strd r",1, VAL1,", r",0, VAL2,", [r",7, 24,"], #16")
419 TEST_RR( "strd r",7, VAL2,", r",8, VAL1,", [sp], #-16")
420 TEST_RRP("strd r",6, VAL1,", r",7, VAL2,", [r",13, TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"]!")
421 TEST_UNSUPPORTED("strd r6, r7, [r13, #-"__stringify(MAX_STACK_SIZE)"-8]!")
422 TEST_RRP("strd r",4, VAL1,", r",5, VAL2,", [r",14, TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"-8]!")
423 TEST_UNSUPPORTED(__inst_thumb32(0xe9efec04) " @ strd r14, r12, [pc, #16]!")
424 TEST_UNSUPPORTED(__inst_thumb32(0xe8efec04) " @ strd r14, r12, [pc], #16")
425
426 TEST_RX("tbb [pc, r",0, (9f-(1f+4)),"]",
427 "9: \n\t"
428 ".byte (2f-1b-4)>>1 \n\t"
429 ".byte (3f-1b-4)>>1 \n\t"
430 "3: mvn r0, r0 \n\t"
431 "2: nop \n\t")
432
433 TEST_RX("tbb [pc, r",4, (9f-(1f+4)+1),"]",
434 "9: \n\t"
435 ".byte (2f-1b-4)>>1 \n\t"
436 ".byte (3f-1b-4)>>1 \n\t"
437 "3: mvn r0, r0 \n\t"
438 "2: nop \n\t")
439
440 TEST_RRX("tbb [r",1,9f,", r",2,0,"]",
441 "9: \n\t"
442 ".byte (2f-1b-4)>>1 \n\t"
443 ".byte (3f-1b-4)>>1 \n\t"
444 "3: mvn r0, r0 \n\t"
445 "2: nop \n\t")
446
447 TEST_RX("tbh [pc, r",7, (9f-(1f+4))>>1,", lsl #1]",
448 "9: \n\t"
449 ".short (2f-1b-4)>>1 \n\t"
450 ".short (3f-1b-4)>>1 \n\t"
451 "3: mvn r0, r0 \n\t"
452 "2: nop \n\t")
453
454 TEST_RX("tbh [pc, r",12, ((9f-(1f+4))>>1)+1,", lsl #1]",
455 "9: \n\t"
456 ".short (2f-1b-4)>>1 \n\t"
457 ".short (3f-1b-4)>>1 \n\t"
458 "3: mvn r0, r0 \n\t"
459 "2: nop \n\t")
460
461 TEST_RRX("tbh [r",1,9f, ", r",14,1,", lsl #1]",
462 "9: \n\t"
463 ".short (2f-1b-4)>>1 \n\t"
464 ".short (3f-1b-4)>>1 \n\t"
465 "3: mvn r0, r0 \n\t"
466 "2: nop \n\t")
467
468 TEST_UNSUPPORTED(__inst_thumb32(0xe8d1f01f) " @ tbh [r1, pc]")
469 TEST_UNSUPPORTED(__inst_thumb32(0xe8d1f01d) " @ tbh [r1, sp]")
470 TEST_UNSUPPORTED(__inst_thumb32(0xe8ddf012) " @ tbh [sp, r2]")
471
472 TEST_UNSUPPORTED("strexb r0, r1, [r2]")
473 TEST_UNSUPPORTED("strexh r0, r1, [r2]")
474 TEST_UNSUPPORTED("strexd r0, r1, r2, [r2]")
475 TEST_UNSUPPORTED("ldrexb r0, [r1]")
476 TEST_UNSUPPORTED("ldrexh r0, [r1]")
477 TEST_UNSUPPORTED("ldrexd r0, r1, [r1]")
478
479 TEST_GROUP("Data-processing (shifted register) and (modified immediate)")
480
481 #define _DATA_PROCESSING32_DNM(op,s,val) \
482 TEST_RR(op s".w r0, r",1, VAL1,", r",2, val, "") \
483 TEST_RR(op s" r1, r",1, VAL1,", r",2, val, ", lsl #3") \
484 TEST_RR(op s" r2, r",3, VAL1,", r",2, val, ", lsr #4") \
485 TEST_RR(op s" r3, r",3, VAL1,", r",2, val, ", asr #5") \
486 TEST_RR(op s" r4, r",5, VAL1,", r",2, N(val),", asr #6") \
487 TEST_RR(op s" r5, r",5, VAL1,", r",2, val, ", ror #7") \
488 TEST_RR(op s" r8, r",9, VAL1,", r",10,val, ", rrx") \
489 TEST_R( op s" r0, r",11,VAL1,", #0x00010001") \
490 TEST_R( op s" r11, r",0, VAL1,", #0xf5000000") \
491 TEST_R( op s" r7, r",8, VAL2,", #0x000af000")
492
493 #define DATA_PROCESSING32_DNM(op,val) \
494 _DATA_PROCESSING32_DNM(op,"",val) \
495 _DATA_PROCESSING32_DNM(op,"s",val)
496
497 #define DATA_PROCESSING32_NM(op,val) \
498 TEST_RR(op".w r",1, VAL1,", r",2, val, "") \
499 TEST_RR(op" r",1, VAL1,", r",2, val, ", lsl #3") \
500 TEST_RR(op" r",3, VAL1,", r",2, val, ", lsr #4") \
501 TEST_RR(op" r",3, VAL1,", r",2, val, ", asr #5") \
502 TEST_RR(op" r",5, VAL1,", r",2, N(val),", asr #6") \
503 TEST_RR(op" r",5, VAL1,", r",2, val, ", ror #7") \
504 TEST_RR(op" r",9, VAL1,", r",10,val, ", rrx") \
505 TEST_R( op" r",11,VAL1,", #0x00010001") \
506 TEST_R( op" r",0, VAL1,", #0xf5000000") \
507 TEST_R( op" r",8, VAL2,", #0x000af000")
508
509 #define _DATA_PROCESSING32_DM(op,s,val) \
510 TEST_R( op s".w r0, r",14, val, "") \
511 TEST_R( op s" r1, r",12, val, ", lsl #3") \
512 TEST_R( op s" r2, r",11, val, ", lsr #4") \
513 TEST_R( op s" r3, r",10, val, ", asr #5") \
514 TEST_R( op s" r4, r",9, N(val),", asr #6") \
515 TEST_R( op s" r5, r",8, val, ", ror #7") \
516 TEST_R( op s" r8, r",7,val, ", rrx") \
517 TEST( op s" r0, #0x00010001") \
518 TEST( op s" r11, #0xf5000000") \
519 TEST( op s" r7, #0x000af000") \
520 TEST( op s" r4, #0x00005a00")
521
522 #define DATA_PROCESSING32_DM(op,val) \
523 _DATA_PROCESSING32_DM(op,"",val) \
524 _DATA_PROCESSING32_DM(op,"s",val)
525
526 DATA_PROCESSING32_DNM("and",0xf00f00ff)
527 DATA_PROCESSING32_NM("tst",0xf00f00ff)
528 DATA_PROCESSING32_DNM("bic",0xf00f00ff)
529 DATA_PROCESSING32_DNM("orr",0xf00f00ff)
530 DATA_PROCESSING32_DM("mov",VAL2)
531 DATA_PROCESSING32_DNM("orn",0xf00f00ff)
532 DATA_PROCESSING32_DM("mvn",VAL2)
533 DATA_PROCESSING32_DNM("eor",0xf00f00ff)
534 DATA_PROCESSING32_NM("teq",0xf00f00ff)
535 DATA_PROCESSING32_DNM("add",VAL2)
536 DATA_PROCESSING32_NM("cmn",VAL2)
537 DATA_PROCESSING32_DNM("adc",VAL2)
538 DATA_PROCESSING32_DNM("sbc",VAL2)
539 DATA_PROCESSING32_DNM("sub",VAL2)
540 DATA_PROCESSING32_NM("cmp",VAL2)
541 DATA_PROCESSING32_DNM("rsb",VAL2)
542
543 TEST_RR("pkhbt r0, r",0, HH1,", r",1, HH2,"")
544 TEST_RR("pkhbt r14,r",12, HH1,", r",10,HH2,", lsl #2")
545 TEST_RR("pkhtb r0, r",0, HH1,", r",1, HH2,"")
546 TEST_RR("pkhtb r14,r",12, HH1,", r",10,HH2,", asr #2")
547
548 TEST_UNSUPPORTED(__inst_thumb32(0xea170f0d) " @ tst.w r7, sp")
549 TEST_UNSUPPORTED(__inst_thumb32(0xea170f0f) " @ tst.w r7, pc")
550 TEST_UNSUPPORTED(__inst_thumb32(0xea1d0f07) " @ tst.w sp, r7")
551 TEST_UNSUPPORTED(__inst_thumb32(0xea1f0f07) " @ tst.w pc, r7")
552 TEST_UNSUPPORTED(__inst_thumb32(0xf01d1f08) " @ tst sp, #0x00080008")
553 TEST_UNSUPPORTED(__inst_thumb32(0xf01f1f08) " @ tst pc, #0x00080008")
554
555 TEST_UNSUPPORTED(__inst_thumb32(0xea970f0d) " @ teq.w r7, sp")
556 TEST_UNSUPPORTED(__inst_thumb32(0xea970f0f) " @ teq.w r7, pc")
557 TEST_UNSUPPORTED(__inst_thumb32(0xea9d0f07) " @ teq.w sp, r7")
558 TEST_UNSUPPORTED(__inst_thumb32(0xea9f0f07) " @ teq.w pc, r7")
559 TEST_UNSUPPORTED(__inst_thumb32(0xf09d1f08) " @ tst sp, #0x00080008")
560 TEST_UNSUPPORTED(__inst_thumb32(0xf09f1f08) " @ tst pc, #0x00080008")
561
562 TEST_UNSUPPORTED(__inst_thumb32(0xeb170f0d) " @ cmn.w r7, sp")
563 TEST_UNSUPPORTED(__inst_thumb32(0xeb170f0f) " @ cmn.w r7, pc")
564 TEST_P("cmn.w sp, r",7,0,"")
565 TEST_UNSUPPORTED(__inst_thumb32(0xeb1f0f07) " @ cmn.w pc, r7")
566 TEST( "cmn sp, #0x00080008")
567 TEST_UNSUPPORTED(__inst_thumb32(0xf11f1f08) " @ cmn pc, #0x00080008")
568
569 TEST_UNSUPPORTED(__inst_thumb32(0xebb70f0d) " @ cmp.w r7, sp")
570 TEST_UNSUPPORTED(__inst_thumb32(0xebb70f0f) " @ cmp.w r7, pc")
571 TEST_P("cmp.w sp, r",7,0,"")
572 TEST_UNSUPPORTED(__inst_thumb32(0xebbf0f07) " @ cmp.w pc, r7")
573 TEST( "cmp sp, #0x00080008")
574 TEST_UNSUPPORTED(__inst_thumb32(0xf1bf1f08) " @ cmp pc, #0x00080008")
575
576 TEST_UNSUPPORTED(__inst_thumb32(0xea5f070d) " @ movs.w r7, sp")
577 TEST_UNSUPPORTED(__inst_thumb32(0xea5f070f) " @ movs.w r7, pc")
578 TEST_UNSUPPORTED(__inst_thumb32(0xea5f0d07) " @ movs.w sp, r7")
579 TEST_UNSUPPORTED(__inst_thumb32(0xea4f0f07) " @ mov.w pc, r7")
580 TEST_UNSUPPORTED(__inst_thumb32(0xf04f1d08) " @ mov sp, #0x00080008")
581 TEST_UNSUPPORTED(__inst_thumb32(0xf04f1f08) " @ mov pc, #0x00080008")
582
583 TEST_R("add.w r0, sp, r",1, 4,"")
584 TEST_R("adds r0, sp, r",1, 4,", asl #3")
585 TEST_R("add r0, sp, r",1, 4,", asl #4")
586 TEST_R("add r0, sp, r",1, 16,", ror #1")
587 TEST_R("add.w sp, sp, r",1, 4,"")
588 TEST_R("add sp, sp, r",1, 4,", asl #3")
589 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d1d01) " @ add sp, sp, r1, asl #4")
590 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0d71) " @ add sp, sp, r1, ror #1")
591 TEST( "add.w r0, sp, #24")
592 TEST( "add.w sp, sp, #24")
593 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0f01) " @ add pc, sp, r1")
594 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d000f) " @ add r0, sp, pc")
595 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d000d) " @ add r0, sp, sp")
596 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0d0f) " @ add sp, sp, pc")
597 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0d0d) " @ add sp, sp, sp")
598
599 TEST_R("sub.w r0, sp, r",1, 4,"")
600 TEST_R("subs r0, sp, r",1, 4,", asl #3")
601 TEST_R("sub r0, sp, r",1, 4,", asl #4")
602 TEST_R("sub r0, sp, r",1, 16,", ror #1")
603 TEST_R("sub.w sp, sp, r",1, 4,"")
604 TEST_R("sub sp, sp, r",1, 4,", asl #3")
605 TEST_UNSUPPORTED(__inst_thumb32(0xebad1d01) " @ sub sp, sp, r1, asl #4")
606 TEST_UNSUPPORTED(__inst_thumb32(0xebad0d71) " @ sub sp, sp, r1, ror #1")
607 TEST_UNSUPPORTED(__inst_thumb32(0xebad0f01) " @ sub pc, sp, r1")
608 TEST( "sub.w r0, sp, #24")
609 TEST( "sub.w sp, sp, #24")
610
611 TEST_UNSUPPORTED(__inst_thumb32(0xea02010f) " @ and r1, r2, pc")
612 TEST_UNSUPPORTED(__inst_thumb32(0xea0f0103) " @ and r1, pc, r3")
613 TEST_UNSUPPORTED(__inst_thumb32(0xea020f03) " @ and pc, r2, r3")
614 TEST_UNSUPPORTED(__inst_thumb32(0xea02010d) " @ and r1, r2, sp")
615 TEST_UNSUPPORTED(__inst_thumb32(0xea0d0103) " @ and r1, sp, r3")
616 TEST_UNSUPPORTED(__inst_thumb32(0xea020d03) " @ and sp, r2, r3")
617 TEST_UNSUPPORTED(__inst_thumb32(0xf00d1108) " @ and r1, sp, #0x00080008")
618 TEST_UNSUPPORTED(__inst_thumb32(0xf00f1108) " @ and r1, pc, #0x00080008")
619 TEST_UNSUPPORTED(__inst_thumb32(0xf0021d08) " @ and sp, r8, #0x00080008")
620 TEST_UNSUPPORTED(__inst_thumb32(0xf0021f08) " @ and pc, r8, #0x00080008")
621
622 TEST_UNSUPPORTED(__inst_thumb32(0xeb02010f) " @ add r1, r2, pc")
623 TEST_UNSUPPORTED(__inst_thumb32(0xeb0f0103) " @ add r1, pc, r3")
624 TEST_UNSUPPORTED(__inst_thumb32(0xeb020f03) " @ add pc, r2, r3")
625 TEST_UNSUPPORTED(__inst_thumb32(0xeb02010d) " @ add r1, r2, sp")
626 TEST_SUPPORTED( __inst_thumb32(0xeb0d0103) " @ add r1, sp, r3")
627 TEST_UNSUPPORTED(__inst_thumb32(0xeb020d03) " @ add sp, r2, r3")
628 TEST_SUPPORTED( __inst_thumb32(0xf10d1108) " @ add r1, sp, #0x00080008")
629 TEST_UNSUPPORTED(__inst_thumb32(0xf10d1f08) " @ add pc, sp, #0x00080008")
630 TEST_UNSUPPORTED(__inst_thumb32(0xf10f1108) " @ add r1, pc, #0x00080008")
631 TEST_UNSUPPORTED(__inst_thumb32(0xf1021d08) " @ add sp, r8, #0x00080008")
632 TEST_UNSUPPORTED(__inst_thumb32(0xf1021f08) " @ add pc, r8, #0x00080008")
633
634 TEST_UNSUPPORTED(__inst_thumb32(0xeaa00000) "")
635 TEST_UNSUPPORTED(__inst_thumb32(0xeaf00000) "")
636 TEST_UNSUPPORTED(__inst_thumb32(0xeb200000) "")
637 TEST_UNSUPPORTED(__inst_thumb32(0xeb800000) "")
638 TEST_UNSUPPORTED(__inst_thumb32(0xebe00000) "")
639
640 TEST_UNSUPPORTED(__inst_thumb32(0xf0a00000) "")
641 TEST_UNSUPPORTED(__inst_thumb32(0xf0c00000) "")
642 TEST_UNSUPPORTED(__inst_thumb32(0xf0f00000) "")
643 TEST_UNSUPPORTED(__inst_thumb32(0xf1200000) "")
644 TEST_UNSUPPORTED(__inst_thumb32(0xf1800000) "")
645 TEST_UNSUPPORTED(__inst_thumb32(0xf1e00000) "")
646
647 TEST_GROUP("Coprocessor instructions")
648
649 TEST_UNSUPPORTED(__inst_thumb32(0xec000000) "")
650 TEST_UNSUPPORTED(__inst_thumb32(0xeff00000) "")
651 TEST_UNSUPPORTED(__inst_thumb32(0xfc000000) "")
652 TEST_UNSUPPORTED(__inst_thumb32(0xfff00000) "")
653
654 TEST_GROUP("Data-processing (plain binary immediate)")
655
656 TEST_R("addw r0, r",1, VAL1,", #0x123")
657 TEST( "addw r14, sp, #0xf5a")
658 TEST( "addw sp, sp, #0x20")
659 TEST( "addw r7, pc, #0x888")
660 TEST_UNSUPPORTED(__inst_thumb32(0xf20f1f20) " @ addw pc, pc, #0x120")
661 TEST_UNSUPPORTED(__inst_thumb32(0xf20d1f20) " @ addw pc, sp, #0x120")
662 TEST_UNSUPPORTED(__inst_thumb32(0xf20f1d20) " @ addw sp, pc, #0x120")
663 TEST_UNSUPPORTED(__inst_thumb32(0xf2001d20) " @ addw sp, r0, #0x120")
664
665 TEST_R("subw r0, r",1, VAL1,", #0x123")
666 TEST( "subw r14, sp, #0xf5a")
667 TEST( "subw sp, sp, #0x20")
668 TEST( "subw r7, pc, #0x888")
669 TEST_UNSUPPORTED(__inst_thumb32(0xf2af1f20) " @ subw pc, pc, #0x120")
670 TEST_UNSUPPORTED(__inst_thumb32(0xf2ad1f20) " @ subw pc, sp, #0x120")
671 TEST_UNSUPPORTED(__inst_thumb32(0xf2af1d20) " @ subw sp, pc, #0x120")
672 TEST_UNSUPPORTED(__inst_thumb32(0xf2a01d20) " @ subw sp, r0, #0x120")
673
674 TEST("movw r0, #0")
675 TEST("movw r0, #0xffff")
676 TEST("movw lr, #0xffff")
677 TEST_UNSUPPORTED(__inst_thumb32(0xf2400d00) " @ movw sp, #0")
678 TEST_UNSUPPORTED(__inst_thumb32(0xf2400f00) " @ movw pc, #0")
679
680 TEST_R("movt r",0, VAL1,", #0")
681 TEST_R("movt r",0, VAL2,", #0xffff")
682 TEST_R("movt r",14,VAL1,", #0xffff")
683 TEST_UNSUPPORTED(__inst_thumb32(0xf2c00d00) " @ movt sp, #0")
684 TEST_UNSUPPORTED(__inst_thumb32(0xf2c00f00) " @ movt pc, #0")
685
686 TEST_R( "ssat r0, #24, r",0, VAL1,"")
687 TEST_R( "ssat r14, #24, r",12, VAL2,"")
688 TEST_R( "ssat r0, #24, r",0, VAL1,", lsl #8")
689 TEST_R( "ssat r14, #24, r",12, VAL2,", asr #8")
690 TEST_UNSUPPORTED(__inst_thumb32(0xf30c0d17) " @ ssat sp, #24, r12")
691 TEST_UNSUPPORTED(__inst_thumb32(0xf30c0f17) " @ ssat pc, #24, r12")
692 TEST_UNSUPPORTED(__inst_thumb32(0xf30d0c17) " @ ssat r12, #24, sp")
693 TEST_UNSUPPORTED(__inst_thumb32(0xf30f0c17) " @ ssat r12, #24, pc")
694
695 TEST_R( "usat r0, #24, r",0, VAL1,"")
696 TEST_R( "usat r14, #24, r",12, VAL2,"")
697 TEST_R( "usat r0, #24, r",0, VAL1,", lsl #8")
698 TEST_R( "usat r14, #24, r",12, VAL2,", asr #8")
699 TEST_UNSUPPORTED(__inst_thumb32(0xf38c0d17) " @ usat sp, #24, r12")
700 TEST_UNSUPPORTED(__inst_thumb32(0xf38c0f17) " @ usat pc, #24, r12")
701 TEST_UNSUPPORTED(__inst_thumb32(0xf38d0c17) " @ usat r12, #24, sp")
702 TEST_UNSUPPORTED(__inst_thumb32(0xf38f0c17) " @ usat r12, #24, pc")
703
704 TEST_R( "ssat16 r0, #12, r",0, HH1,"")
705 TEST_R( "ssat16 r14, #12, r",12, HH2,"")
706 TEST_UNSUPPORTED(__inst_thumb32(0xf32c0d0b) " @ ssat16 sp, #12, r12")
707 TEST_UNSUPPORTED(__inst_thumb32(0xf32c0f0b) " @ ssat16 pc, #12, r12")
708 TEST_UNSUPPORTED(__inst_thumb32(0xf32d0c0b) " @ ssat16 r12, #12, sp")
709 TEST_UNSUPPORTED(__inst_thumb32(0xf32f0c0b) " @ ssat16 r12, #12, pc")
710
711 TEST_R( "usat16 r0, #12, r",0, HH1,"")
712 TEST_R( "usat16 r14, #12, r",12, HH2,"")
713 TEST_UNSUPPORTED(__inst_thumb32(0xf3ac0d0b) " @ usat16 sp, #12, r12")
714 TEST_UNSUPPORTED(__inst_thumb32(0xf3ac0f0b) " @ usat16 pc, #12, r12")
715 TEST_UNSUPPORTED(__inst_thumb32(0xf3ad0c0b) " @ usat16 r12, #12, sp")
716 TEST_UNSUPPORTED(__inst_thumb32(0xf3af0c0b) " @ usat16 r12, #12, pc")
717
718 TEST_R( "sbfx r0, r",0 , VAL1,", #0, #31")
719 TEST_R( "sbfx r14, r",12, VAL2,", #8, #16")
720 TEST_R( "sbfx r4, r",10, VAL1,", #16, #15")
721 TEST_UNSUPPORTED(__inst_thumb32(0xf34c2d0f) " @ sbfx sp, r12, #8, #16")
722 TEST_UNSUPPORTED(__inst_thumb32(0xf34c2f0f) " @ sbfx pc, r12, #8, #16")
723 TEST_UNSUPPORTED(__inst_thumb32(0xf34d2c0f) " @ sbfx r12, sp, #8, #16")
724 TEST_UNSUPPORTED(__inst_thumb32(0xf34f2c0f) " @ sbfx r12, pc, #8, #16")
725
726 TEST_R( "ubfx r0, r",0 , VAL1,", #0, #31")
727 TEST_R( "ubfx r14, r",12, VAL2,", #8, #16")
728 TEST_R( "ubfx r4, r",10, VAL1,", #16, #15")
729 TEST_UNSUPPORTED(__inst_thumb32(0xf3cc2d0f) " @ ubfx sp, r12, #8, #16")
730 TEST_UNSUPPORTED(__inst_thumb32(0xf3cc2f0f) " @ ubfx pc, r12, #8, #16")
731 TEST_UNSUPPORTED(__inst_thumb32(0xf3cd2c0f) " @ ubfx r12, sp, #8, #16")
732 TEST_UNSUPPORTED(__inst_thumb32(0xf3cf2c0f) " @ ubfx r12, pc, #8, #16")
733
734 TEST_R( "bfc r",0, VAL1,", #4, #20")
735 TEST_R( "bfc r",14,VAL2,", #4, #20")
736 TEST_R( "bfc r",7, VAL1,", #0, #31")
737 TEST_R( "bfc r",8, VAL2,", #0, #31")
738 TEST_UNSUPPORTED(__inst_thumb32(0xf36f0d1e) " @ bfc sp, #0, #31")
739 TEST_UNSUPPORTED(__inst_thumb32(0xf36f0f1e) " @ bfc pc, #0, #31")
740
741 TEST_RR( "bfi r",0, VAL1,", r",0 , VAL2,", #0, #31")
742 TEST_RR( "bfi r",12,VAL1,", r",14 , VAL2,", #4, #20")
743 TEST_UNSUPPORTED(__inst_thumb32(0xf36e1d17) " @ bfi sp, r14, #4, #20")
744 TEST_UNSUPPORTED(__inst_thumb32(0xf36e1f17) " @ bfi pc, r14, #4, #20")
745 TEST_UNSUPPORTED(__inst_thumb32(0xf36d1e17) " @ bfi r14, sp, #4, #20")
746
747 TEST_GROUP("Branches and miscellaneous control")
748
749 CONDITION_INSTRUCTIONS(22,
750 TEST_BF("beq.w 2f")
751 TEST_BB("bne.w 2b")
752 TEST_BF("bgt.w 2f")
753 TEST_BB("blt.w 2b")
754 TEST_BF_X("bpl.w 2f", SPACE_0x1000)
755 )
756
757 TEST_UNSUPPORTED("msr cpsr, r0")
758 TEST_UNSUPPORTED("msr cpsr_f, r1")
759 TEST_UNSUPPORTED("msr spsr, r2")
760
761 TEST_UNSUPPORTED("cpsie.w i")
762 TEST_UNSUPPORTED("cpsid.w i")
763 TEST_UNSUPPORTED("cps 0x13")
764
765 TEST_SUPPORTED("yield.w")
766 TEST("sev.w")
767 TEST("nop.w")
768 TEST("wfi.w")
769 TEST_SUPPORTED("wfe.w")
770 TEST_UNSUPPORTED("dbg.w #0")
771
772 TEST_UNSUPPORTED("clrex")
773 TEST_UNSUPPORTED("dsb")
774 TEST_UNSUPPORTED("dmb")
775 TEST_UNSUPPORTED("isb")
776
777 TEST_UNSUPPORTED("bxj r0")
778
779 TEST_UNSUPPORTED("subs pc, lr, #4")
780
781 TEST_RMASKED("mrs r",0,~PSR_IGNORE_BITS,", cpsr")
782 TEST_RMASKED("mrs r",14,~PSR_IGNORE_BITS,", cpsr")
783 TEST_UNSUPPORTED(__inst_thumb32(0xf3ef8d00) " @ mrs sp, spsr")
784 TEST_UNSUPPORTED(__inst_thumb32(0xf3ef8f00) " @ mrs pc, spsr")
785 TEST_UNSUPPORTED("mrs r0, spsr")
786 TEST_UNSUPPORTED("mrs lr, spsr")
787
788 TEST_UNSUPPORTED(__inst_thumb32(0xf7f08000) " @ smc #0")
789
790 TEST_UNSUPPORTED(__inst_thumb32(0xf7f0a000) " @ undefeined")
791
792 TEST_BF( "b.w 2f")
793 TEST_BB( "b.w 2b")
794 TEST_BF_X("b.w 2f", SPACE_0x1000)
795
796 TEST_BF( "bl.w 2f")
797 TEST_BB( "bl.w 2b")
798 TEST_BB_X("bl.w 2b", SPACE_0x1000)
799
800 TEST_X( "blx __dummy_arm_subroutine",
801 ".arm \n\t"
802 ".align \n\t"
803 ".type __dummy_arm_subroutine, %%function \n\t"
804 "__dummy_arm_subroutine: \n\t"
805 "mov r0, pc \n\t"
806 "bx lr \n\t"
807 ".thumb \n\t"
808 )
809 TEST( "blx __dummy_arm_subroutine")
810
811 TEST_GROUP("Store single data item")
812
813 #define SINGLE_STORE(size) \
814 TEST_RP( "str"size" r",0, VAL1,", [r",11,-1024,", #1024]") \
815 TEST_RP( "str"size" r",14,VAL2,", [r",1, -1024,", #1080]") \
816 TEST_RP( "str"size" r",0, VAL1,", [r",11,256, ", #-120]") \
817 TEST_RP( "str"size" r",14,VAL2,", [r",1, 256, ", #-128]") \
818 TEST_RP( "str"size" r",0, VAL1,", [r",11,24, "], #120") \
819 TEST_RP( "str"size" r",14,VAL2,", [r",1, 24, "], #128") \
820 TEST_RP( "str"size" r",0, VAL1,", [r",11,24, "], #-120") \
821 TEST_RP( "str"size" r",14,VAL2,", [r",1, 24, "], #-128") \
822 TEST_RP( "str"size" r",0, VAL1,", [r",11,24, ", #120]!") \
823 TEST_RP( "str"size" r",14,VAL2,", [r",1, 24, ", #128]!") \
824 TEST_RP( "str"size" r",0, VAL1,", [r",11,256, ", #-120]!") \
825 TEST_RP( "str"size" r",14,VAL2,", [r",1, 256, ", #-128]!") \
826 TEST_RPR("str"size".w r",0, VAL1,", [r",1, 0,", r",2, 4,"]") \
827 TEST_RPR("str"size" r",14,VAL2,", [r",10,0,", r",11,4,", lsl #1]") \
828 TEST_UNSUPPORTED("str"size" r0, [r13, r1]") \
829 TEST_R( "str"size".w r",7, VAL1,", [sp, #24]") \
830 TEST_RP( "str"size".w r",0, VAL2,", [r",0,0, "]") \
831 TEST_RP( "str"size" r",6, VAL1,", [r",13, TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"]!") \
832 TEST_UNSUPPORTED("str"size" r6, [r13, #-"__stringify(MAX_STACK_SIZE)"-8]!") \
833 TEST_RP( "str"size" r",4, VAL2,", [r",12, TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"-8]!") \
834 TEST_UNSUPPORTED("str"size"t r0, [r1, #4]")
835
836 SINGLE_STORE("b")
837 SINGLE_STORE("h")
838 SINGLE_STORE("")
839
840 TEST_UNSUPPORTED(__inst_thumb32(0xf801000d) " @ strb r0, [r1, r13]")
841 TEST_UNSUPPORTED(__inst_thumb32(0xf821000d) " @ strh r0, [r1, r13]")
842 TEST_UNSUPPORTED(__inst_thumb32(0xf841000d) " @ str r0, [r1, r13]")
843
844 TEST("str sp, [sp]")
845 TEST_UNSUPPORTED(__inst_thumb32(0xf8cfe000) " @ str r14, [pc]")
846 TEST_UNSUPPORTED(__inst_thumb32(0xf8cef000) " @ str pc, [r14]")
847
848 TEST_GROUP("Advanced SIMD element or structure load/store instructions")
849
850 TEST_UNSUPPORTED(__inst_thumb32(0xf9000000) "")
851 TEST_UNSUPPORTED(__inst_thumb32(0xf92fffff) "")
852 TEST_UNSUPPORTED(__inst_thumb32(0xf9800000) "")
853 TEST_UNSUPPORTED(__inst_thumb32(0xf9efffff) "")
854
855 TEST_GROUP("Load single data item and memory hints")
856
857 #define SINGLE_LOAD(size) \
858 TEST_P( "ldr"size" r0, [r",11,-1024, ", #1024]") \
859 TEST_P( "ldr"size" r14, [r",1, -1024,", #1080]") \
860 TEST_P( "ldr"size" r0, [r",11,256, ", #-120]") \
861 TEST_P( "ldr"size" r14, [r",1, 256, ", #-128]") \
862 TEST_P( "ldr"size" r0, [r",11,24, "], #120") \
863 TEST_P( "ldr"size" r14, [r",1, 24, "], #128") \
864 TEST_P( "ldr"size" r0, [r",11,24, "], #-120") \
865 TEST_P( "ldr"size" r14, [r",1,24, "], #-128") \
866 TEST_P( "ldr"size" r0, [r",11,24, ", #120]!") \
867 TEST_P( "ldr"size" r14, [r",1, 24, ", #128]!") \
868 TEST_P( "ldr"size" r0, [r",11,256, ", #-120]!") \
869 TEST_P( "ldr"size" r14, [r",1, 256, ", #-128]!") \
870 TEST_PR("ldr"size".w r0, [r",1, 0,", r",2, 4,"]") \
871 TEST_PR("ldr"size" r14, [r",10,0,", r",11,4,", lsl #1]") \
872 TEST_X( "ldr"size".w r0, 3f", \
873 ".align 3 \n\t" \
874 "3: .word "__stringify(VAL1)) \
875 TEST_X( "ldr"size".w r14, 3f", \
876 ".align 3 \n\t" \
877 "3: .word "__stringify(VAL2)) \
878 TEST( "ldr"size".w r7, 3b") \
879 TEST( "ldr"size".w r7, [sp, #24]") \
880 TEST_P( "ldr"size".w r0, [r",0,0, "]") \
881 TEST_UNSUPPORTED("ldr"size"t r0, [r1, #4]")
882
883 SINGLE_LOAD("b")
884 SINGLE_LOAD("sb")
885 SINGLE_LOAD("h")
886 SINGLE_LOAD("sh")
887 SINGLE_LOAD("")
888
889 TEST_BF_P("ldr pc, [r",14, 15*4,"]")
890 TEST_P( "ldr sp, [r",14, 13*4,"]")
891 TEST_BF_R("ldr pc, [sp, r",14, 15*4,"]")
892 TEST_R( "ldr sp, [sp, r",14, 13*4,"]")
893 TEST_THUMB_TO_ARM_INTERWORK_P("ldr pc, [r",0,0,", #15*4]")
894 TEST_SUPPORTED("ldr sp, 99f")
895 TEST_SUPPORTED("ldr pc, 99f")
896
897 TEST_UNSUPPORTED(__inst_thumb32(0xf854700d) " @ ldr r7, [r4, sp]")
898 TEST_UNSUPPORTED(__inst_thumb32(0xf854700f) " @ ldr r7, [r4, pc]")
899 TEST_UNSUPPORTED(__inst_thumb32(0xf814700d) " @ ldrb r7, [r4, sp]")
900 TEST_UNSUPPORTED(__inst_thumb32(0xf814700f) " @ ldrb r7, [r4, pc]")
901 TEST_UNSUPPORTED(__inst_thumb32(0xf89fd004) " @ ldrb sp, 99f")
902 TEST_UNSUPPORTED(__inst_thumb32(0xf814d008) " @ ldrb sp, [r4, r8]")
903 TEST_UNSUPPORTED(__inst_thumb32(0xf894d000) " @ ldrb sp, [r4]")
904
905 TEST_UNSUPPORTED(__inst_thumb32(0xf8600000) "") /* Unallocated space */
906 TEST_UNSUPPORTED(__inst_thumb32(0xf9ffffff) "") /* Unallocated space */
907 TEST_UNSUPPORTED(__inst_thumb32(0xf9500000) "") /* Unallocated space */
908 TEST_UNSUPPORTED(__inst_thumb32(0xf95fffff) "") /* Unallocated space */
909 TEST_UNSUPPORTED(__inst_thumb32(0xf8000800) "") /* Unallocated space */
910 TEST_UNSUPPORTED(__inst_thumb32(0xf97ffaff) "") /* Unallocated space */
911
912 TEST( "pli [pc, #4]")
913 TEST( "pli [pc, #-4]")
914 TEST( "pld [pc, #4]")
915 TEST( "pld [pc, #-4]")
916
917 TEST_P( "pld [r",0,-1024,", #1024]")
918 TEST( __inst_thumb32(0xf8b0f400) " @ pldw [r0, #1024]")
919 TEST_P( "pli [r",4, 0b,", #1024]")
920 TEST_P( "pld [r",7, 120,", #-120]")
921 TEST( __inst_thumb32(0xf837fc78) " @ pldw [r7, #-120]")
922 TEST_P( "pli [r",11,120,", #-120]")
923 TEST( "pld [sp, #0]")
924
925 TEST_PR("pld [r",7, 24, ", r",0, 16,"]")
926 TEST_PR("pld [r",8, 24, ", r",12,16,", lsl #3]")
927 TEST_SUPPORTED(__inst_thumb32(0xf837f000) " @ pldw [r7, r0]")
928 TEST_SUPPORTED(__inst_thumb32(0xf838f03c) " @ pldw [r8, r12, lsl #3]");
929 TEST_RR("pli [r",12,0b,", r",0, 16,"]")
930 TEST_RR("pli [r",0, 0b,", r",12,16,", lsl #3]")
931 TEST_R( "pld [sp, r",1, 16,"]")
932 TEST_UNSUPPORTED(__inst_thumb32(0xf817f00d) " @pld [r7, sp]")
933 TEST_UNSUPPORTED(__inst_thumb32(0xf817f00f) " @pld [r7, pc]")
934
935 TEST_GROUP("Data-processing (register)")
936
937 #define SHIFTS32(op) \
938 TEST_RR(op" r0, r",1, VAL1,", r",2, 3, "") \
939 TEST_RR(op" r14, r",12,VAL2,", r",11,10,"")
940
941 SHIFTS32("lsl")
942 SHIFTS32("lsls")
943 SHIFTS32("lsr")
944 SHIFTS32("lsrs")
945 SHIFTS32("asr")
946 SHIFTS32("asrs")
947 SHIFTS32("ror")
948 SHIFTS32("rors")
949
950 TEST_UNSUPPORTED(__inst_thumb32(0xfa01ff02) " @ lsl pc, r1, r2")
951 TEST_UNSUPPORTED(__inst_thumb32(0xfa01fd02) " @ lsl sp, r1, r2")
952 TEST_UNSUPPORTED(__inst_thumb32(0xfa0ff002) " @ lsl r0, pc, r2")
953 TEST_UNSUPPORTED(__inst_thumb32(0xfa0df002) " @ lsl r0, sp, r2")
954 TEST_UNSUPPORTED(__inst_thumb32(0xfa01f00f) " @ lsl r0, r1, pc")
955 TEST_UNSUPPORTED(__inst_thumb32(0xfa01f00d) " @ lsl r0, r1, sp")
956
957 TEST_RR( "sxtah r0, r",0, HH1,", r",1, HH2,"")
958 TEST_RR( "sxtah r14,r",12, HH2,", r",10,HH1,", ror #8")
959 TEST_R( "sxth r8, r",7, HH1,"")
960
961 TEST_UNSUPPORTED(__inst_thumb32(0xfa0fff87) " @ sxth pc, r7");
962 TEST_UNSUPPORTED(__inst_thumb32(0xfa0ffd87) " @ sxth sp, r7");
963 TEST_UNSUPPORTED(__inst_thumb32(0xfa0ff88f) " @ sxth r8, pc");
964 TEST_UNSUPPORTED(__inst_thumb32(0xfa0ff88d) " @ sxth r8, sp");
965
966 TEST_RR( "uxtah r0, r",0, HH1,", r",1, HH2,"")
967 TEST_RR( "uxtah r14,r",12, HH2,", r",10,HH1,", ror #8")
968 TEST_R( "uxth r8, r",7, HH1,"")
969
970 TEST_RR( "sxtab16 r0, r",0, HH1,", r",1, HH2,"")
971 TEST_RR( "sxtab16 r14,r",12, HH2,", r",10,HH1,", ror #8")
972 TEST_R( "sxtb16 r8, r",7, HH1,"")
973
974 TEST_RR( "uxtab16 r0, r",0, HH1,", r",1, HH2,"")
975 TEST_RR( "uxtab16 r14,r",12, HH2,", r",10,HH1,", ror #8")
976 TEST_R( "uxtb16 r8, r",7, HH1,"")
977
978 TEST_RR( "sxtab r0, r",0, HH1,", r",1, HH2,"")
979 TEST_RR( "sxtab r14,r",12, HH2,", r",10,HH1,", ror #8")
980 TEST_R( "sxtb r8, r",7, HH1,"")
981
982 TEST_RR( "uxtab r0, r",0, HH1,", r",1, HH2,"")
983 TEST_RR( "uxtab r14,r",12, HH2,", r",10,HH1,", ror #8")
984 TEST_R( "uxtb r8, r",7, HH1,"")
985
986 TEST_UNSUPPORTED(__inst_thumb32(0xfa6000f0) "")
987 TEST_UNSUPPORTED(__inst_thumb32(0xfa7fffff) "")
988
989 #define PARALLEL_ADD_SUB(op) \
990 TEST_RR( op"add16 r0, r",0, HH1,", r",1, HH2,"") \
991 TEST_RR( op"add16 r14, r",12,HH2,", r",10,HH1,"") \
992 TEST_RR( op"asx r0, r",0, HH1,", r",1, HH2,"") \
993 TEST_RR( op"asx r14, r",12,HH2,", r",10,HH1,"") \
994 TEST_RR( op"sax r0, r",0, HH1,", r",1, HH2,"") \
995 TEST_RR( op"sax r14, r",12,HH2,", r",10,HH1,"") \
996 TEST_RR( op"sub16 r0, r",0, HH1,", r",1, HH2,"") \
997 TEST_RR( op"sub16 r14, r",12,HH2,", r",10,HH1,"") \
998 TEST_RR( op"add8 r0, r",0, HH1,", r",1, HH2,"") \
999 TEST_RR( op"add8 r14, r",12,HH2,", r",10,HH1,"") \
1000 TEST_RR( op"sub8 r0, r",0, HH1,", r",1, HH2,"") \
1001 TEST_RR( op"sub8 r14, r",12,HH2,", r",10,HH1,"")
1002
1003 TEST_GROUP("Parallel addition and subtraction, signed")
1004
1005 PARALLEL_ADD_SUB("s")
1006 PARALLEL_ADD_SUB("q")
1007 PARALLEL_ADD_SUB("sh")
1008
1009 TEST_GROUP("Parallel addition and subtraction, unsigned")
1010
1011 PARALLEL_ADD_SUB("u")
1012 PARALLEL_ADD_SUB("uq")
1013 PARALLEL_ADD_SUB("uh")
1014
1015 TEST_GROUP("Miscellaneous operations")
1016
1017 TEST_RR("qadd r0, r",1, VAL1,", r",2, VAL2,"")
1018 TEST_RR("qadd lr, r",9, VAL2,", r",8, VAL1,"")
1019 TEST_RR("qsub r0, r",1, VAL1,", r",2, VAL2,"")
1020 TEST_RR("qsub lr, r",9, VAL2,", r",8, VAL1,"")
1021 TEST_RR("qdadd r0, r",1, VAL1,", r",2, VAL2,"")
1022 TEST_RR("qdadd lr, r",9, VAL2,", r",8, VAL1,"")
1023 TEST_RR("qdsub r0, r",1, VAL1,", r",2, VAL2,"")
1024 TEST_RR("qdsub lr, r",9, VAL2,", r",8, VAL1,"")
1025
1026 TEST_R("rev.w r0, r",0, VAL1,"")
1027 TEST_R("rev r14, r",12, VAL2,"")
1028 TEST_R("rev16.w r0, r",0, VAL1,"")
1029 TEST_R("rev16 r14, r",12, VAL2,"")
1030 TEST_R("rbit r0, r",0, VAL1,"")
1031 TEST_R("rbit r14, r",12, VAL2,"")
1032 TEST_R("revsh.w r0, r",0, VAL1,"")
1033 TEST_R("revsh r14, r",12, VAL2,"")
1034
1035 TEST_UNSUPPORTED(__inst_thumb32(0xfa9cff8c) " @ rev pc, r12");
1036 TEST_UNSUPPORTED(__inst_thumb32(0xfa9cfd8c) " @ rev sp, r12");
1037 TEST_UNSUPPORTED(__inst_thumb32(0xfa9ffe8f) " @ rev r14, pc");
1038 TEST_UNSUPPORTED(__inst_thumb32(0xfa9dfe8d) " @ rev r14, sp");
1039
1040 TEST_RR("sel r0, r",0, VAL1,", r",1, VAL2,"")
1041 TEST_RR("sel r14, r",12,VAL1,", r",10, VAL2,"")
1042
1043 TEST_R("clz r0, r",0, 0x0,"")
1044 TEST_R("clz r7, r",14,0x1,"")
1045 TEST_R("clz lr, r",7, 0xffffffff,"")
1046
1047 TEST_UNSUPPORTED(__inst_thumb32(0xfa80f030) "") /* Unallocated space */
1048 TEST_UNSUPPORTED(__inst_thumb32(0xfaffff7f) "") /* Unallocated space */
1049 TEST_UNSUPPORTED(__inst_thumb32(0xfab0f000) "") /* Unallocated space */
1050 TEST_UNSUPPORTED(__inst_thumb32(0xfaffff7f) "") /* Unallocated space */
1051
1052 TEST_GROUP("Multiply, multiply accumulate, and absolute difference operations")
1053
1054 TEST_RR( "mul r0, r",1, VAL1,", r",2, VAL2,"")
1055 TEST_RR( "mul r7, r",8, VAL2,", r",9, VAL2,"")
1056 TEST_UNSUPPORTED(__inst_thumb32(0xfb08ff09) " @ mul pc, r8, r9")
1057 TEST_UNSUPPORTED(__inst_thumb32(0xfb08fd09) " @ mul sp, r8, r9")
1058 TEST_UNSUPPORTED(__inst_thumb32(0xfb0ff709) " @ mul r7, pc, r9")
1059 TEST_UNSUPPORTED(__inst_thumb32(0xfb0df709) " @ mul r7, sp, r9")
1060 TEST_UNSUPPORTED(__inst_thumb32(0xfb08f70f) " @ mul r7, r8, pc")
1061 TEST_UNSUPPORTED(__inst_thumb32(0xfb08f70d) " @ mul r7, r8, sp")
1062
1063 TEST_RRR( "mla r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1064 TEST_RRR( "mla r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1065 TEST_UNSUPPORTED(__inst_thumb32(0xfb08af09) " @ mla pc, r8, r9, r10");
1066 TEST_UNSUPPORTED(__inst_thumb32(0xfb08ad09) " @ mla sp, r8, r9, r10");
1067 TEST_UNSUPPORTED(__inst_thumb32(0xfb0fa709) " @ mla r7, pc, r9, r10");
1068 TEST_UNSUPPORTED(__inst_thumb32(0xfb0da709) " @ mla r7, sp, r9, r10");
1069 TEST_UNSUPPORTED(__inst_thumb32(0xfb08a70f) " @ mla r7, r8, pc, r10");
1070 TEST_UNSUPPORTED(__inst_thumb32(0xfb08a70d) " @ mla r7, r8, sp, r10");
1071 TEST_UNSUPPORTED(__inst_thumb32(0xfb08d709) " @ mla r7, r8, r9, sp");
1072
1073 TEST_RRR( "mls r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1074 TEST_RRR( "mls r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1075
1076 TEST_RRR( "smlabb r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1077 TEST_RRR( "smlabb r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1078 TEST_RRR( "smlatb r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1079 TEST_RRR( "smlatb r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1080 TEST_RRR( "smlabt r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1081 TEST_RRR( "smlabt r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1082 TEST_RRR( "smlatt r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1083 TEST_RRR( "smlatt r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1084 TEST_RR( "smulbb r0, r",1, VAL1,", r",2, VAL2,"")
1085 TEST_RR( "smulbb r7, r",8, VAL3,", r",9, VAL1,"")
1086 TEST_RR( "smultb r0, r",1, VAL1,", r",2, VAL2,"")
1087 TEST_RR( "smultb r7, r",8, VAL3,", r",9, VAL1,"")
1088 TEST_RR( "smulbt r0, r",1, VAL1,", r",2, VAL2,"")
1089 TEST_RR( "smulbt r7, r",8, VAL3,", r",9, VAL1,"")
1090 TEST_RR( "smultt r0, r",1, VAL1,", r",2, VAL2,"")
1091 TEST_RR( "smultt r7, r",8, VAL3,", r",9, VAL1,"")
1092
1093 TEST_RRR( "smlad r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"")
1094 TEST_RRR( "smlad r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
1095 TEST_RRR( "smladx r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"")
1096 TEST_RRR( "smladx r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
1097 TEST_RR( "smuad r0, r",0, HH1,", r",1, HH2,"")
1098 TEST_RR( "smuad r14, r",12,HH2,", r",10,HH1,"")
1099 TEST_RR( "smuadx r0, r",0, HH1,", r",1, HH2,"")
1100 TEST_RR( "smuadx r14, r",12,HH2,", r",10,HH1,"")
1101
1102 TEST_RRR( "smlawb r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1103 TEST_RRR( "smlawb r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1104 TEST_RRR( "smlawt r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1105 TEST_RRR( "smlawt r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1106 TEST_RR( "smulwb r0, r",1, VAL1,", r",2, VAL2,"")
1107 TEST_RR( "smulwb r7, r",8, VAL3,", r",9, VAL1,"")
1108 TEST_RR( "smulwt r0, r",1, VAL1,", r",2, VAL2,"")
1109 TEST_RR( "smulwt r7, r",8, VAL3,", r",9, VAL1,"")
1110
1111 TEST_RRR( "smlsd r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"")
1112 TEST_RRR( "smlsd r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
1113 TEST_RRR( "smlsdx r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"")
1114 TEST_RRR( "smlsdx r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
1115 TEST_RR( "smusd r0, r",0, HH1,", r",1, HH2,"")
1116 TEST_RR( "smusd r14, r",12,HH2,", r",10,HH1,"")
1117 TEST_RR( "smusdx r0, r",0, HH1,", r",1, HH2,"")
1118 TEST_RR( "smusdx r14, r",12,HH2,", r",10,HH1,"")
1119
1120 TEST_RRR( "smmla r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"")
1121 TEST_RRR( "smmla r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1122 TEST_RRR( "smmlar r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"")
1123 TEST_RRR( "smmlar r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1124 TEST_RR( "smmul r0, r",0, VAL1,", r",1, VAL2,"")
1125 TEST_RR( "smmul r14, r",12,VAL2,", r",10,VAL1,"")
1126 TEST_RR( "smmulr r0, r",0, VAL1,", r",1, VAL2,"")
1127 TEST_RR( "smmulr r14, r",12,VAL2,", r",10,VAL1,"")
1128
1129 TEST_RRR( "smmls r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"")
1130 TEST_RRR( "smmls r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1131 TEST_RRR( "smmlsr r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"")
1132 TEST_RRR( "smmlsr r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1133
1134 TEST_RRR( "usada8 r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL3,"")
1135 TEST_RRR( "usada8 r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL3,"")
1136 TEST_RR( "usad8 r0, r",0, VAL1,", r",1, VAL2,"")
1137 TEST_RR( "usad8 r14, r",12,VAL2,", r",10,VAL1,"")
1138
1139 TEST_UNSUPPORTED(__inst_thumb32(0xfb00f010) "") /* Unallocated space */
1140 TEST_UNSUPPORTED(__inst_thumb32(0xfb0fff1f) "") /* Unallocated space */
1141 TEST_UNSUPPORTED(__inst_thumb32(0xfb70f010) "") /* Unallocated space */
1142 TEST_UNSUPPORTED(__inst_thumb32(0xfb7fff1f) "") /* Unallocated space */
1143 TEST_UNSUPPORTED(__inst_thumb32(0xfb700010) "") /* Unallocated space */
1144 TEST_UNSUPPORTED(__inst_thumb32(0xfb7fff1f) "") /* Unallocated space */
1145
1146 TEST_GROUP("Long multiply, long multiply accumulate, and divide")
1147
1148 TEST_RR( "smull r0, r1, r",2, VAL1,", r",3, VAL2,"")
1149 TEST_RR( "smull r7, r8, r",9, VAL2,", r",10, VAL1,"")
1150 TEST_UNSUPPORTED(__inst_thumb32(0xfb89f80a) " @ smull pc, r8, r9, r10");
1151 TEST_UNSUPPORTED(__inst_thumb32(0xfb89d80a) " @ smull sp, r8, r9, r10");
1152 TEST_UNSUPPORTED(__inst_thumb32(0xfb897f0a) " @ smull r7, pc, r9, r10");
1153 TEST_UNSUPPORTED(__inst_thumb32(0xfb897d0a) " @ smull r7, sp, r9, r10");
1154 TEST_UNSUPPORTED(__inst_thumb32(0xfb8f780a) " @ smull r7, r8, pc, r10");
1155 TEST_UNSUPPORTED(__inst_thumb32(0xfb8d780a) " @ smull r7, r8, sp, r10");
1156 TEST_UNSUPPORTED(__inst_thumb32(0xfb89780f) " @ smull r7, r8, r9, pc");
1157 TEST_UNSUPPORTED(__inst_thumb32(0xfb89780d) " @ smull r7, r8, r9, sp");
1158
1159 TEST_RR( "umull r0, r1, r",2, VAL1,", r",3, VAL2,"")
1160 TEST_RR( "umull r7, r8, r",9, VAL2,", r",10, VAL1,"")
1161
1162 TEST_RRRR( "smlal r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1163 TEST_RRRR( "smlal r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1164
1165 TEST_RRRR( "smlalbb r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1166 TEST_RRRR( "smlalbb r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1167 TEST_RRRR( "smlalbt r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1168 TEST_RRRR( "smlalbt r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1169 TEST_RRRR( "smlaltb r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1170 TEST_RRRR( "smlaltb r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1171 TEST_RRRR( "smlaltt r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1172 TEST_RRRR( "smlaltt r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1173
1174 TEST_RRRR( "smlald r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
1175 TEST_RRRR( "smlald r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
1176 TEST_RRRR( "smlaldx r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
1177 TEST_RRRR( "smlaldx r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
1178
1179 TEST_RRRR( "smlsld r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
1180 TEST_RRRR( "smlsld r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
1181 TEST_RRRR( "smlsldx r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
1182 TEST_RRRR( "smlsldx r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
1183
1184 TEST_RRRR( "umlal r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1185 TEST_RRRR( "umlal r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1186 TEST_RRRR( "umaal r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1187 TEST_RRRR( "umaal r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1188
1189 TEST_GROUP("Coprocessor instructions")
1190
1191 TEST_UNSUPPORTED(__inst_thumb32(0xfc000000) "")
1192 TEST_UNSUPPORTED(__inst_thumb32(0xffffffff) "")
1193
1194 TEST_GROUP("Testing instructions in IT blocks")
1195
1196 TEST_ITBLOCK("sub.w r0, r0")
1197
1198 verbose("\n");
1199 }
1200
1201