1 #ifndef _MAPPI3_PLD_H 2 #define _MAPPI3_PLD_H 3 4 /* 5 * include/asm-m32r/mappi3/mappi3_pld.h 6 * 7 * Definitions for Extended IO Logic on MAPPI3 board. 8 * based on m32700ut_pld.h 9 * 10 * This file is subject to the terms and conditions of the GNU General 11 * Public License. See the file "COPYING" in the main directory of 12 * this archive for more details. 13 */ 14 15 #ifndef __ASSEMBLY__ 16 /* FIXME: 17 * Some C functions use non-cache address, so can't define non-cache address. 18 */ 19 #define PLD_BASE (0x1c000000 /* + NONCACHE_OFFSET */) 20 #define __reg8 (volatile unsigned char *) 21 #define __reg16 (volatile unsigned short *) 22 #define __reg32 (volatile unsigned int *) 23 #else 24 #define PLD_BASE (0x1c000000 + NONCACHE_OFFSET) 25 #define __reg8 26 #define __reg16 27 #define __reg32 28 #endif /* __ASSEMBLY__ */ 29 30 /* CFC */ 31 #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000) 32 #define PLD_CFSTS __reg16(PLD_BASE + 0x0002) 33 #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004) 34 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) 35 #define PLD_CFCR0 __reg16(PLD_BASE + 0x000a) 36 #define PLD_CFCR1 __reg16(PLD_BASE + 0x000c) 37 38 /* MMC */ 39 #define PLD_MMCCR __reg16(PLD_BASE + 0x4000) 40 #define PLD_MMCMOD __reg16(PLD_BASE + 0x4002) 41 #define PLD_MMCSTS __reg16(PLD_BASE + 0x4006) 42 #define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a) 43 #define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c) 44 #define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e) 45 #define PLD_MMCDET __reg16(PLD_BASE + 0x4010) 46 #define PLD_MMCWP __reg16(PLD_BASE + 0x4012) 47 #define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000) 48 #define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000) 49 #define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000) 50 #define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006) 51 52 /* Power Control of MMC and CF */ 53 #define PLD_CPCR __reg16(PLD_BASE + 0x14000) 54 55 /* ICU */ 56 #define M32R_IRQ_PC104 (5) /* INT4(PC/104) */ 57 #define M32R_IRQ_I2C (28) /* I2C-BUS */ 58 #define PLD_IRQ_CFIREQ (6) /* INT5 CFC Card Interrupt */ 59 #define PLD_IRQ_CFC_INSERT (7) /* INT6 CFC Card Insert & Eject */ 60 #define PLD_IRQ_IDEIREQ (8) /* INT7 IDE Interrupt */ 61 #define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */ 62 #define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */ 63 64 #if 0 65 /* LED Control 66 * 67 * 1: DIP swich side 68 * 2: Reset switch side 69 */ 70 #define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002) 71 #define PLD_IOLED_1_ON 0x001 72 #define PLD_IOLED_1_OFF 0x000 73 #define PLD_IOLED_2_ON 0x002 74 #define PLD_IOLED_2_OFF 0x000 75 76 /* DIP Switch 77 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected) 78 * 1: - 79 * 2: - 80 * 3: - 81 */ 82 #define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004) 83 #define PLD_IOSWSTS_IOSW2 0x0200 84 #define PLD_IOSWSTS_IOSW1 0x0100 85 #define PLD_IOSWSTS_IOWP0 0x0001 86 87 #endif 88 89 /* CRC */ 90 #define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000) 91 #define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002) 92 #define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004) 93 #define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006) 94 #define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008) 95 #define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a) 96 97 #if 0 98 /* RTC */ 99 #define PLD_RTCCR __reg16(PLD_BASE + 0x1c000) 100 #define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002) 101 #define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004) 102 #define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006) 103 #define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008) 104 105 /* SIO0 */ 106 #define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000) 107 #define PLD_ESIO0CR_TXEN 0x0001 108 #define PLD_ESIO0CR_RXEN 0x0002 109 #define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002) 110 #define PLD_ESIO0MOD0_CTSS 0x0040 111 #define PLD_ESIO0MOD0_RTSS 0x0080 112 #define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004) 113 #define PLD_ESIO0MOD1_LMFS 0x0010 114 #define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006) 115 #define PLD_ESIO0STS_TEMP 0x0001 116 #define PLD_ESIO0STS_TXCP 0x0002 117 #define PLD_ESIO0STS_RXCP 0x0004 118 #define PLD_ESIO0STS_TXSC 0x0100 119 #define PLD_ESIO0STS_RXSC 0x0200 120 #define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP) 121 #define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008) 122 #define PLD_ESIO0INTCR_TXIEN 0x0002 123 #define PLD_ESIO0INTCR_RXCEN 0x0004 124 #define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a) 125 #define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c) 126 #define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e) 127 128 /* SIM Card */ 129 #define PLD_SCCR __reg16(PLD_BASE + 0x38000) 130 #define PLD_SCMOD __reg16(PLD_BASE + 0x38004) 131 #define PLD_SCSTS __reg16(PLD_BASE + 0x38006) 132 #define PLD_SCINTCR __reg16(PLD_BASE + 0x38008) 133 #define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a) 134 #define PLD_SCTXB __reg16(PLD_BASE + 0x3800c) 135 #define PLD_SCRXB __reg16(PLD_BASE + 0x3800e) 136 137 #endif 138 139 /* Reset Control */ 140 #define PLD_REBOOT __reg16(PLD_BASE + 0x38000) 141 142 #endif /* _MAPPI3_PLD.H */ 143