1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
7 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 * Copyright (C) 2004 Thiemo Seufer
10 * Copyright (C) 2013 Imagination Technologies Ltd.
11 */
12 #include <linux/errno.h>
13 #include <linux/sched.h>
14 #include <linux/tick.h>
15 #include <linux/kernel.h>
16 #include <linux/mm.h>
17 #include <linux/stddef.h>
18 #include <linux/unistd.h>
19 #include <linux/export.h>
20 #include <linux/ptrace.h>
21 #include <linux/mman.h>
22 #include <linux/personality.h>
23 #include <linux/sys.h>
24 #include <linux/init.h>
25 #include <linux/completion.h>
26 #include <linux/kallsyms.h>
27 #include <linux/random.h>
28 #include <linux/prctl.h>
29
30 #include <asm/asm.h>
31 #include <asm/bootinfo.h>
32 #include <asm/cpu.h>
33 #include <asm/dsemul.h>
34 #include <asm/dsp.h>
35 #include <asm/fpu.h>
36 #include <asm/irq.h>
37 #include <asm/msa.h>
38 #include <asm/pgtable.h>
39 #include <asm/mipsregs.h>
40 #include <asm/processor.h>
41 #include <asm/reg.h>
42 #include <asm/uaccess.h>
43 #include <asm/io.h>
44 #include <asm/elf.h>
45 #include <asm/isadep.h>
46 #include <asm/inst.h>
47 #include <asm/stacktrace.h>
48 #include <asm/irq_regs.h>
49
50 #ifdef CONFIG_HOTPLUG_CPU
arch_cpu_idle_dead(void)51 void arch_cpu_idle_dead(void)
52 {
53 play_dead();
54 }
55 #endif
56
57 asmlinkage void ret_from_fork(void);
58 asmlinkage void ret_from_kernel_thread(void);
59
start_thread(struct pt_regs * regs,unsigned long pc,unsigned long sp)60 void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
61 {
62 unsigned long status;
63
64 /* New thread loses kernel privileges. */
65 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
66 status |= KU_USER;
67 regs->cp0_status = status;
68 lose_fpu(0);
69 clear_thread_flag(TIF_MSA_CTX_LIVE);
70 clear_used_math();
71 atomic_set(¤t->thread.bd_emu_frame, BD_EMUFRAME_NONE);
72 init_dsp();
73 regs->cp0_epc = pc;
74 regs->regs[29] = sp;
75 }
76
exit_thread(struct task_struct * tsk)77 void exit_thread(struct task_struct *tsk)
78 {
79 /*
80 * User threads may have allocated a delay slot emulation frame.
81 * If so, clean up that allocation.
82 */
83 if (!(current->flags & PF_KTHREAD))
84 dsemul_thread_cleanup(tsk);
85 }
86
arch_dup_task_struct(struct task_struct * dst,struct task_struct * src)87 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
88 {
89 /*
90 * Save any process state which is live in hardware registers to the
91 * parent context prior to duplication. This prevents the new child
92 * state becoming stale if the parent is preempted before copy_thread()
93 * gets a chance to save the parent's live hardware registers to the
94 * child context.
95 */
96 preempt_disable();
97
98 if (is_msa_enabled())
99 save_msa(current);
100 else if (is_fpu_owner())
101 _save_fp(current);
102
103 save_dsp(current);
104
105 preempt_enable();
106
107 *dst = *src;
108 return 0;
109 }
110
111 /*
112 * Copy architecture-specific thread state
113 */
copy_thread(unsigned long clone_flags,unsigned long usp,unsigned long kthread_arg,struct task_struct * p)114 int copy_thread(unsigned long clone_flags, unsigned long usp,
115 unsigned long kthread_arg, struct task_struct *p)
116 {
117 struct thread_info *ti = task_thread_info(p);
118 struct pt_regs *childregs, *regs = current_pt_regs();
119 unsigned long childksp;
120
121 childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
122
123 /* set up new TSS. */
124 childregs = (struct pt_regs *) childksp - 1;
125 /* Put the stack after the struct pt_regs. */
126 childksp = (unsigned long) childregs;
127 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
128 if (unlikely(p->flags & PF_KTHREAD)) {
129 /* kernel thread */
130 unsigned long status = p->thread.cp0_status;
131 memset(childregs, 0, sizeof(struct pt_regs));
132 ti->addr_limit = KERNEL_DS;
133 p->thread.reg16 = usp; /* fn */
134 p->thread.reg17 = kthread_arg;
135 p->thread.reg29 = childksp;
136 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
137 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
138 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
139 ((status & (ST0_KUC | ST0_IEC)) << 2);
140 #else
141 status |= ST0_EXL;
142 #endif
143 childregs->cp0_status = status;
144 return 0;
145 }
146
147 /* user thread */
148 *childregs = *regs;
149 childregs->regs[7] = 0; /* Clear error flag */
150 childregs->regs[2] = 0; /* Child gets zero as return value */
151 if (usp)
152 childregs->regs[29] = usp;
153 ti->addr_limit = USER_DS;
154
155 p->thread.reg29 = (unsigned long) childregs;
156 p->thread.reg31 = (unsigned long) ret_from_fork;
157
158 /*
159 * New tasks lose permission to use the fpu. This accelerates context
160 * switching for most programs since they don't use the fpu.
161 */
162 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
163
164 clear_tsk_thread_flag(p, TIF_USEDFPU);
165 clear_tsk_thread_flag(p, TIF_USEDMSA);
166 clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
167
168 #ifdef CONFIG_MIPS_MT_FPAFF
169 clear_tsk_thread_flag(p, TIF_FPUBOUND);
170 #endif /* CONFIG_MIPS_MT_FPAFF */
171
172 atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE);
173
174 if (clone_flags & CLONE_SETTLS)
175 ti->tp_value = regs->regs[7];
176
177 return 0;
178 }
179
180 #ifdef CONFIG_CC_STACKPROTECTOR
181 #include <linux/stackprotector.h>
182 unsigned long __stack_chk_guard __read_mostly;
183 EXPORT_SYMBOL(__stack_chk_guard);
184 #endif
185
186 struct mips_frame_info {
187 void *func;
188 unsigned long func_size;
189 int frame_size;
190 int pc_offset;
191 };
192
193 #define J_TARGET(pc,target) \
194 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
195
is_ra_save_ins(union mips_instruction * ip,int * poff)196 static inline int is_ra_save_ins(union mips_instruction *ip, int *poff)
197 {
198 #ifdef CONFIG_CPU_MICROMIPS
199 /*
200 * swsp ra,offset
201 * swm16 reglist,offset(sp)
202 * swm32 reglist,offset(sp)
203 * sw32 ra,offset(sp)
204 * jradiussp - NOT SUPPORTED
205 *
206 * microMIPS is way more fun...
207 */
208 if (mm_insn_16bit(ip->halfword[1])) {
209 switch (ip->mm16_r5_format.opcode) {
210 case mm_swsp16_op:
211 if (ip->mm16_r5_format.rt != 31)
212 return 0;
213
214 *poff = ip->mm16_r5_format.imm;
215 *poff = (*poff << 2) / sizeof(ulong);
216 return 1;
217
218 case mm_pool16c_op:
219 switch (ip->mm16_m_format.func) {
220 case mm_swm16_op:
221 *poff = ip->mm16_m_format.imm;
222 *poff += 1 + ip->mm16_m_format.rlist;
223 *poff = (*poff << 2) / sizeof(ulong);
224 return 1;
225
226 default:
227 return 0;
228 }
229
230 default:
231 return 0;
232 }
233 }
234
235 switch (ip->i_format.opcode) {
236 case mm_sw32_op:
237 if (ip->i_format.rs != 29)
238 return 0;
239 if (ip->i_format.rt != 31)
240 return 0;
241
242 *poff = ip->i_format.simmediate / sizeof(ulong);
243 return 1;
244
245 case mm_pool32b_op:
246 switch (ip->mm_m_format.func) {
247 case mm_swm32_func:
248 if (ip->mm_m_format.rd < 0x10)
249 return 0;
250 if (ip->mm_m_format.base != 29)
251 return 0;
252
253 *poff = ip->mm_m_format.simmediate;
254 *poff += (ip->mm_m_format.rd & 0xf) * sizeof(u32);
255 *poff /= sizeof(ulong);
256 return 1;
257 default:
258 return 0;
259 }
260
261 default:
262 return 0;
263 }
264 #else
265 /* sw / sd $ra, offset($sp) */
266 if ((ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
267 ip->i_format.rs == 29 && ip->i_format.rt == 31) {
268 *poff = ip->i_format.simmediate / sizeof(ulong);
269 return 1;
270 }
271
272 return 0;
273 #endif
274 }
275
is_jump_ins(union mips_instruction * ip)276 static inline int is_jump_ins(union mips_instruction *ip)
277 {
278 #ifdef CONFIG_CPU_MICROMIPS
279 /*
280 * jr16,jrc,jalr16,jalr16
281 * jal
282 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
283 * jraddiusp - NOT SUPPORTED
284 *
285 * microMIPS is kind of more fun...
286 */
287 if (mm_insn_16bit(ip->halfword[1])) {
288 if ((ip->mm16_r5_format.opcode == mm_pool16c_op &&
289 (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op))
290 return 1;
291 return 0;
292 }
293
294 if (ip->j_format.opcode == mm_j32_op)
295 return 1;
296 if (ip->j_format.opcode == mm_jal32_op)
297 return 1;
298 if (ip->r_format.opcode != mm_pool32a_op ||
299 ip->r_format.func != mm_pool32axf_op)
300 return 0;
301 return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
302 #else
303 if (ip->j_format.opcode == j_op)
304 return 1;
305 if (ip->j_format.opcode == jal_op)
306 return 1;
307 if (ip->r_format.opcode != spec_op)
308 return 0;
309 return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
310 #endif
311 }
312
is_sp_move_ins(union mips_instruction * ip)313 static inline int is_sp_move_ins(union mips_instruction *ip)
314 {
315 #ifdef CONFIG_CPU_MICROMIPS
316 /*
317 * addiusp -imm
318 * addius5 sp,-imm
319 * addiu32 sp,sp,-imm
320 * jradiussp - NOT SUPPORTED
321 *
322 * microMIPS is not more fun...
323 */
324 if (mm_insn_16bit(ip->halfword[1])) {
325 return (ip->mm16_r3_format.opcode == mm_pool16d_op &&
326 ip->mm16_r3_format.simmediate && mm_addiusp_func) ||
327 (ip->mm16_r5_format.opcode == mm_pool16d_op &&
328 ip->mm16_r5_format.rt == 29);
329 }
330
331 return ip->mm_i_format.opcode == mm_addiu32_op &&
332 ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29;
333 #else
334 /* addiu/daddiu sp,sp,-imm */
335 if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
336 return 0;
337 if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
338 return 1;
339 #endif
340 return 0;
341 }
342
get_frame_info(struct mips_frame_info * info)343 static int get_frame_info(struct mips_frame_info *info)
344 {
345 bool is_mmips = IS_ENABLED(CONFIG_CPU_MICROMIPS);
346 union mips_instruction insn, *ip;
347 const unsigned int max_insns = 128;
348 unsigned int last_insn_size = 0;
349 unsigned int i;
350
351 info->pc_offset = -1;
352 info->frame_size = 0;
353
354 ip = (void *)msk_isa16_mode((ulong)info->func);
355 if (!ip)
356 goto err;
357
358 for (i = 0; i < max_insns; i++) {
359 ip = (void *)ip + last_insn_size;
360
361 if (is_mmips && mm_insn_16bit(ip->halfword[0])) {
362 insn.halfword[0] = 0;
363 insn.halfword[1] = ip->halfword[0];
364 last_insn_size = 2;
365 } else if (is_mmips) {
366 insn.halfword[0] = ip->halfword[1];
367 insn.halfword[1] = ip->halfword[0];
368 last_insn_size = 4;
369 } else {
370 insn.word = ip->word;
371 last_insn_size = 4;
372 }
373
374 if (is_jump_ins(&insn))
375 break;
376
377 if (!info->frame_size) {
378 if (is_sp_move_ins(&insn))
379 {
380 #ifdef CONFIG_CPU_MICROMIPS
381 if (mm_insn_16bit(ip->halfword[0]))
382 {
383 unsigned short tmp;
384
385 if (ip->halfword[0] & mm_addiusp_func)
386 {
387 tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
388 info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
389 } else {
390 tmp = (ip->halfword[0] >> 1);
391 info->frame_size = -(signed short)(tmp & 0xf);
392 }
393 } else
394 #endif
395 info->frame_size = - ip->i_format.simmediate;
396 }
397 continue;
398 }
399 if (info->pc_offset == -1 &&
400 is_ra_save_ins(&insn, &info->pc_offset))
401 break;
402 }
403 if (info->frame_size && info->pc_offset >= 0) /* nested */
404 return 0;
405 if (info->pc_offset < 0) /* leaf */
406 return 1;
407 /* prologue seems boggus... */
408 err:
409 return -1;
410 }
411
412 static struct mips_frame_info schedule_mfi __read_mostly;
413
414 #ifdef CONFIG_KALLSYMS
get___schedule_addr(void)415 static unsigned long get___schedule_addr(void)
416 {
417 return kallsyms_lookup_name("__schedule");
418 }
419 #else
get___schedule_addr(void)420 static unsigned long get___schedule_addr(void)
421 {
422 union mips_instruction *ip = (void *)schedule;
423 int max_insns = 8;
424 int i;
425
426 for (i = 0; i < max_insns; i++, ip++) {
427 if (ip->j_format.opcode == j_op)
428 return J_TARGET(ip, ip->j_format.target);
429 }
430 return 0;
431 }
432 #endif
433
frame_info_init(void)434 static int __init frame_info_init(void)
435 {
436 unsigned long size = 0;
437 #ifdef CONFIG_KALLSYMS
438 unsigned long ofs;
439 #endif
440 unsigned long addr;
441
442 addr = get___schedule_addr();
443 if (!addr)
444 addr = (unsigned long)schedule;
445
446 #ifdef CONFIG_KALLSYMS
447 kallsyms_lookup_size_offset(addr, &size, &ofs);
448 #endif
449 schedule_mfi.func = (void *)addr;
450 schedule_mfi.func_size = size;
451
452 get_frame_info(&schedule_mfi);
453
454 /*
455 * Without schedule() frame info, result given by
456 * thread_saved_pc() and get_wchan() are not reliable.
457 */
458 if (schedule_mfi.pc_offset < 0)
459 printk("Can't analyze schedule() prologue at %p\n", schedule);
460
461 return 0;
462 }
463
464 arch_initcall(frame_info_init);
465
466 /*
467 * Return saved PC of a blocked thread.
468 */
thread_saved_pc(struct task_struct * tsk)469 unsigned long thread_saved_pc(struct task_struct *tsk)
470 {
471 struct thread_struct *t = &tsk->thread;
472
473 /* New born processes are a special case */
474 if (t->reg31 == (unsigned long) ret_from_fork)
475 return t->reg31;
476 if (schedule_mfi.pc_offset < 0)
477 return 0;
478 return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
479 }
480
481
482 #ifdef CONFIG_KALLSYMS
483 /* generic stack unwinding function */
unwind_stack_by_address(unsigned long stack_page,unsigned long * sp,unsigned long pc,unsigned long * ra)484 unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
485 unsigned long *sp,
486 unsigned long pc,
487 unsigned long *ra)
488 {
489 unsigned long low, high, irq_stack_high;
490 struct mips_frame_info info;
491 unsigned long size, ofs;
492 struct pt_regs *regs;
493 int leaf;
494
495 if (!stack_page)
496 return 0;
497
498 /*
499 * IRQ stacks start at IRQ_STACK_START
500 * task stacks at THREAD_SIZE - 32
501 */
502 low = stack_page;
503 if (!preemptible() && on_irq_stack(raw_smp_processor_id(), *sp)) {
504 high = stack_page + IRQ_STACK_START;
505 irq_stack_high = high;
506 } else {
507 high = stack_page + THREAD_SIZE - 32;
508 irq_stack_high = 0;
509 }
510
511 /*
512 * If we reached the top of the interrupt stack, start unwinding
513 * the interrupted task stack.
514 */
515 if (unlikely(*sp == irq_stack_high)) {
516 unsigned long task_sp = *(unsigned long *)*sp;
517
518 /*
519 * Check that the pointer saved in the IRQ stack head points to
520 * something within the stack of the current task
521 */
522 if (!object_is_on_stack((void *)task_sp))
523 return 0;
524
525 /*
526 * Follow pointer to tasks kernel stack frame where interrupted
527 * state was saved.
528 */
529 regs = (struct pt_regs *)task_sp;
530 pc = regs->cp0_epc;
531 if (!user_mode(regs) && __kernel_text_address(pc)) {
532 *sp = regs->regs[29];
533 *ra = regs->regs[31];
534 return pc;
535 }
536 return 0;
537 }
538 if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
539 return 0;
540 /*
541 * Return ra if an exception occurred at the first instruction
542 */
543 if (unlikely(ofs == 0)) {
544 pc = *ra;
545 *ra = 0;
546 return pc;
547 }
548
549 info.func = (void *)(pc - ofs);
550 info.func_size = ofs; /* analyze from start to ofs */
551 leaf = get_frame_info(&info);
552 if (leaf < 0)
553 return 0;
554
555 if (*sp < low || *sp + info.frame_size > high)
556 return 0;
557
558 if (leaf)
559 /*
560 * For some extreme cases, get_frame_info() can
561 * consider wrongly a nested function as a leaf
562 * one. In that cases avoid to return always the
563 * same value.
564 */
565 pc = pc != *ra ? *ra : 0;
566 else
567 pc = ((unsigned long *)(*sp))[info.pc_offset];
568
569 *sp += info.frame_size;
570 *ra = 0;
571 return __kernel_text_address(pc) ? pc : 0;
572 }
573 EXPORT_SYMBOL(unwind_stack_by_address);
574
575 /* used by show_backtrace() */
unwind_stack(struct task_struct * task,unsigned long * sp,unsigned long pc,unsigned long * ra)576 unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
577 unsigned long pc, unsigned long *ra)
578 {
579 unsigned long stack_page = 0;
580 int cpu;
581
582 for_each_possible_cpu(cpu) {
583 if (on_irq_stack(cpu, *sp)) {
584 stack_page = (unsigned long)irq_stack[cpu];
585 break;
586 }
587 }
588
589 if (!stack_page)
590 stack_page = (unsigned long)task_stack_page(task);
591
592 return unwind_stack_by_address(stack_page, sp, pc, ra);
593 }
594 #endif
595
596 /*
597 * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
598 */
get_wchan(struct task_struct * task)599 unsigned long get_wchan(struct task_struct *task)
600 {
601 unsigned long pc = 0;
602 #ifdef CONFIG_KALLSYMS
603 unsigned long sp;
604 unsigned long ra = 0;
605 #endif
606
607 if (!task || task == current || task->state == TASK_RUNNING)
608 goto out;
609 if (!task_stack_page(task))
610 goto out;
611
612 pc = thread_saved_pc(task);
613
614 #ifdef CONFIG_KALLSYMS
615 sp = task->thread.reg29 + schedule_mfi.frame_size;
616
617 while (in_sched_functions(pc))
618 pc = unwind_stack(task, &sp, pc, &ra);
619 #endif
620
621 out:
622 return pc;
623 }
624
625 /*
626 * Don't forget that the stack pointer must be aligned on a 8 bytes
627 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
628 */
arch_align_stack(unsigned long sp)629 unsigned long arch_align_stack(unsigned long sp)
630 {
631 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
632 sp -= get_random_int() & ~PAGE_MASK;
633
634 return sp & ALMASK;
635 }
636
637 static DEFINE_PER_CPU(struct call_single_data, backtrace_csd);
638 static struct cpumask backtrace_csd_busy;
639
arch_dump_stack(void * info)640 static void arch_dump_stack(void *info)
641 {
642 struct pt_regs *regs;
643 static arch_spinlock_t lock = __ARCH_SPIN_LOCK_UNLOCKED;
644
645 arch_spin_lock(&lock);
646 regs = get_irq_regs();
647
648 if (regs)
649 show_regs(regs);
650 else
651 dump_stack();
652 arch_spin_unlock(&lock);
653
654 cpumask_clear_cpu(smp_processor_id(), &backtrace_csd_busy);
655 }
656
arch_trigger_all_cpu_backtrace(bool include_self)657 void arch_trigger_all_cpu_backtrace(bool include_self)
658 {
659 struct call_single_data *csd;
660 int cpu;
661
662 for_each_cpu(cpu, cpu_online_mask) {
663 /*
664 * If we previously sent an IPI to the target CPU & it hasn't
665 * cleared its bit in the busy cpumask then it didn't handle
666 * our previous IPI & it's not safe for us to reuse the
667 * call_single_data_t.
668 */
669 if (cpumask_test_and_set_cpu(cpu, &backtrace_csd_busy)) {
670 pr_warn("Unable to send backtrace IPI to CPU%u - perhaps it hung?\n",
671 cpu);
672 continue;
673 }
674
675 csd = &per_cpu(backtrace_csd, cpu);
676 csd->func = arch_dump_stack;
677 smp_call_function_single_async(cpu, csd);
678 }
679 }
680
mips_get_process_fp_mode(struct task_struct * task)681 int mips_get_process_fp_mode(struct task_struct *task)
682 {
683 int value = 0;
684
685 if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
686 value |= PR_FP_MODE_FR;
687 if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
688 value |= PR_FP_MODE_FRE;
689
690 return value;
691 }
692
mips_set_process_fp_mode(struct task_struct * task,unsigned int value)693 int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
694 {
695 const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
696 unsigned long switch_count;
697 struct task_struct *t;
698
699 /* If nothing to change, return right away, successfully. */
700 if (value == mips_get_process_fp_mode(task))
701 return 0;
702
703 /* Only accept a mode change if 64-bit FP enabled for o32. */
704 if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT))
705 return -EOPNOTSUPP;
706
707 /* And only for o32 tasks. */
708 if (IS_ENABLED(CONFIG_64BIT) && !test_thread_flag(TIF_32BIT_REGS))
709 return -EOPNOTSUPP;
710
711 /* Check the value is valid */
712 if (value & ~known_bits)
713 return -EOPNOTSUPP;
714
715 /* Setting FRE without FR is not supported. */
716 if ((value & (PR_FP_MODE_FR | PR_FP_MODE_FRE)) == PR_FP_MODE_FRE)
717 return -EOPNOTSUPP;
718
719 /* Avoid inadvertently triggering emulation */
720 if ((value & PR_FP_MODE_FR) && raw_cpu_has_fpu &&
721 !(raw_current_cpu_data.fpu_id & MIPS_FPIR_F64))
722 return -EOPNOTSUPP;
723 if ((value & PR_FP_MODE_FRE) && raw_cpu_has_fpu && !cpu_has_fre)
724 return -EOPNOTSUPP;
725
726 /* FR = 0 not supported in MIPS R6 */
727 if (!(value & PR_FP_MODE_FR) && raw_cpu_has_fpu && cpu_has_mips_r6)
728 return -EOPNOTSUPP;
729
730 /* Proceed with the mode switch */
731 preempt_disable();
732
733 /* Save FP & vector context, then disable FPU & MSA */
734 if (task->signal == current->signal)
735 lose_fpu(1);
736
737 /* Prevent any threads from obtaining live FP context */
738 atomic_set(&task->mm->context.fp_mode_switching, 1);
739 smp_mb__after_atomic();
740
741 /*
742 * If there are multiple online CPUs then wait until all threads whose
743 * FP mode is about to change have been context switched. This approach
744 * allows us to only worry about whether an FP mode switch is in
745 * progress when FP is first used in a tasks time slice. Pretty much all
746 * of the mode switch overhead can thus be confined to cases where mode
747 * switches are actually occurring. That is, to here. However for the
748 * thread performing the mode switch it may take a while...
749 */
750 if (num_online_cpus() > 1) {
751 spin_lock_irq(&task->sighand->siglock);
752
753 for_each_thread(task, t) {
754 if (t == current)
755 continue;
756
757 switch_count = t->nvcsw + t->nivcsw;
758
759 do {
760 spin_unlock_irq(&task->sighand->siglock);
761 cond_resched();
762 spin_lock_irq(&task->sighand->siglock);
763 } while ((t->nvcsw + t->nivcsw) == switch_count);
764 }
765
766 spin_unlock_irq(&task->sighand->siglock);
767 }
768
769 /*
770 * There are now no threads of the process with live FP context, so it
771 * is safe to proceed with the FP mode switch.
772 */
773 for_each_thread(task, t) {
774 /* Update desired FP register width */
775 if (value & PR_FP_MODE_FR) {
776 clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
777 } else {
778 set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
779 clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
780 }
781
782 /* Update desired FP single layout */
783 if (value & PR_FP_MODE_FRE)
784 set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
785 else
786 clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
787 }
788
789 /* Allow threads to use FP again */
790 atomic_set(&task->mm->context.fp_mode_switching, 0);
791 preempt_enable();
792
793 return 0;
794 }
795