1/* 2 * T1024 QDS Device Tree Source 3 * 4 * Copyright 2014 Freescale Semiconductor Inc. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * * Neither the name of Freescale Semiconductor nor the 14 * names of its contributors may be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * 18 * ALTERNATIVELY, this software may be distributed under the terms of the 19 * GNU General Public License ("GPL") as published by the Free Software 20 * Foundation, either version 2 of that License or (at your option) any 21 * later version. 22 * 23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35/include/ "t102xsi-pre.dtsi" 36 37/ { 38 model = "fsl,T1024QDS"; 39 compatible = "fsl,T1024QDS"; 40 #address-cells = <2>; 41 #size-cells = <2>; 42 interrupt-parent = <&mpic>; 43 44 ifc: localbus@ffe124000 { 45 reg = <0xf 0xfe124000 0 0x2000>; 46 ranges = <0 0 0xf 0xe8000000 0x08000000 47 2 0 0xf 0xff800000 0x00010000 48 3 0 0xf 0xffdf0000 0x00008000>; 49 50 nor@0,0 { 51 #address-cells = <1>; 52 #size-cells = <1>; 53 compatible = "cfi-flash"; 54 reg = <0x0 0x0 0x8000000>; 55 bank-width = <2>; 56 device-width = <1>; 57 }; 58 59 nand@2,0 { 60 #address-cells = <1>; 61 #size-cells = <1>; 62 compatible = "fsl,ifc-nand"; 63 reg = <0x2 0x0 0x10000>; 64 }; 65 66 board-control@3,0 { 67 #address-cells = <1>; 68 #size-cells = <1>; 69 compatible = "fsl,tetra-fpga", "fsl,fpga-qixis"; 70 reg = <3 0 0x300>; 71 ranges = <0 3 0 0x300>; 72 }; 73 }; 74 75 memory { 76 device_type = "memory"; 77 }; 78 79 dcsr: dcsr@f00000000 { 80 ranges = <0x00000000 0xf 0x00000000 0x01072000>; 81 }; 82 83 soc: soc@ffe000000 { 84 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 85 reg = <0xf 0xfe000000 0 0x00001000>; 86 spi@110000 { 87 flash@0 { 88 #address-cells = <1>; 89 #size-cells = <1>; 90 compatible = "micron,n25q128a11"; /* 16MB */ 91 reg = <0>; 92 spi-max-frequency = <10000000>; 93 }; 94 95 flash@1 { 96 #address-cells = <1>; 97 #size-cells = <1>; 98 compatible = "sst,sst25wf040"; /* 512KB */ 99 reg = <1>; 100 spi-max-frequency = <10000000>; 101 }; 102 103 flash@2 { 104 #address-cells = <1>; 105 #size-cells = <1>; 106 compatible = "eon,en25s64"; /* 8MB */ 107 reg = <2>; 108 spi-max-frequency = <10000000>; 109 }; 110 111 slic@2 { 112 compatible = "maxim,ds26522"; 113 reg = <2>; 114 spi-max-frequency = <2000000>; 115 }; 116 117 slic@3 { 118 compatible = "maxim,ds26522"; 119 reg = <3>; 120 spi-max-frequency = <2000000>; 121 }; 122 }; 123 124 i2c@118000 { 125 pca9547@77 { 126 compatible = "nxp,pca9547"; 127 reg = <0x77>; 128 #address-cells = <1>; 129 #size-cells = <0>; 130 131 i2c@0 { 132 #address-cells = <1>; 133 #size-cells = <0>; 134 reg = <0x0>; 135 136 eeprom@50 { 137 compatible = "atmel,24c512"; 138 reg = <0x50>; 139 }; 140 141 eeprom@51 { 142 compatible = "atmel,24c02"; 143 reg = <0x51>; 144 }; 145 146 eeprom@57 { 147 compatible = "atmel,24c02"; 148 reg = <0x57>; 149 }; 150 }; 151 152 i2c@2 { 153 #address-cells = <1>; 154 #size-cells = <0>; 155 reg = <0x2>; 156 157 ina220@40 { 158 compatible = "ti,ina220"; 159 reg = <0x40>; 160 shunt-resistor = <1000>; 161 }; 162 163 ina220@41 { 164 compatible = "ti,ina220"; 165 reg = <0x41>; 166 shunt-resistor = <1000>; 167 }; 168 }; 169 170 i2c@3 { 171 #address-cells = <1>; 172 #size-cells = <0>; 173 reg = <0x3>; 174 175 adt7461@4c { 176 /* Thermal Monitor */ 177 compatible = "adi,adt7461"; 178 reg = <0x4c>; 179 }; 180 181 eeprom@55 { 182 compatible = "atmel,24c02"; 183 reg = <0x55>; 184 }; 185 186 eeprom@56 { 187 compatible = "atmel,24c512"; 188 reg = <0x56>; 189 }; 190 191 eeprom@57 { 192 compatible = "atmel,24c512"; 193 reg = <0x57>; 194 }; 195 }; 196 }; 197 rtc@68 { 198 compatible = "dallas,ds3232"; 199 reg = <0x68>; 200 interrupts = <0x5 0x1 0 0>; 201 }; 202 }; 203 }; 204 205 pci0: pcie@ffe240000 { 206 reg = <0xf 0xfe240000 0 0x10000>; 207 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0 0x10000000 208 0x01000000 0 0x00000000 0xf 0xf8000000 0 0x00010000>; 209 pcie@0 { 210 ranges = <0x02000000 0 0xe0000000 211 0x02000000 0 0xe0000000 212 0 0x10000000 213 214 0x01000000 0 0x00000000 215 0x01000000 0 0x00000000 216 0 0x00010000>; 217 }; 218 }; 219 220 pci1: pcie@ffe250000 { 221 reg = <0xf 0xfe250000 0 0x10000>; 222 ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000 223 0x01000000 0 0x00000000 0xf 0xf8010000 0 0x00010000>; 224 pcie@0 { 225 ranges = <0x02000000 0 0xe0000000 226 0x02000000 0 0xe0000000 227 0 0x10000000 228 229 0x01000000 0 0x00000000 230 0x01000000 0 0x00000000 231 0 0x00010000>; 232 }; 233 }; 234 235 pci2: pcie@ffe260000 { 236 reg = <0xf 0xfe260000 0 0x10000>; 237 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000 238 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; 239 pcie@0 { 240 ranges = <0x02000000 0 0xe0000000 241 0x02000000 0 0xe0000000 242 0 0x10000000 243 244 0x01000000 0 0x00000000 245 0x01000000 0 0x00000000 246 0 0x00010000>; 247 }; 248 }; 249}; 250 251/include/ "t1024si-post.dtsi" 252