1 /*
2 * SMP related functions
3 *
4 * Copyright IBM Corp. 1999, 2012
5 * Author(s): Denis Joseph Barrow,
6 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
7 * Heiko Carstens <heiko.carstens@de.ibm.com>,
8 *
9 * based on other smp stuff by
10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
11 * (c) 1998 Ingo Molnar
12 *
13 * The code outside of smp.c uses logical cpu numbers, only smp.c does
14 * the translation of logical to physical cpu ids. All new code that
15 * operates on physical cpu numbers needs to go into smp.c.
16 */
17
18 #define KMSG_COMPONENT "cpu"
19 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
20
21 #include <linux/workqueue.h>
22 #include <linux/module.h>
23 #include <linux/init.h>
24 #include <linux/mm.h>
25 #include <linux/err.h>
26 #include <linux/spinlock.h>
27 #include <linux/kernel_stat.h>
28 #include <linux/delay.h>
29 #include <linux/interrupt.h>
30 #include <linux/irqflags.h>
31 #include <linux/cpu.h>
32 #include <linux/slab.h>
33 #include <linux/crash_dump.h>
34 #include <linux/memblock.h>
35 #include <asm/asm-offsets.h>
36 #include <asm/diag.h>
37 #include <asm/switch_to.h>
38 #include <asm/facility.h>
39 #include <asm/ipl.h>
40 #include <asm/setup.h>
41 #include <asm/irq.h>
42 #include <asm/tlbflush.h>
43 #include <asm/vtimer.h>
44 #include <asm/lowcore.h>
45 #include <asm/sclp.h>
46 #include <asm/vdso.h>
47 #include <asm/debug.h>
48 #include <asm/os_info.h>
49 #include <asm/sigp.h>
50 #include <asm/idle.h>
51 #include "entry.h"
52
53 enum {
54 ec_schedule = 0,
55 ec_call_function_single,
56 ec_stop_cpu,
57 };
58
59 enum {
60 CPU_STATE_STANDBY,
61 CPU_STATE_CONFIGURED,
62 };
63
64 static DEFINE_PER_CPU(struct cpu *, cpu_device);
65
66 struct pcpu {
67 struct _lowcore *lowcore; /* lowcore page(s) for the cpu */
68 unsigned long ec_mask; /* bit mask for ec_xxx functions */
69 signed char state; /* physical cpu state */
70 signed char polarization; /* physical polarization */
71 u16 address; /* physical cpu address */
72 };
73
74 static u8 boot_core_type;
75 static struct pcpu pcpu_devices[NR_CPUS];
76
77 unsigned int smp_cpu_mt_shift;
78 EXPORT_SYMBOL(smp_cpu_mt_shift);
79
80 unsigned int smp_cpu_mtid;
81 EXPORT_SYMBOL(smp_cpu_mtid);
82
83 static unsigned int smp_max_threads __initdata = -1U;
84
early_nosmt(char * s)85 static int __init early_nosmt(char *s)
86 {
87 smp_max_threads = 1;
88 return 0;
89 }
90 early_param("nosmt", early_nosmt);
91
early_smt(char * s)92 static int __init early_smt(char *s)
93 {
94 get_option(&s, &smp_max_threads);
95 return 0;
96 }
97 early_param("smt", early_smt);
98
99 /*
100 * The smp_cpu_state_mutex must be held when changing the state or polarization
101 * member of a pcpu data structure within the pcpu_devices arreay.
102 */
103 DEFINE_MUTEX(smp_cpu_state_mutex);
104
105 /*
106 * Signal processor helper functions.
107 */
__pcpu_sigp_relax(u16 addr,u8 order,unsigned long parm,u32 * status)108 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm,
109 u32 *status)
110 {
111 int cc;
112
113 while (1) {
114 cc = __pcpu_sigp(addr, order, parm, NULL);
115 if (cc != SIGP_CC_BUSY)
116 return cc;
117 cpu_relax();
118 }
119 }
120
pcpu_sigp_retry(struct pcpu * pcpu,u8 order,u32 parm)121 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
122 {
123 int cc, retry;
124
125 for (retry = 0; ; retry++) {
126 cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
127 if (cc != SIGP_CC_BUSY)
128 break;
129 if (retry >= 3)
130 udelay(10);
131 }
132 return cc;
133 }
134
pcpu_stopped(struct pcpu * pcpu)135 static inline int pcpu_stopped(struct pcpu *pcpu)
136 {
137 u32 uninitialized_var(status);
138
139 if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
140 0, &status) != SIGP_CC_STATUS_STORED)
141 return 0;
142 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
143 }
144
pcpu_running(struct pcpu * pcpu)145 static inline int pcpu_running(struct pcpu *pcpu)
146 {
147 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
148 0, NULL) != SIGP_CC_STATUS_STORED)
149 return 1;
150 /* Status stored condition code is equivalent to cpu not running. */
151 return 0;
152 }
153
154 /*
155 * Find struct pcpu by cpu address.
156 */
pcpu_find_address(const struct cpumask * mask,u16 address)157 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
158 {
159 int cpu;
160
161 for_each_cpu(cpu, mask)
162 if (pcpu_devices[cpu].address == address)
163 return pcpu_devices + cpu;
164 return NULL;
165 }
166
pcpu_ec_call(struct pcpu * pcpu,int ec_bit)167 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
168 {
169 int order;
170
171 if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
172 return;
173 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
174 pcpu_sigp_retry(pcpu, order, 0);
175 }
176
177 #define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
178 #define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
179
pcpu_alloc_lowcore(struct pcpu * pcpu,int cpu)180 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
181 {
182 unsigned long async_stack, panic_stack;
183 struct _lowcore *lc;
184
185 if (pcpu != &pcpu_devices[0]) {
186 pcpu->lowcore = (struct _lowcore *)
187 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
188 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
189 panic_stack = __get_free_page(GFP_KERNEL);
190 if (!pcpu->lowcore || !panic_stack || !async_stack)
191 goto out;
192 } else {
193 async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET;
194 panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET;
195 }
196 lc = pcpu->lowcore;
197 memcpy(lc, &S390_lowcore, 512);
198 memset((char *) lc + 512, 0, sizeof(*lc) - 512);
199 lc->async_stack = async_stack + ASYNC_FRAME_OFFSET;
200 lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET;
201 lc->cpu_nr = cpu;
202 lc->spinlock_lockval = arch_spin_lockval(cpu);
203 lc->br_r1_trampoline = 0x07f1; /* br %r1 */
204 if (MACHINE_HAS_VX)
205 lc->vector_save_area_addr =
206 (unsigned long) &lc->vector_save_area;
207 if (vdso_alloc_per_cpu(lc))
208 goto out;
209 lowcore_ptr[cpu] = lc;
210 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
211 return 0;
212 out:
213 if (pcpu != &pcpu_devices[0]) {
214 free_page(panic_stack);
215 free_pages(async_stack, ASYNC_ORDER);
216 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
217 }
218 return -ENOMEM;
219 }
220
221 #ifdef CONFIG_HOTPLUG_CPU
222
pcpu_free_lowcore(struct pcpu * pcpu)223 static void pcpu_free_lowcore(struct pcpu *pcpu)
224 {
225 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
226 lowcore_ptr[pcpu - pcpu_devices] = NULL;
227 vdso_free_per_cpu(pcpu->lowcore);
228 if (pcpu == &pcpu_devices[0])
229 return;
230 free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET);
231 free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER);
232 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
233 }
234
235 #endif /* CONFIG_HOTPLUG_CPU */
236
pcpu_prepare_secondary(struct pcpu * pcpu,int cpu)237 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
238 {
239 struct _lowcore *lc = pcpu->lowcore;
240
241 if (MACHINE_HAS_TLB_LC)
242 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
243 cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
244 atomic_inc(&init_mm.context.attach_count);
245 lc->cpu_nr = cpu;
246 lc->spinlock_lockval = arch_spin_lockval(cpu);
247 lc->percpu_offset = __per_cpu_offset[cpu];
248 lc->kernel_asce = S390_lowcore.kernel_asce;
249 lc->machine_flags = S390_lowcore.machine_flags;
250 lc->user_timer = lc->system_timer = lc->steal_timer = 0;
251 __ctl_store(lc->cregs_save_area, 0, 15);
252 save_access_regs((unsigned int *) lc->access_regs_save_area);
253 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
254 sizeof(lc->stfle_fac_list));
255 memcpy(lc->alt_stfle_fac_list, S390_lowcore.alt_stfle_fac_list,
256 sizeof(lc->alt_stfle_fac_list));
257 }
258
pcpu_attach_task(struct pcpu * pcpu,struct task_struct * tsk)259 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
260 {
261 struct _lowcore *lc = pcpu->lowcore;
262 struct thread_info *ti = task_thread_info(tsk);
263
264 lc->kernel_stack = (unsigned long) task_stack_page(tsk)
265 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
266 lc->thread_info = (unsigned long) task_thread_info(tsk);
267 lc->current_task = (unsigned long) tsk;
268 lc->lpp = LPP_MAGIC;
269 lc->current_pid = tsk->pid;
270 lc->user_timer = ti->user_timer;
271 lc->system_timer = ti->system_timer;
272 lc->steal_timer = 0;
273 }
274
pcpu_start_fn(struct pcpu * pcpu,void (* func)(void *),void * data)275 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
276 {
277 struct _lowcore *lc = pcpu->lowcore;
278
279 lc->restart_stack = lc->kernel_stack;
280 lc->restart_fn = (unsigned long) func;
281 lc->restart_data = (unsigned long) data;
282 lc->restart_source = -1UL;
283 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
284 }
285
286 /*
287 * Call function via PSW restart on pcpu and stop the current cpu.
288 */
pcpu_delegate(struct pcpu * pcpu,void (* func)(void *),void * data,unsigned long stack)289 static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),
290 void *data, unsigned long stack)
291 {
292 struct _lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
293 unsigned long source_cpu = stap();
294
295 __load_psw_mask(PSW_KERNEL_BITS);
296 if (pcpu->address == source_cpu)
297 func(data); /* should not return */
298 /* Stop target cpu (if func returns this stops the current cpu). */
299 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
300 /* Restart func on the target cpu and stop the current cpu. */
301 mem_assign_absolute(lc->restart_stack, stack);
302 mem_assign_absolute(lc->restart_fn, (unsigned long) func);
303 mem_assign_absolute(lc->restart_data, (unsigned long) data);
304 mem_assign_absolute(lc->restart_source, source_cpu);
305 __bpon();
306 asm volatile(
307 "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
308 " brc 2,0b # busy, try again\n"
309 "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
310 " brc 2,1b # busy, try again\n"
311 : : "d" (pcpu->address), "d" (source_cpu),
312 "K" (SIGP_RESTART), "K" (SIGP_STOP)
313 : "0", "1", "cc");
314 for (;;) ;
315 }
316
317 /*
318 * Enable additional logical cpus for multi-threading.
319 */
pcpu_set_smt(unsigned int mtid)320 static int pcpu_set_smt(unsigned int mtid)
321 {
322 register unsigned long reg1 asm ("1") = (unsigned long) mtid;
323 int cc;
324
325 if (smp_cpu_mtid == mtid)
326 return 0;
327 asm volatile(
328 " sigp %1,0,%2 # sigp set multi-threading\n"
329 " ipm %0\n"
330 " srl %0,28\n"
331 : "=d" (cc) : "d" (reg1), "K" (SIGP_SET_MULTI_THREADING)
332 : "cc");
333 if (cc == 0) {
334 smp_cpu_mtid = mtid;
335 smp_cpu_mt_shift = 0;
336 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
337 smp_cpu_mt_shift++;
338 pcpu_devices[0].address = stap();
339 }
340 return cc;
341 }
342
343 /*
344 * Call function on an online CPU.
345 */
smp_call_online_cpu(void (* func)(void *),void * data)346 void smp_call_online_cpu(void (*func)(void *), void *data)
347 {
348 struct pcpu *pcpu;
349
350 /* Use the current cpu if it is online. */
351 pcpu = pcpu_find_address(cpu_online_mask, stap());
352 if (!pcpu)
353 /* Use the first online cpu. */
354 pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
355 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
356 }
357
358 /*
359 * Call function on the ipl CPU.
360 */
smp_call_ipl_cpu(void (* func)(void *),void * data)361 void smp_call_ipl_cpu(void (*func)(void *), void *data)
362 {
363 struct _lowcore *lc = pcpu_devices->lowcore;
364
365 if (pcpu_devices[0].address == stap())
366 lc = &S390_lowcore;
367
368 pcpu_delegate(&pcpu_devices[0], func, data,
369 lc->panic_stack - PANIC_FRAME_OFFSET + PAGE_SIZE);
370 }
371
smp_find_processor_id(u16 address)372 int smp_find_processor_id(u16 address)
373 {
374 int cpu;
375
376 for_each_present_cpu(cpu)
377 if (pcpu_devices[cpu].address == address)
378 return cpu;
379 return -1;
380 }
381
smp_vcpu_scheduled(int cpu)382 int smp_vcpu_scheduled(int cpu)
383 {
384 return pcpu_running(pcpu_devices + cpu);
385 }
386
smp_yield_cpu(int cpu)387 void smp_yield_cpu(int cpu)
388 {
389 if (MACHINE_HAS_DIAG9C) {
390 diag_stat_inc_norecursion(DIAG_STAT_X09C);
391 asm volatile("diag %0,0,0x9c"
392 : : "d" (pcpu_devices[cpu].address));
393 } else if (MACHINE_HAS_DIAG44) {
394 diag_stat_inc_norecursion(DIAG_STAT_X044);
395 asm volatile("diag 0,0,0x44");
396 }
397 }
398
399 /*
400 * Send cpus emergency shutdown signal. This gives the cpus the
401 * opportunity to complete outstanding interrupts.
402 */
smp_emergency_stop(cpumask_t * cpumask)403 static void smp_emergency_stop(cpumask_t *cpumask)
404 {
405 u64 end;
406 int cpu;
407
408 end = get_tod_clock() + (1000000UL << 12);
409 for_each_cpu(cpu, cpumask) {
410 struct pcpu *pcpu = pcpu_devices + cpu;
411 set_bit(ec_stop_cpu, &pcpu->ec_mask);
412 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
413 0, NULL) == SIGP_CC_BUSY &&
414 get_tod_clock() < end)
415 cpu_relax();
416 }
417 while (get_tod_clock() < end) {
418 for_each_cpu(cpu, cpumask)
419 if (pcpu_stopped(pcpu_devices + cpu))
420 cpumask_clear_cpu(cpu, cpumask);
421 if (cpumask_empty(cpumask))
422 break;
423 cpu_relax();
424 }
425 }
426
427 /*
428 * Stop all cpus but the current one.
429 */
smp_send_stop(void)430 void smp_send_stop(void)
431 {
432 cpumask_t cpumask;
433 int cpu;
434
435 /* Disable all interrupts/machine checks */
436 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
437 trace_hardirqs_off();
438
439 debug_set_critical();
440 cpumask_copy(&cpumask, cpu_online_mask);
441 cpumask_clear_cpu(smp_processor_id(), &cpumask);
442
443 if (oops_in_progress)
444 smp_emergency_stop(&cpumask);
445
446 /* stop all processors */
447 for_each_cpu(cpu, &cpumask) {
448 struct pcpu *pcpu = pcpu_devices + cpu;
449 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
450 while (!pcpu_stopped(pcpu))
451 cpu_relax();
452 }
453 }
454
455 /*
456 * This is the main routine where commands issued by other
457 * cpus are handled.
458 */
smp_handle_ext_call(void)459 static void smp_handle_ext_call(void)
460 {
461 unsigned long bits;
462
463 /* handle bit signal external calls */
464 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
465 if (test_bit(ec_stop_cpu, &bits))
466 smp_stop_cpu();
467 if (test_bit(ec_schedule, &bits))
468 scheduler_ipi();
469 if (test_bit(ec_call_function_single, &bits))
470 generic_smp_call_function_single_interrupt();
471 }
472
do_ext_call_interrupt(struct ext_code ext_code,unsigned int param32,unsigned long param64)473 static void do_ext_call_interrupt(struct ext_code ext_code,
474 unsigned int param32, unsigned long param64)
475 {
476 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
477 smp_handle_ext_call();
478 }
479
arch_send_call_function_ipi_mask(const struct cpumask * mask)480 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
481 {
482 int cpu;
483
484 for_each_cpu(cpu, mask)
485 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
486 }
487
arch_send_call_function_single_ipi(int cpu)488 void arch_send_call_function_single_ipi(int cpu)
489 {
490 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
491 }
492
493 /*
494 * this function sends a 'reschedule' IPI to another CPU.
495 * it goes straight through and wastes no time serializing
496 * anything. Worst case is that we lose a reschedule ...
497 */
smp_send_reschedule(int cpu)498 void smp_send_reschedule(int cpu)
499 {
500 pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
501 }
502
503 /*
504 * parameter area for the set/clear control bit callbacks
505 */
506 struct ec_creg_mask_parms {
507 unsigned long orval;
508 unsigned long andval;
509 int cr;
510 };
511
512 /*
513 * callback for setting/clearing control bits
514 */
smp_ctl_bit_callback(void * info)515 static void smp_ctl_bit_callback(void *info)
516 {
517 struct ec_creg_mask_parms *pp = info;
518 unsigned long cregs[16];
519
520 __ctl_store(cregs, 0, 15);
521 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
522 __ctl_load(cregs, 0, 15);
523 }
524
525 /*
526 * Set a bit in a control register of all cpus
527 */
smp_ctl_set_bit(int cr,int bit)528 void smp_ctl_set_bit(int cr, int bit)
529 {
530 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
531
532 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
533 }
534 EXPORT_SYMBOL(smp_ctl_set_bit);
535
536 /*
537 * Clear a bit in a control register of all cpus
538 */
smp_ctl_clear_bit(int cr,int bit)539 void smp_ctl_clear_bit(int cr, int bit)
540 {
541 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
542
543 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
544 }
545 EXPORT_SYMBOL(smp_ctl_clear_bit);
546
547 #ifdef CONFIG_CRASH_DUMP
548
__smp_store_cpu_state(struct save_area_ext * sa_ext,u16 address,int is_boot_cpu)549 static void __init __smp_store_cpu_state(struct save_area_ext *sa_ext,
550 u16 address, int is_boot_cpu)
551 {
552 void *lc = (void *)(unsigned long) store_prefix();
553 unsigned long vx_sa;
554
555 if (is_boot_cpu) {
556 /* Copy the registers of the boot CPU. */
557 copy_oldmem_page(1, (void *) &sa_ext->sa, sizeof(sa_ext->sa),
558 SAVE_AREA_BASE - PAGE_SIZE, 0);
559 if (MACHINE_HAS_VX)
560 save_vx_regs_safe(sa_ext->vx_regs);
561 return;
562 }
563 /* Get the registers of a non-boot cpu. */
564 __pcpu_sigp_relax(address, SIGP_STOP_AND_STORE_STATUS, 0, NULL);
565 memcpy_real(&sa_ext->sa, lc + SAVE_AREA_BASE, sizeof(sa_ext->sa));
566 if (!MACHINE_HAS_VX)
567 return;
568 /* Get the VX registers */
569 vx_sa = memblock_alloc(PAGE_SIZE, PAGE_SIZE);
570 if (!vx_sa)
571 panic("could not allocate memory for VX save area\n");
572 __pcpu_sigp_relax(address, SIGP_STORE_ADDITIONAL_STATUS, vx_sa, NULL);
573 memcpy(sa_ext->vx_regs, (void *) vx_sa, sizeof(sa_ext->vx_regs));
574 memblock_free(vx_sa, PAGE_SIZE);
575 }
576
smp_store_status(int cpu)577 int smp_store_status(int cpu)
578 {
579 unsigned long vx_sa;
580 struct pcpu *pcpu;
581
582 pcpu = pcpu_devices + cpu;
583 if (__pcpu_sigp_relax(pcpu->address, SIGP_STOP_AND_STORE_STATUS,
584 0, NULL) != SIGP_CC_ORDER_CODE_ACCEPTED)
585 return -EIO;
586 if (!MACHINE_HAS_VX)
587 return 0;
588 vx_sa = __pa(pcpu->lowcore->vector_save_area_addr);
589 __pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
590 vx_sa, NULL);
591 return 0;
592 }
593
594 #endif /* CONFIG_CRASH_DUMP */
595
596 /*
597 * Collect CPU state of the previous, crashed system.
598 * There are four cases:
599 * 1) standard zfcp dump
600 * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
601 * The state for all CPUs except the boot CPU needs to be collected
602 * with sigp stop-and-store-status. The boot CPU state is located in
603 * the absolute lowcore of the memory stored in the HSA. The zcore code
604 * will allocate the save area and copy the boot CPU state from the HSA.
605 * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory)
606 * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
607 * The state for all CPUs except the boot CPU needs to be collected
608 * with sigp stop-and-store-status. The firmware or the boot-loader
609 * stored the registers of the boot CPU in the absolute lowcore in the
610 * memory of the old system.
611 * 3) kdump and the old kernel did not store the CPU state,
612 * or stand-alone kdump for DASD
613 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
614 * The state for all CPUs except the boot CPU needs to be collected
615 * with sigp stop-and-store-status. The kexec code or the boot-loader
616 * stored the registers of the boot CPU in the memory of the old system.
617 * 4) kdump and the old kernel stored the CPU state
618 * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
619 * The state of all CPUs is stored in ELF sections in the memory of the
620 * old system. The ELF sections are picked up by the crash_dump code
621 * via elfcorehdr_addr.
622 */
smp_save_dump_cpus(void)623 void __init smp_save_dump_cpus(void)
624 {
625 #ifdef CONFIG_CRASH_DUMP
626 int addr, cpu, boot_cpu_addr, max_cpu_addr;
627 struct save_area_ext *sa_ext;
628 bool is_boot_cpu;
629
630 if (is_kdump_kernel())
631 /* Previous system stored the CPU states. Nothing to do. */
632 return;
633 if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP))
634 /* No previous system present, normal boot. */
635 return;
636 /* Set multi-threading state to the previous system. */
637 pcpu_set_smt(sclp.mtid_prev);
638 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
639 for (cpu = 0, addr = 0; addr <= max_cpu_addr; addr++) {
640 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0, NULL) ==
641 SIGP_CC_NOT_OPERATIONAL)
642 continue;
643 cpu += 1;
644 }
645 dump_save_areas.areas = (void *)memblock_alloc(sizeof(void *) * cpu, 8);
646 dump_save_areas.count = cpu;
647 boot_cpu_addr = stap();
648 for (cpu = 0, addr = 0; addr <= max_cpu_addr; addr++) {
649 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0, NULL) ==
650 SIGP_CC_NOT_OPERATIONAL)
651 continue;
652 sa_ext = (void *) memblock_alloc(sizeof(*sa_ext), 8);
653 dump_save_areas.areas[cpu] = sa_ext;
654 if (!sa_ext)
655 panic("could not allocate memory for save area\n");
656 is_boot_cpu = (addr == boot_cpu_addr);
657 cpu += 1;
658 if (is_boot_cpu && !OLDMEM_BASE)
659 /* Skip boot CPU for standard zfcp dump. */
660 continue;
661 /* Get state for this CPU. */
662 __smp_store_cpu_state(sa_ext, addr, is_boot_cpu);
663 }
664 diag308_reset();
665 pcpu_set_smt(0);
666 #endif /* CONFIG_CRASH_DUMP */
667 }
668
smp_cpu_set_polarization(int cpu,int val)669 void smp_cpu_set_polarization(int cpu, int val)
670 {
671 pcpu_devices[cpu].polarization = val;
672 }
673
smp_cpu_get_polarization(int cpu)674 int smp_cpu_get_polarization(int cpu)
675 {
676 return pcpu_devices[cpu].polarization;
677 }
678
smp_get_core_info(void)679 static struct sclp_core_info *smp_get_core_info(void)
680 {
681 static int use_sigp_detection;
682 struct sclp_core_info *info;
683 int address;
684
685 info = kzalloc(sizeof(*info), GFP_KERNEL);
686 if (info && (use_sigp_detection || sclp_get_core_info(info))) {
687 use_sigp_detection = 1;
688 for (address = 0;
689 address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
690 address += (1U << smp_cpu_mt_shift)) {
691 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0, NULL) ==
692 SIGP_CC_NOT_OPERATIONAL)
693 continue;
694 info->core[info->configured].core_id =
695 address >> smp_cpu_mt_shift;
696 info->configured++;
697 }
698 info->combined = info->configured;
699 }
700 return info;
701 }
702
703 static int smp_add_present_cpu(int cpu);
704
smp_add_core(struct sclp_core_entry * core,cpumask_t * avail,bool configured,bool early)705 static int smp_add_core(struct sclp_core_entry *core, cpumask_t *avail,
706 bool configured, bool early)
707 {
708 struct pcpu *pcpu;
709 int cpu, nr, i;
710 u16 address;
711
712 nr = 0;
713 if (sclp.has_core_type && core->type != boot_core_type)
714 return nr;
715 cpu = cpumask_first(avail);
716 address = core->core_id << smp_cpu_mt_shift;
717 for (i = 0; (i <= smp_cpu_mtid) && (cpu < nr_cpu_ids); i++) {
718 if (pcpu_find_address(cpu_present_mask, address + i))
719 continue;
720 pcpu = pcpu_devices + cpu;
721 pcpu->address = address + i;
722 if (configured)
723 pcpu->state = CPU_STATE_CONFIGURED;
724 else
725 pcpu->state = CPU_STATE_STANDBY;
726 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
727 set_cpu_present(cpu, true);
728 if (!early && smp_add_present_cpu(cpu) != 0)
729 set_cpu_present(cpu, false);
730 else
731 nr++;
732 cpumask_clear_cpu(cpu, avail);
733 cpu = cpumask_next(cpu, avail);
734 }
735 return nr;
736 }
737
__smp_rescan_cpus(struct sclp_core_info * info,bool early)738 static int __smp_rescan_cpus(struct sclp_core_info *info, bool early)
739 {
740 struct sclp_core_entry *core;
741 static cpumask_t avail;
742 bool configured;
743 u16 core_id;
744 int nr, i;
745
746 nr = 0;
747 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
748 /*
749 * Add IPL core first (which got logical CPU number 0) to make sure
750 * that all SMT threads get subsequent logical CPU numbers.
751 */
752 if (early) {
753 core_id = pcpu_devices[0].address >> smp_cpu_mt_shift;
754 for (i = 0; i < info->configured; i++) {
755 core = &info->core[i];
756 if (core->core_id == core_id) {
757 nr += smp_add_core(core, &avail, true, early);
758 break;
759 }
760 }
761 }
762 for (i = 0; i < info->combined; i++) {
763 configured = i < info->configured;
764 nr += smp_add_core(&info->core[i], &avail, configured, early);
765 }
766 return nr;
767 }
768
smp_detect_cpus(void)769 static void __init smp_detect_cpus(void)
770 {
771 unsigned int cpu, mtid, c_cpus, s_cpus;
772 struct sclp_core_info *info;
773 u16 address;
774
775 /* Get CPU information */
776 info = smp_get_core_info();
777 if (!info)
778 panic("smp_detect_cpus failed to allocate memory\n");
779
780 /* Find boot CPU type */
781 if (sclp.has_core_type) {
782 address = stap();
783 for (cpu = 0; cpu < info->combined; cpu++)
784 if (info->core[cpu].core_id == address) {
785 /* The boot cpu dictates the cpu type. */
786 boot_core_type = info->core[cpu].type;
787 break;
788 }
789 if (cpu >= info->combined)
790 panic("Could not find boot CPU type");
791 }
792
793 /* Set multi-threading state for the current system */
794 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
795 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
796 pcpu_set_smt(mtid);
797
798 /* Print number of CPUs */
799 c_cpus = s_cpus = 0;
800 for (cpu = 0; cpu < info->combined; cpu++) {
801 if (sclp.has_core_type &&
802 info->core[cpu].type != boot_core_type)
803 continue;
804 if (cpu < info->configured)
805 c_cpus += smp_cpu_mtid + 1;
806 else
807 s_cpus += smp_cpu_mtid + 1;
808 }
809 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
810
811 /* Add CPUs present at boot */
812 get_online_cpus();
813 __smp_rescan_cpus(info, true);
814 put_online_cpus();
815 kfree(info);
816 }
817
818 /*
819 * Activate a secondary processor.
820 */
smp_start_secondary(void * cpuvoid)821 static void smp_start_secondary(void *cpuvoid)
822 {
823 S390_lowcore.last_update_clock = get_tod_clock();
824 S390_lowcore.restart_stack = (unsigned long) restart_stack;
825 S390_lowcore.restart_fn = (unsigned long) do_restart;
826 S390_lowcore.restart_data = 0;
827 S390_lowcore.restart_source = -1UL;
828 restore_access_regs(S390_lowcore.access_regs_save_area);
829 __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
830 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
831 cpu_init();
832 preempt_disable();
833 init_cpu_timer();
834 vtime_init();
835 pfault_init();
836 notify_cpu_starting(smp_processor_id());
837 set_cpu_online(smp_processor_id(), true);
838 inc_irq_stat(CPU_RST);
839 local_irq_enable();
840 cpu_startup_entry(CPUHP_ONLINE);
841 }
842
843 /* Upping and downing of CPUs */
__cpu_up(unsigned int cpu,struct task_struct * tidle)844 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
845 {
846 struct pcpu *pcpu;
847 int base, i, rc;
848
849 pcpu = pcpu_devices + cpu;
850 if (pcpu->state != CPU_STATE_CONFIGURED)
851 return -EIO;
852 base = cpu - (cpu % (smp_cpu_mtid + 1));
853 for (i = 0; i <= smp_cpu_mtid; i++) {
854 if (base + i < nr_cpu_ids)
855 if (cpu_online(base + i))
856 break;
857 }
858 /*
859 * If this is the first CPU of the core to get online
860 * do an initial CPU reset.
861 */
862 if (i > smp_cpu_mtid &&
863 pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) !=
864 SIGP_CC_ORDER_CODE_ACCEPTED)
865 return -EIO;
866
867 rc = pcpu_alloc_lowcore(pcpu, cpu);
868 if (rc)
869 return rc;
870 pcpu_prepare_secondary(pcpu, cpu);
871 pcpu_attach_task(pcpu, tidle);
872 pcpu_start_fn(pcpu, smp_start_secondary, NULL);
873 /* Wait until cpu puts itself in the online & active maps */
874 while (!cpu_online(cpu) || !cpu_active(cpu))
875 cpu_relax();
876 return 0;
877 }
878
879 static unsigned int setup_possible_cpus __initdata;
880
_setup_possible_cpus(char * s)881 static int __init _setup_possible_cpus(char *s)
882 {
883 get_option(&s, &setup_possible_cpus);
884 return 0;
885 }
886 early_param("possible_cpus", _setup_possible_cpus);
887
888 #ifdef CONFIG_HOTPLUG_CPU
889
__cpu_disable(void)890 int __cpu_disable(void)
891 {
892 unsigned long cregs[16];
893
894 /* Handle possible pending IPIs */
895 smp_handle_ext_call();
896 set_cpu_online(smp_processor_id(), false);
897 /* Disable pseudo page faults on this cpu. */
898 pfault_fini();
899 /* Disable interrupt sources via control register. */
900 __ctl_store(cregs, 0, 15);
901 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
902 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
903 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
904 __ctl_load(cregs, 0, 15);
905 clear_cpu_flag(CIF_NOHZ_DELAY);
906 return 0;
907 }
908
__cpu_die(unsigned int cpu)909 void __cpu_die(unsigned int cpu)
910 {
911 struct pcpu *pcpu;
912
913 /* Wait until target cpu is down */
914 pcpu = pcpu_devices + cpu;
915 while (!pcpu_stopped(pcpu))
916 cpu_relax();
917 pcpu_free_lowcore(pcpu);
918 atomic_dec(&init_mm.context.attach_count);
919 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
920 if (MACHINE_HAS_TLB_LC)
921 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
922 }
923
cpu_die(void)924 void __noreturn cpu_die(void)
925 {
926 idle_task_exit();
927 __bpon();
928 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
929 for (;;) ;
930 }
931
932 #endif /* CONFIG_HOTPLUG_CPU */
933
smp_fill_possible_mask(void)934 void __init smp_fill_possible_mask(void)
935 {
936 unsigned int possible, sclp_max, cpu;
937
938 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
939 sclp_max = min(smp_max_threads, sclp_max);
940 sclp_max = sclp.max_cores * sclp_max ?: nr_cpu_ids;
941 possible = setup_possible_cpus ?: nr_cpu_ids;
942 possible = min(possible, sclp_max);
943 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
944 set_cpu_possible(cpu, true);
945 }
946
smp_prepare_cpus(unsigned int max_cpus)947 void __init smp_prepare_cpus(unsigned int max_cpus)
948 {
949 /* request the 0x1201 emergency signal external interrupt */
950 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
951 panic("Couldn't request external interrupt 0x1201");
952 /* request the 0x1202 external call external interrupt */
953 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
954 panic("Couldn't request external interrupt 0x1202");
955 smp_detect_cpus();
956 }
957
smp_prepare_boot_cpu(void)958 void __init smp_prepare_boot_cpu(void)
959 {
960 struct pcpu *pcpu = pcpu_devices;
961
962 pcpu->state = CPU_STATE_CONFIGURED;
963 pcpu->address = stap();
964 pcpu->lowcore = (struct _lowcore *)(unsigned long) store_prefix();
965 S390_lowcore.percpu_offset = __per_cpu_offset[0];
966 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
967 set_cpu_present(0, true);
968 set_cpu_online(0, true);
969 }
970
smp_cpus_done(unsigned int max_cpus)971 void __init smp_cpus_done(unsigned int max_cpus)
972 {
973 }
974
smp_setup_processor_id(void)975 void __init smp_setup_processor_id(void)
976 {
977 S390_lowcore.cpu_nr = 0;
978 S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
979 }
980
981 /*
982 * the frequency of the profiling timer can be changed
983 * by writing a multiplier value into /proc/profile.
984 *
985 * usually you want to run this on all CPUs ;)
986 */
setup_profiling_timer(unsigned int multiplier)987 int setup_profiling_timer(unsigned int multiplier)
988 {
989 return 0;
990 }
991
992 #ifdef CONFIG_HOTPLUG_CPU
cpu_configure_show(struct device * dev,struct device_attribute * attr,char * buf)993 static ssize_t cpu_configure_show(struct device *dev,
994 struct device_attribute *attr, char *buf)
995 {
996 ssize_t count;
997
998 mutex_lock(&smp_cpu_state_mutex);
999 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
1000 mutex_unlock(&smp_cpu_state_mutex);
1001 return count;
1002 }
1003
cpu_configure_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1004 static ssize_t cpu_configure_store(struct device *dev,
1005 struct device_attribute *attr,
1006 const char *buf, size_t count)
1007 {
1008 struct pcpu *pcpu;
1009 int cpu, val, rc, i;
1010 char delim;
1011
1012 if (sscanf(buf, "%d %c", &val, &delim) != 1)
1013 return -EINVAL;
1014 if (val != 0 && val != 1)
1015 return -EINVAL;
1016 get_online_cpus();
1017 mutex_lock(&smp_cpu_state_mutex);
1018 rc = -EBUSY;
1019 /* disallow configuration changes of online cpus and cpu 0 */
1020 cpu = dev->id;
1021 cpu -= cpu % (smp_cpu_mtid + 1);
1022 if (cpu == 0)
1023 goto out;
1024 for (i = 0; i <= smp_cpu_mtid; i++)
1025 if (cpu_online(cpu + i))
1026 goto out;
1027 pcpu = pcpu_devices + cpu;
1028 rc = 0;
1029 switch (val) {
1030 case 0:
1031 if (pcpu->state != CPU_STATE_CONFIGURED)
1032 break;
1033 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
1034 if (rc)
1035 break;
1036 for (i = 0; i <= smp_cpu_mtid; i++) {
1037 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1038 continue;
1039 pcpu[i].state = CPU_STATE_STANDBY;
1040 smp_cpu_set_polarization(cpu + i,
1041 POLARIZATION_UNKNOWN);
1042 }
1043 topology_expect_change();
1044 break;
1045 case 1:
1046 if (pcpu->state != CPU_STATE_STANDBY)
1047 break;
1048 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
1049 if (rc)
1050 break;
1051 for (i = 0; i <= smp_cpu_mtid; i++) {
1052 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1053 continue;
1054 pcpu[i].state = CPU_STATE_CONFIGURED;
1055 smp_cpu_set_polarization(cpu + i,
1056 POLARIZATION_UNKNOWN);
1057 }
1058 topology_expect_change();
1059 break;
1060 default:
1061 break;
1062 }
1063 out:
1064 mutex_unlock(&smp_cpu_state_mutex);
1065 put_online_cpus();
1066 return rc ? rc : count;
1067 }
1068 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
1069 #endif /* CONFIG_HOTPLUG_CPU */
1070
show_cpu_address(struct device * dev,struct device_attribute * attr,char * buf)1071 static ssize_t show_cpu_address(struct device *dev,
1072 struct device_attribute *attr, char *buf)
1073 {
1074 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
1075 }
1076 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
1077
1078 static struct attribute *cpu_common_attrs[] = {
1079 #ifdef CONFIG_HOTPLUG_CPU
1080 &dev_attr_configure.attr,
1081 #endif
1082 &dev_attr_address.attr,
1083 NULL,
1084 };
1085
1086 static struct attribute_group cpu_common_attr_group = {
1087 .attrs = cpu_common_attrs,
1088 };
1089
1090 static struct attribute *cpu_online_attrs[] = {
1091 &dev_attr_idle_count.attr,
1092 &dev_attr_idle_time_us.attr,
1093 NULL,
1094 };
1095
1096 static struct attribute_group cpu_online_attr_group = {
1097 .attrs = cpu_online_attrs,
1098 };
1099
smp_cpu_notify(struct notifier_block * self,unsigned long action,void * hcpu)1100 static int smp_cpu_notify(struct notifier_block *self, unsigned long action,
1101 void *hcpu)
1102 {
1103 unsigned int cpu = (unsigned int)(long)hcpu;
1104 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1105 int err = 0;
1106
1107 switch (action & ~CPU_TASKS_FROZEN) {
1108 case CPU_ONLINE:
1109 err = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1110 break;
1111 case CPU_DEAD:
1112 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
1113 break;
1114 }
1115 return notifier_from_errno(err);
1116 }
1117
smp_add_present_cpu(int cpu)1118 static int smp_add_present_cpu(int cpu)
1119 {
1120 struct device *s;
1121 struct cpu *c;
1122 int rc;
1123
1124 c = kzalloc(sizeof(*c), GFP_KERNEL);
1125 if (!c)
1126 return -ENOMEM;
1127 per_cpu(cpu_device, cpu) = c;
1128 s = &c->dev;
1129 c->hotpluggable = 1;
1130 rc = register_cpu(c, cpu);
1131 if (rc)
1132 goto out;
1133 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
1134 if (rc)
1135 goto out_cpu;
1136 if (cpu_online(cpu)) {
1137 rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1138 if (rc)
1139 goto out_online;
1140 }
1141 rc = topology_cpu_init(c);
1142 if (rc)
1143 goto out_topology;
1144 return 0;
1145
1146 out_topology:
1147 if (cpu_online(cpu))
1148 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
1149 out_online:
1150 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1151 out_cpu:
1152 #ifdef CONFIG_HOTPLUG_CPU
1153 unregister_cpu(c);
1154 #endif
1155 out:
1156 return rc;
1157 }
1158
1159 #ifdef CONFIG_HOTPLUG_CPU
1160
smp_rescan_cpus(void)1161 int __ref smp_rescan_cpus(void)
1162 {
1163 struct sclp_core_info *info;
1164 int nr;
1165
1166 info = smp_get_core_info();
1167 if (!info)
1168 return -ENOMEM;
1169 get_online_cpus();
1170 mutex_lock(&smp_cpu_state_mutex);
1171 nr = __smp_rescan_cpus(info, false);
1172 mutex_unlock(&smp_cpu_state_mutex);
1173 put_online_cpus();
1174 kfree(info);
1175 if (nr)
1176 topology_schedule_update();
1177 return 0;
1178 }
1179
rescan_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1180 static ssize_t __ref rescan_store(struct device *dev,
1181 struct device_attribute *attr,
1182 const char *buf,
1183 size_t count)
1184 {
1185 int rc;
1186
1187 rc = lock_device_hotplug_sysfs();
1188 if (rc)
1189 return rc;
1190 rc = smp_rescan_cpus();
1191 unlock_device_hotplug();
1192 return rc ? rc : count;
1193 }
1194 static DEVICE_ATTR(rescan, 0200, NULL, rescan_store);
1195 #endif /* CONFIG_HOTPLUG_CPU */
1196
s390_smp_init(void)1197 static int __init s390_smp_init(void)
1198 {
1199 int cpu, rc = 0;
1200
1201 #ifdef CONFIG_HOTPLUG_CPU
1202 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
1203 if (rc)
1204 return rc;
1205 #endif
1206 cpu_notifier_register_begin();
1207 for_each_present_cpu(cpu) {
1208 rc = smp_add_present_cpu(cpu);
1209 if (rc)
1210 goto out;
1211 }
1212
1213 __hotcpu_notifier(smp_cpu_notify, 0);
1214
1215 out:
1216 cpu_notifier_register_done();
1217 return rc;
1218 }
1219 subsys_initcall(s390_smp_init);
1220