1 #ifndef __KVM_X86_LAPIC_H
2 #define __KVM_X86_LAPIC_H
3
4 #include <kvm/iodev.h>
5
6 #include <linux/kvm_host.h>
7
8 #define KVM_APIC_INIT 0
9 #define KVM_APIC_SIPI 1
10
11 struct kvm_timer {
12 struct hrtimer timer;
13 s64 period; /* unit: ns */
14 u32 timer_mode;
15 u32 timer_mode_mask;
16 u64 tscdeadline;
17 u64 expired_tscdeadline;
18 atomic_t pending; /* accumulated triggered timers */
19 };
20
21 struct kvm_lapic {
22 unsigned long base_address;
23 struct kvm_io_device dev;
24 struct kvm_timer lapic_timer;
25 u32 divide_count;
26 struct kvm_vcpu *vcpu;
27 bool sw_enabled;
28 bool irr_pending;
29 bool lvt0_in_nmi_mode;
30 /* Number of bits set in ISR. */
31 s16 isr_count;
32 /* The highest vector set in ISR; if -1 - invalid, must scan ISR. */
33 int highest_isr_cache;
34 /**
35 * APIC register page. The layout matches the register layout seen by
36 * the guest 1:1, because it is accessed by the vmx microcode.
37 * Note: Only one register, the TPR, is used by the microcode.
38 */
39 void *regs;
40 gpa_t vapic_addr;
41 struct gfn_to_hva_cache vapic_cache;
42 unsigned long pending_events;
43 unsigned int sipi_vector;
44 };
45 int kvm_create_lapic(struct kvm_vcpu *vcpu);
46 void kvm_free_lapic(struct kvm_vcpu *vcpu);
47
48 int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu);
49 int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu);
50 int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu);
51 void kvm_apic_accept_events(struct kvm_vcpu *vcpu);
52 void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event);
53 u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu);
54 void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8);
55 void kvm_lapic_set_eoi(struct kvm_vcpu *vcpu);
56 void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value);
57 u64 kvm_lapic_get_base(struct kvm_vcpu *vcpu);
58 void kvm_apic_set_version(struct kvm_vcpu *vcpu);
59
60 void __kvm_apic_update_irr(u32 *pir, void *regs);
61 void kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir);
62 int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq,
63 unsigned long *dest_map);
64 int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type);
65
66 bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
67 struct kvm_lapic_irq *irq, int *r, unsigned long *dest_map);
68
69 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
70 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
71 void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu,
72 struct kvm_lapic_state *s);
73 int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
74
75 u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu);
76 void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data);
77
78 void kvm_apic_write_nodecode(struct kvm_vcpu *vcpu, u32 offset);
79 void kvm_apic_set_eoi_accelerated(struct kvm_vcpu *vcpu, int vector);
80
81 int kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr);
82 void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu);
83 void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu);
84
85 int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
86 int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
87
88 int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
89 int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
90
kvm_hv_vapic_assist_page_enabled(struct kvm_vcpu * vcpu)91 static inline bool kvm_hv_vapic_assist_page_enabled(struct kvm_vcpu *vcpu)
92 {
93 return vcpu->arch.hyperv.hv_vapic & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE;
94 }
95
96 int kvm_lapic_enable_pv_eoi(struct kvm_vcpu *vcpu, u64 data);
97 void kvm_lapic_init(void);
98 void kvm_lapic_exit(void);
99
kvm_apic_get_reg(struct kvm_lapic * apic,int reg_off)100 static inline u32 kvm_apic_get_reg(struct kvm_lapic *apic, int reg_off)
101 {
102 return *((u32 *) (apic->regs + reg_off));
103 }
104
105 extern struct static_key kvm_no_apic_vcpu;
106
kvm_vcpu_has_lapic(struct kvm_vcpu * vcpu)107 static inline bool kvm_vcpu_has_lapic(struct kvm_vcpu *vcpu)
108 {
109 if (static_key_false(&kvm_no_apic_vcpu))
110 return vcpu->arch.apic;
111 return true;
112 }
113
114 extern struct static_key_deferred apic_hw_disabled;
115
kvm_apic_hw_enabled(struct kvm_lapic * apic)116 static inline int kvm_apic_hw_enabled(struct kvm_lapic *apic)
117 {
118 if (static_key_false(&apic_hw_disabled.key))
119 return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE;
120 return MSR_IA32_APICBASE_ENABLE;
121 }
122
123 extern struct static_key_deferred apic_sw_disabled;
124
kvm_apic_sw_enabled(struct kvm_lapic * apic)125 static inline bool kvm_apic_sw_enabled(struct kvm_lapic *apic)
126 {
127 if (static_key_false(&apic_sw_disabled.key))
128 return apic->sw_enabled;
129 return true;
130 }
131
kvm_apic_present(struct kvm_vcpu * vcpu)132 static inline bool kvm_apic_present(struct kvm_vcpu *vcpu)
133 {
134 return kvm_vcpu_has_lapic(vcpu) && kvm_apic_hw_enabled(vcpu->arch.apic);
135 }
136
kvm_lapic_enabled(struct kvm_vcpu * vcpu)137 static inline int kvm_lapic_enabled(struct kvm_vcpu *vcpu)
138 {
139 return kvm_apic_present(vcpu) && kvm_apic_sw_enabled(vcpu->arch.apic);
140 }
141
apic_x2apic_mode(struct kvm_lapic * apic)142 static inline int apic_x2apic_mode(struct kvm_lapic *apic)
143 {
144 return apic->vcpu->arch.apic_base & X2APIC_ENABLE;
145 }
146
kvm_vcpu_apic_vid_enabled(struct kvm_vcpu * vcpu)147 static inline bool kvm_vcpu_apic_vid_enabled(struct kvm_vcpu *vcpu)
148 {
149 return kvm_x86_ops->cpu_uses_apicv(vcpu);
150 }
151
kvm_apic_has_events(struct kvm_vcpu * vcpu)152 static inline bool kvm_apic_has_events(struct kvm_vcpu *vcpu)
153 {
154 return kvm_vcpu_has_lapic(vcpu) && vcpu->arch.apic->pending_events;
155 }
156
kvm_lowest_prio_delivery(struct kvm_lapic_irq * irq)157 static inline bool kvm_lowest_prio_delivery(struct kvm_lapic_irq *irq)
158 {
159 return (irq->delivery_mode == APIC_DM_LOWEST ||
160 irq->msi_redir_hint);
161 }
162
kvm_lapic_latched_init(struct kvm_vcpu * vcpu)163 static inline int kvm_lapic_latched_init(struct kvm_vcpu *vcpu)
164 {
165 return kvm_vcpu_has_lapic(vcpu) && test_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
166 }
167
168 bool kvm_apic_pending_eoi(struct kvm_vcpu *vcpu, int vector);
169
170 void wait_lapic_expire(struct kvm_vcpu *vcpu);
171
172 bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm, struct kvm_lapic_irq *irq,
173 struct kvm_vcpu **dest_vcpu);
174 #endif
175