1 /*
2 * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
3 * initial domain support. We also handle the DSDT _PRT callbacks for GSI's
4 * used in HVM and initial domain mode (PV does not parse ACPI, so it has no
5 * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
6 * 0xcf8 PCI configuration read/write.
7 *
8 * Author: Ryan Wilson <hap9@epoch.ncsc.mil>
9 * Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
10 * Stefano Stabellini <stefano.stabellini@eu.citrix.com>
11 */
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/pci.h>
15 #include <linux/acpi.h>
16
17 #include <linux/io.h>
18 #include <asm/io_apic.h>
19 #include <asm/pci_x86.h>
20
21 #include <asm/xen/hypervisor.h>
22
23 #include <xen/features.h>
24 #include <xen/events.h>
25 #include <asm/xen/pci.h>
26 #include <asm/xen/cpuid.h>
27 #include <asm/apic.h>
28 #include <asm/i8259.h>
29
xen_pcifront_enable_irq(struct pci_dev * dev)30 static int xen_pcifront_enable_irq(struct pci_dev *dev)
31 {
32 int rc;
33 int share = 1;
34 int pirq;
35 u8 gsi;
36
37 rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
38 if (rc < 0) {
39 dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
40 rc);
41 return rc;
42 }
43 /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
44 pirq = gsi;
45
46 if (gsi < nr_legacy_irqs())
47 share = 0;
48
49 rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
50 if (rc < 0) {
51 dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
52 gsi, pirq, rc);
53 return rc;
54 }
55
56 dev->irq = rc;
57 dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
58 return 0;
59 }
60
61 #ifdef CONFIG_ACPI
xen_register_pirq(u32 gsi,int gsi_override,int triggering,bool set_pirq)62 static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,
63 bool set_pirq)
64 {
65 int rc, pirq = -1, irq = -1;
66 struct physdev_map_pirq map_irq;
67 int shareable = 0;
68 char *name;
69
70 irq = xen_irq_from_gsi(gsi);
71 if (irq > 0)
72 return irq;
73
74 if (set_pirq)
75 pirq = gsi;
76
77 map_irq.domid = DOMID_SELF;
78 map_irq.type = MAP_PIRQ_TYPE_GSI;
79 map_irq.index = gsi;
80 map_irq.pirq = pirq;
81
82 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
83 if (rc) {
84 printk(KERN_WARNING "xen map irq failed %d\n", rc);
85 return -1;
86 }
87
88 if (triggering == ACPI_EDGE_SENSITIVE) {
89 shareable = 0;
90 name = "ioapic-edge";
91 } else {
92 shareable = 1;
93 name = "ioapic-level";
94 }
95
96 if (gsi_override >= 0)
97 gsi = gsi_override;
98
99 irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
100 if (irq < 0)
101 goto out;
102
103 printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
104 out:
105 return irq;
106 }
107
acpi_register_gsi_xen_hvm(struct device * dev,u32 gsi,int trigger,int polarity)108 static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
109 int trigger, int polarity)
110 {
111 if (!xen_hvm_domain())
112 return -1;
113
114 return xen_register_pirq(gsi, -1 /* no GSI override */, trigger,
115 false /* no mapping of GSI to PIRQ */);
116 }
117
118 #ifdef CONFIG_XEN_DOM0
xen_register_gsi(u32 gsi,int gsi_override,int triggering,int polarity)119 static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
120 {
121 int rc, irq;
122 struct physdev_setup_gsi setup_gsi;
123
124 if (!xen_pv_domain())
125 return -1;
126
127 printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
128 gsi, triggering, polarity);
129
130 irq = xen_register_pirq(gsi, gsi_override, triggering, true);
131
132 setup_gsi.gsi = gsi;
133 setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
134 setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
135
136 rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
137 if (rc == -EEXIST)
138 printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
139 else if (rc) {
140 printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
141 gsi, rc);
142 }
143
144 return irq;
145 }
146
acpi_register_gsi_xen(struct device * dev,u32 gsi,int trigger,int polarity)147 static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
148 int trigger, int polarity)
149 {
150 return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
151 }
152 #endif
153 #endif
154
155 #if defined(CONFIG_PCI_MSI)
156 #include <linux/msi.h>
157 #include <asm/msidef.h>
158
159 struct xen_pci_frontend_ops *xen_pci_frontend;
160 EXPORT_SYMBOL_GPL(xen_pci_frontend);
161
xen_setup_msi_irqs(struct pci_dev * dev,int nvec,int type)162 static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
163 {
164 int irq, ret, i;
165 struct msi_desc *msidesc;
166 int *v;
167
168 if (type == PCI_CAP_ID_MSI && nvec > 1)
169 return 1;
170
171 v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL);
172 if (!v)
173 return -ENOMEM;
174
175 if (type == PCI_CAP_ID_MSIX)
176 ret = xen_pci_frontend_enable_msix(dev, v, nvec);
177 else
178 ret = xen_pci_frontend_enable_msi(dev, v);
179 if (ret)
180 goto error;
181 i = 0;
182 for_each_pci_msi_entry(msidesc, dev) {
183 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i],
184 (type == PCI_CAP_ID_MSI) ? nvec : 1,
185 (type == PCI_CAP_ID_MSIX) ?
186 "pcifront-msi-x" :
187 "pcifront-msi",
188 DOMID_SELF);
189 if (irq < 0) {
190 ret = irq;
191 goto free;
192 }
193 i++;
194 }
195 kfree(v);
196 return 0;
197
198 error:
199 dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
200 free:
201 kfree(v);
202 return ret;
203 }
204
205 #define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE | \
206 MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0))
207
xen_msi_compose_msg(struct pci_dev * pdev,unsigned int pirq,struct msi_msg * msg)208 static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
209 struct msi_msg *msg)
210 {
211 /* We set vector == 0 to tell the hypervisor we don't care about it,
212 * but we want a pirq setup instead.
213 * We use the dest_id field to pass the pirq that we want. */
214 msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq);
215 msg->address_lo =
216 MSI_ADDR_BASE_LO |
217 MSI_ADDR_DEST_MODE_PHYSICAL |
218 MSI_ADDR_REDIRECTION_CPU |
219 MSI_ADDR_DEST_ID(pirq);
220
221 msg->data = XEN_PIRQ_MSI_DATA;
222 }
223
xen_hvm_setup_msi_irqs(struct pci_dev * dev,int nvec,int type)224 static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
225 {
226 int irq, pirq;
227 struct msi_desc *msidesc;
228 struct msi_msg msg;
229
230 if (type == PCI_CAP_ID_MSI && nvec > 1)
231 return 1;
232
233 for_each_pci_msi_entry(msidesc, dev) {
234 pirq = xen_allocate_pirq_msi(dev, msidesc);
235 if (pirq < 0) {
236 irq = -ENODEV;
237 goto error;
238 }
239 xen_msi_compose_msg(dev, pirq, &msg);
240 __pci_write_msi_msg(msidesc, &msg);
241 dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
242 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq,
243 (type == PCI_CAP_ID_MSI) ? nvec : 1,
244 (type == PCI_CAP_ID_MSIX) ?
245 "msi-x" : "msi",
246 DOMID_SELF);
247 if (irq < 0)
248 goto error;
249 dev_dbg(&dev->dev,
250 "xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
251 }
252 return 0;
253
254 error:
255 dev_err(&dev->dev,
256 "Xen PCI frontend has not registered MSI/MSI-X support!\n");
257 return irq;
258 }
259
260 #ifdef CONFIG_XEN_DOM0
261 static bool __read_mostly pci_seg_supported = true;
262
xen_initdom_setup_msi_irqs(struct pci_dev * dev,int nvec,int type)263 static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
264 {
265 int ret = 0;
266 struct msi_desc *msidesc;
267
268 for_each_pci_msi_entry(msidesc, dev) {
269 struct physdev_map_pirq map_irq;
270 domid_t domid;
271
272 domid = ret = xen_find_device_domain_owner(dev);
273 /* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
274 * hence check ret value for < 0. */
275 if (ret < 0)
276 domid = DOMID_SELF;
277
278 memset(&map_irq, 0, sizeof(map_irq));
279 map_irq.domid = domid;
280 map_irq.type = MAP_PIRQ_TYPE_MSI_SEG;
281 map_irq.index = -1;
282 map_irq.pirq = -1;
283 map_irq.bus = dev->bus->number |
284 (pci_domain_nr(dev->bus) << 16);
285 map_irq.devfn = dev->devfn;
286
287 if (type == PCI_CAP_ID_MSI && nvec > 1) {
288 map_irq.type = MAP_PIRQ_TYPE_MULTI_MSI;
289 map_irq.entry_nr = nvec;
290 } else if (type == PCI_CAP_ID_MSIX) {
291 int pos;
292 unsigned long flags;
293 u32 table_offset, bir;
294
295 pos = dev->msix_cap;
296 pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
297 &table_offset);
298 bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
299 flags = pci_resource_flags(dev, bir);
300 if (!flags || (flags & IORESOURCE_UNSET))
301 return -EINVAL;
302
303 map_irq.table_base = pci_resource_start(dev, bir);
304 map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
305 }
306
307 ret = -EINVAL;
308 if (pci_seg_supported)
309 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
310 &map_irq);
311 if (type == PCI_CAP_ID_MSI && nvec > 1 && ret) {
312 /*
313 * If MAP_PIRQ_TYPE_MULTI_MSI is not available
314 * there's nothing else we can do in this case.
315 * Just set ret > 0 so driver can retry with
316 * single MSI.
317 */
318 ret = 1;
319 goto out;
320 }
321 if (ret == -EINVAL && !pci_domain_nr(dev->bus)) {
322 map_irq.type = MAP_PIRQ_TYPE_MSI;
323 map_irq.index = -1;
324 map_irq.pirq = -1;
325 map_irq.bus = dev->bus->number;
326 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
327 &map_irq);
328 if (ret != -EINVAL)
329 pci_seg_supported = false;
330 }
331 if (ret) {
332 dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
333 ret, domid);
334 goto out;
335 }
336
337 ret = xen_bind_pirq_msi_to_irq(dev, msidesc, map_irq.pirq,
338 (type == PCI_CAP_ID_MSI) ? nvec : 1,
339 (type == PCI_CAP_ID_MSIX) ? "msi-x" : "msi",
340 domid);
341 if (ret < 0)
342 goto out;
343 }
344 ret = 0;
345 out:
346 return ret;
347 }
348
xen_initdom_restore_msi_irqs(struct pci_dev * dev)349 static void xen_initdom_restore_msi_irqs(struct pci_dev *dev)
350 {
351 int ret = 0;
352
353 if (pci_seg_supported) {
354 struct physdev_pci_device restore_ext;
355
356 restore_ext.seg = pci_domain_nr(dev->bus);
357 restore_ext.bus = dev->bus->number;
358 restore_ext.devfn = dev->devfn;
359 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext,
360 &restore_ext);
361 if (ret == -ENOSYS)
362 pci_seg_supported = false;
363 WARN(ret && ret != -ENOSYS, "restore_msi_ext -> %d\n", ret);
364 }
365 if (!pci_seg_supported) {
366 struct physdev_restore_msi restore;
367
368 restore.bus = dev->bus->number;
369 restore.devfn = dev->devfn;
370 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi, &restore);
371 WARN(ret && ret != -ENOSYS, "restore_msi -> %d\n", ret);
372 }
373 }
374 #endif
375
xen_teardown_msi_irqs(struct pci_dev * dev)376 static void xen_teardown_msi_irqs(struct pci_dev *dev)
377 {
378 struct msi_desc *msidesc;
379
380 msidesc = first_pci_msi_entry(dev);
381 if (msidesc->msi_attrib.is_msix)
382 xen_pci_frontend_disable_msix(dev);
383 else
384 xen_pci_frontend_disable_msi(dev);
385
386 /* Free the IRQ's and the msidesc using the generic code. */
387 default_teardown_msi_irqs(dev);
388 }
389
xen_teardown_msi_irq(unsigned int irq)390 static void xen_teardown_msi_irq(unsigned int irq)
391 {
392 xen_destroy_irq(irq);
393 }
394
395 #endif
396
pci_xen_init(void)397 int __init pci_xen_init(void)
398 {
399 if (!xen_pv_domain() || xen_initial_domain())
400 return -ENODEV;
401
402 printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");
403
404 pcibios_set_cache_line_size();
405
406 pcibios_enable_irq = xen_pcifront_enable_irq;
407 pcibios_disable_irq = NULL;
408
409 #ifdef CONFIG_ACPI
410 /* Keep ACPI out of the picture */
411 acpi_noirq = 1;
412 #endif
413
414 #ifdef CONFIG_PCI_MSI
415 x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
416 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
417 x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
418 pci_msi_ignore_mask = 1;
419 #endif
420 return 0;
421 }
422
423 #ifdef CONFIG_PCI_MSI
xen_msi_init(void)424 void __init xen_msi_init(void)
425 {
426 if (!disable_apic) {
427 /*
428 * If hardware supports (x2)APIC virtualization (as indicated
429 * by hypervisor's leaf 4) then we don't need to use pirqs/
430 * event channels for MSI handling and instead use regular
431 * APIC processing
432 */
433 uint32_t eax = cpuid_eax(xen_cpuid_base() + 4);
434
435 if (((eax & XEN_HVM_CPUID_X2APIC_VIRT) && x2apic_mode) ||
436 ((eax & XEN_HVM_CPUID_APIC_ACCESS_VIRT) && cpu_has_apic))
437 return;
438 }
439
440 x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
441 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
442 }
443 #endif
444
pci_xen_hvm_init(void)445 int __init pci_xen_hvm_init(void)
446 {
447 if (!xen_have_vector_callback || !xen_feature(XENFEAT_hvm_pirqs))
448 return 0;
449
450 #ifdef CONFIG_ACPI
451 /*
452 * We don't want to change the actual ACPI delivery model,
453 * just how GSIs get registered.
454 */
455 __acpi_register_gsi = acpi_register_gsi_xen_hvm;
456 __acpi_unregister_gsi = NULL;
457 #endif
458
459 #ifdef CONFIG_PCI_MSI
460 /*
461 * We need to wait until after x2apic is initialized
462 * before we can set MSI IRQ ops.
463 */
464 x86_platform.apic_post_init = xen_msi_init;
465 #endif
466 return 0;
467 }
468
469 #ifdef CONFIG_XEN_DOM0
pci_xen_initial_domain(void)470 int __init pci_xen_initial_domain(void)
471 {
472 int irq;
473
474 #ifdef CONFIG_PCI_MSI
475 x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
476 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
477 x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
478 pci_msi_ignore_mask = 1;
479 #endif
480 __acpi_register_gsi = acpi_register_gsi_xen;
481 __acpi_unregister_gsi = NULL;
482 /*
483 * Pre-allocate the legacy IRQs. Use NR_LEGACY_IRQS here
484 * because we don't have a PIC and thus nr_legacy_irqs() is zero.
485 */
486 for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
487 int trigger, polarity;
488
489 if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
490 continue;
491
492 xen_register_pirq(irq, -1 /* no GSI override */,
493 trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
494 true /* Map GSI to PIRQ */);
495 }
496 if (0 == nr_ioapics) {
497 for (irq = 0; irq < nr_legacy_irqs(); irq++)
498 xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
499 }
500 return 0;
501 }
502
503 struct xen_device_domain_owner {
504 domid_t domain;
505 struct pci_dev *dev;
506 struct list_head list;
507 };
508
509 static DEFINE_SPINLOCK(dev_domain_list_spinlock);
510 static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);
511
find_device(struct pci_dev * dev)512 static struct xen_device_domain_owner *find_device(struct pci_dev *dev)
513 {
514 struct xen_device_domain_owner *owner;
515
516 list_for_each_entry(owner, &dev_domain_list, list) {
517 if (owner->dev == dev)
518 return owner;
519 }
520 return NULL;
521 }
522
xen_find_device_domain_owner(struct pci_dev * dev)523 int xen_find_device_domain_owner(struct pci_dev *dev)
524 {
525 struct xen_device_domain_owner *owner;
526 int domain = -ENODEV;
527
528 spin_lock(&dev_domain_list_spinlock);
529 owner = find_device(dev);
530 if (owner)
531 domain = owner->domain;
532 spin_unlock(&dev_domain_list_spinlock);
533 return domain;
534 }
535 EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);
536
xen_register_device_domain_owner(struct pci_dev * dev,uint16_t domain)537 int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
538 {
539 struct xen_device_domain_owner *owner;
540
541 owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
542 if (!owner)
543 return -ENODEV;
544
545 spin_lock(&dev_domain_list_spinlock);
546 if (find_device(dev)) {
547 spin_unlock(&dev_domain_list_spinlock);
548 kfree(owner);
549 return -EEXIST;
550 }
551 owner->domain = domain;
552 owner->dev = dev;
553 list_add_tail(&owner->list, &dev_domain_list);
554 spin_unlock(&dev_domain_list_spinlock);
555 return 0;
556 }
557 EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);
558
xen_unregister_device_domain_owner(struct pci_dev * dev)559 int xen_unregister_device_domain_owner(struct pci_dev *dev)
560 {
561 struct xen_device_domain_owner *owner;
562
563 spin_lock(&dev_domain_list_spinlock);
564 owner = find_device(dev);
565 if (!owner) {
566 spin_unlock(&dev_domain_list_spinlock);
567 return -ENODEV;
568 }
569 list_del(&owner->list);
570 spin_unlock(&dev_domain_list_spinlock);
571 kfree(owner);
572 return 0;
573 }
574 EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);
575 #endif
576