1 /*
2 * Copyright (c) 2006-2008 Simtec Electronics
3 * http://armlinux.simtec.co.uk/
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C24XX CPU Frequency scaling
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/interrupt.h>
16 #include <linux/ioport.h>
17 #include <linux/cpufreq.h>
18 #include <linux/cpu.h>
19 #include <linux/clk.h>
20 #include <linux/err.h>
21 #include <linux/io.h>
22 #include <linux/device.h>
23 #include <linux/sysfs.h>
24 #include <linux/slab.h>
25
26 #include <asm/mach/arch.h>
27 #include <asm/mach/map.h>
28
29 #include <plat/cpu.h>
30 #include <plat/cpu-freq-core.h>
31
32 #include <mach/regs-clock.h>
33
34 /* note, cpufreq support deals in kHz, no Hz */
35
36 static struct cpufreq_driver s3c24xx_driver;
37 static struct s3c_cpufreq_config cpu_cur;
38 static struct s3c_iotimings s3c24xx_iotiming;
39 static struct cpufreq_frequency_table *pll_reg;
40 static unsigned int last_target = ~0;
41 static unsigned int ftab_size;
42 static struct cpufreq_frequency_table *ftab;
43
44 static struct clk *_clk_mpll;
45 static struct clk *_clk_xtal;
46 static struct clk *clk_fclk;
47 static struct clk *clk_hclk;
48 static struct clk *clk_pclk;
49 static struct clk *clk_arm;
50
51 #ifdef CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS
s3c_cpufreq_getconfig(void)52 struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void)
53 {
54 return &cpu_cur;
55 }
56
s3c_cpufreq_getiotimings(void)57 struct s3c_iotimings *s3c_cpufreq_getiotimings(void)
58 {
59 return &s3c24xx_iotiming;
60 }
61 #endif /* CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS */
62
s3c_cpufreq_getcur(struct s3c_cpufreq_config * cfg)63 static void s3c_cpufreq_getcur(struct s3c_cpufreq_config *cfg)
64 {
65 unsigned long fclk, pclk, hclk, armclk;
66
67 cfg->freq.fclk = fclk = clk_get_rate(clk_fclk);
68 cfg->freq.hclk = hclk = clk_get_rate(clk_hclk);
69 cfg->freq.pclk = pclk = clk_get_rate(clk_pclk);
70 cfg->freq.armclk = armclk = clk_get_rate(clk_arm);
71
72 cfg->pll.driver_data = __raw_readl(S3C2410_MPLLCON);
73 cfg->pll.frequency = fclk;
74
75 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10);
76
77 cfg->divs.h_divisor = fclk / hclk;
78 cfg->divs.p_divisor = fclk / pclk;
79 }
80
s3c_cpufreq_calc(struct s3c_cpufreq_config * cfg)81 static inline void s3c_cpufreq_calc(struct s3c_cpufreq_config *cfg)
82 {
83 unsigned long pll = cfg->pll.frequency;
84
85 cfg->freq.fclk = pll;
86 cfg->freq.hclk = pll / cfg->divs.h_divisor;
87 cfg->freq.pclk = pll / cfg->divs.p_divisor;
88
89 /* convert hclk into 10ths of nanoseconds for io calcs */
90 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10);
91 }
92
closer(unsigned int target,unsigned int n,unsigned int c)93 static inline int closer(unsigned int target, unsigned int n, unsigned int c)
94 {
95 int diff_cur = abs(target - c);
96 int diff_new = abs(target - n);
97
98 return (diff_new < diff_cur);
99 }
100
s3c_cpufreq_show(const char * pfx,struct s3c_cpufreq_config * cfg)101 static void s3c_cpufreq_show(const char *pfx,
102 struct s3c_cpufreq_config *cfg)
103 {
104 s3c_freq_dbg("%s: Fvco=%u, F=%lu, A=%lu, H=%lu (%u), P=%lu (%u)\n",
105 pfx, cfg->pll.frequency, cfg->freq.fclk, cfg->freq.armclk,
106 cfg->freq.hclk, cfg->divs.h_divisor,
107 cfg->freq.pclk, cfg->divs.p_divisor);
108 }
109
110 /* functions to wrapper the driver info calls to do the cpu specific work */
111
s3c_cpufreq_setio(struct s3c_cpufreq_config * cfg)112 static void s3c_cpufreq_setio(struct s3c_cpufreq_config *cfg)
113 {
114 if (cfg->info->set_iotiming)
115 (cfg->info->set_iotiming)(cfg, &s3c24xx_iotiming);
116 }
117
s3c_cpufreq_calcio(struct s3c_cpufreq_config * cfg)118 static int s3c_cpufreq_calcio(struct s3c_cpufreq_config *cfg)
119 {
120 if (cfg->info->calc_iotiming)
121 return (cfg->info->calc_iotiming)(cfg, &s3c24xx_iotiming);
122
123 return 0;
124 }
125
s3c_cpufreq_setrefresh(struct s3c_cpufreq_config * cfg)126 static void s3c_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg)
127 {
128 (cfg->info->set_refresh)(cfg);
129 }
130
s3c_cpufreq_setdivs(struct s3c_cpufreq_config * cfg)131 static void s3c_cpufreq_setdivs(struct s3c_cpufreq_config *cfg)
132 {
133 (cfg->info->set_divs)(cfg);
134 }
135
s3c_cpufreq_calcdivs(struct s3c_cpufreq_config * cfg)136 static int s3c_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg)
137 {
138 return (cfg->info->calc_divs)(cfg);
139 }
140
s3c_cpufreq_setfvco(struct s3c_cpufreq_config * cfg)141 static void s3c_cpufreq_setfvco(struct s3c_cpufreq_config *cfg)
142 {
143 cfg->mpll = _clk_mpll;
144 (cfg->info->set_fvco)(cfg);
145 }
146
s3c_cpufreq_updateclk(struct clk * clk,unsigned int freq)147 static inline void s3c_cpufreq_updateclk(struct clk *clk,
148 unsigned int freq)
149 {
150 clk_set_rate(clk, freq);
151 }
152
s3c_cpufreq_settarget(struct cpufreq_policy * policy,unsigned int target_freq,struct cpufreq_frequency_table * pll)153 static int s3c_cpufreq_settarget(struct cpufreq_policy *policy,
154 unsigned int target_freq,
155 struct cpufreq_frequency_table *pll)
156 {
157 struct s3c_cpufreq_freqs freqs;
158 struct s3c_cpufreq_config cpu_new;
159 unsigned long flags;
160
161 cpu_new = cpu_cur; /* copy new from current */
162
163 s3c_cpufreq_show("cur", &cpu_cur);
164
165 /* TODO - check for DMA currently outstanding */
166
167 cpu_new.pll = pll ? *pll : cpu_cur.pll;
168
169 if (pll)
170 freqs.pll_changing = 1;
171
172 /* update our frequencies */
173
174 cpu_new.freq.armclk = target_freq;
175 cpu_new.freq.fclk = cpu_new.pll.frequency;
176
177 if (s3c_cpufreq_calcdivs(&cpu_new) < 0) {
178 printk(KERN_ERR "no divisors for %d\n", target_freq);
179 goto err_notpossible;
180 }
181
182 s3c_freq_dbg("%s: got divs\n", __func__);
183
184 s3c_cpufreq_calc(&cpu_new);
185
186 s3c_freq_dbg("%s: calculated frequencies for new\n", __func__);
187
188 if (cpu_new.freq.hclk != cpu_cur.freq.hclk) {
189 if (s3c_cpufreq_calcio(&cpu_new) < 0) {
190 printk(KERN_ERR "%s: no IO timings\n", __func__);
191 goto err_notpossible;
192 }
193 }
194
195 s3c_cpufreq_show("new", &cpu_new);
196
197 /* setup our cpufreq parameters */
198
199 freqs.old = cpu_cur.freq;
200 freqs.new = cpu_new.freq;
201
202 freqs.freqs.old = cpu_cur.freq.armclk / 1000;
203 freqs.freqs.new = cpu_new.freq.armclk / 1000;
204
205 /* update f/h/p clock settings before we issue the change
206 * notification, so that drivers do not need to do anything
207 * special if they want to recalculate on CPUFREQ_PRECHANGE. */
208
209 s3c_cpufreq_updateclk(_clk_mpll, cpu_new.pll.frequency);
210 s3c_cpufreq_updateclk(clk_fclk, cpu_new.freq.fclk);
211 s3c_cpufreq_updateclk(clk_hclk, cpu_new.freq.hclk);
212 s3c_cpufreq_updateclk(clk_pclk, cpu_new.freq.pclk);
213
214 /* start the frequency change */
215 cpufreq_freq_transition_begin(policy, &freqs.freqs);
216
217 /* If hclk is staying the same, then we do not need to
218 * re-write the IO or the refresh timings whilst we are changing
219 * speed. */
220
221 local_irq_save(flags);
222
223 /* is our memory clock slowing down? */
224 if (cpu_new.freq.hclk < cpu_cur.freq.hclk) {
225 s3c_cpufreq_setrefresh(&cpu_new);
226 s3c_cpufreq_setio(&cpu_new);
227 }
228
229 if (cpu_new.freq.fclk == cpu_cur.freq.fclk) {
230 /* not changing PLL, just set the divisors */
231
232 s3c_cpufreq_setdivs(&cpu_new);
233 } else {
234 if (cpu_new.freq.fclk < cpu_cur.freq.fclk) {
235 /* slow the cpu down, then set divisors */
236
237 s3c_cpufreq_setfvco(&cpu_new);
238 s3c_cpufreq_setdivs(&cpu_new);
239 } else {
240 /* set the divisors, then speed up */
241
242 s3c_cpufreq_setdivs(&cpu_new);
243 s3c_cpufreq_setfvco(&cpu_new);
244 }
245 }
246
247 /* did our memory clock speed up */
248 if (cpu_new.freq.hclk > cpu_cur.freq.hclk) {
249 s3c_cpufreq_setrefresh(&cpu_new);
250 s3c_cpufreq_setio(&cpu_new);
251 }
252
253 /* update our current settings */
254 cpu_cur = cpu_new;
255
256 local_irq_restore(flags);
257
258 /* notify everyone we've done this */
259 cpufreq_freq_transition_end(policy, &freqs.freqs, 0);
260
261 s3c_freq_dbg("%s: finished\n", __func__);
262 return 0;
263
264 err_notpossible:
265 printk(KERN_ERR "no compatible settings for %d\n", target_freq);
266 return -EINVAL;
267 }
268
269 /* s3c_cpufreq_target
270 *
271 * called by the cpufreq core to adjust the frequency that the CPU
272 * is currently running at.
273 */
274
s3c_cpufreq_target(struct cpufreq_policy * policy,unsigned int target_freq,unsigned int relation)275 static int s3c_cpufreq_target(struct cpufreq_policy *policy,
276 unsigned int target_freq,
277 unsigned int relation)
278 {
279 struct cpufreq_frequency_table *pll;
280 unsigned int index;
281
282 /* avoid repeated calls which cause a needless amout of duplicated
283 * logging output (and CPU time as the calculation process is
284 * done) */
285 if (target_freq == last_target)
286 return 0;
287
288 last_target = target_freq;
289
290 s3c_freq_dbg("%s: policy %p, target %u, relation %u\n",
291 __func__, policy, target_freq, relation);
292
293 if (ftab) {
294 if (cpufreq_frequency_table_target(policy, ftab,
295 target_freq, relation,
296 &index)) {
297 s3c_freq_dbg("%s: table failed\n", __func__);
298 return -EINVAL;
299 }
300
301 s3c_freq_dbg("%s: adjust %d to entry %d (%u)\n", __func__,
302 target_freq, index, ftab[index].frequency);
303 target_freq = ftab[index].frequency;
304 }
305
306 target_freq *= 1000; /* convert target to Hz */
307
308 /* find the settings for our new frequency */
309
310 if (!pll_reg || cpu_cur.lock_pll) {
311 /* either we've not got any PLL values, or we've locked
312 * to the current one. */
313 pll = NULL;
314 } else {
315 struct cpufreq_policy tmp_policy;
316 int ret;
317
318 /* we keep the cpu pll table in Hz, to ensure we get an
319 * accurate value for the PLL output. */
320
321 tmp_policy.min = policy->min * 1000;
322 tmp_policy.max = policy->max * 1000;
323 tmp_policy.cpu = policy->cpu;
324
325 /* cpufreq_frequency_table_target uses a pointer to 'index'
326 * which is the number of the table entry, not the value of
327 * the table entry's index field. */
328
329 ret = cpufreq_frequency_table_target(&tmp_policy, pll_reg,
330 target_freq, relation,
331 &index);
332
333 if (ret < 0) {
334 printk(KERN_ERR "%s: no PLL available\n", __func__);
335 goto err_notpossible;
336 }
337
338 pll = pll_reg + index;
339
340 s3c_freq_dbg("%s: target %u => %u\n",
341 __func__, target_freq, pll->frequency);
342
343 target_freq = pll->frequency;
344 }
345
346 return s3c_cpufreq_settarget(policy, target_freq, pll);
347
348 err_notpossible:
349 printk(KERN_ERR "no compatible settings for %d\n", target_freq);
350 return -EINVAL;
351 }
352
s3c_cpufreq_clk_get(struct device * dev,const char * name)353 struct clk *s3c_cpufreq_clk_get(struct device *dev, const char *name)
354 {
355 struct clk *clk;
356
357 clk = clk_get(dev, name);
358 if (IS_ERR(clk))
359 printk(KERN_ERR "cpufreq: failed to get clock '%s'\n", name);
360
361 return clk;
362 }
363
s3c_cpufreq_init(struct cpufreq_policy * policy)364 static int s3c_cpufreq_init(struct cpufreq_policy *policy)
365 {
366 policy->clk = clk_arm;
367
368 policy->cpuinfo.transition_latency = cpu_cur.info->latency;
369
370 if (ftab)
371 return cpufreq_table_validate_and_show(policy, ftab);
372
373 return 0;
374 }
375
s3c_cpufreq_initclks(void)376 static int __init s3c_cpufreq_initclks(void)
377 {
378 _clk_mpll = s3c_cpufreq_clk_get(NULL, "mpll");
379 _clk_xtal = s3c_cpufreq_clk_get(NULL, "xtal");
380 clk_fclk = s3c_cpufreq_clk_get(NULL, "fclk");
381 clk_hclk = s3c_cpufreq_clk_get(NULL, "hclk");
382 clk_pclk = s3c_cpufreq_clk_get(NULL, "pclk");
383 clk_arm = s3c_cpufreq_clk_get(NULL, "armclk");
384
385 if (IS_ERR(clk_fclk) || IS_ERR(clk_hclk) || IS_ERR(clk_pclk) ||
386 IS_ERR(_clk_mpll) || IS_ERR(clk_arm) || IS_ERR(_clk_xtal)) {
387 printk(KERN_ERR "%s: could not get clock(s)\n", __func__);
388 return -ENOENT;
389 }
390
391 printk(KERN_INFO "%s: clocks f=%lu,h=%lu,p=%lu,a=%lu\n", __func__,
392 clk_get_rate(clk_fclk) / 1000,
393 clk_get_rate(clk_hclk) / 1000,
394 clk_get_rate(clk_pclk) / 1000,
395 clk_get_rate(clk_arm) / 1000);
396
397 return 0;
398 }
399
400 #ifdef CONFIG_PM
401 static struct cpufreq_frequency_table suspend_pll;
402 static unsigned int suspend_freq;
403
s3c_cpufreq_suspend(struct cpufreq_policy * policy)404 static int s3c_cpufreq_suspend(struct cpufreq_policy *policy)
405 {
406 suspend_pll.frequency = clk_get_rate(_clk_mpll);
407 suspend_pll.driver_data = __raw_readl(S3C2410_MPLLCON);
408 suspend_freq = clk_get_rate(clk_arm);
409
410 return 0;
411 }
412
s3c_cpufreq_resume(struct cpufreq_policy * policy)413 static int s3c_cpufreq_resume(struct cpufreq_policy *policy)
414 {
415 int ret;
416
417 s3c_freq_dbg("%s: resuming with policy %p\n", __func__, policy);
418
419 last_target = ~0; /* invalidate last_target setting */
420
421 /* whilst we will be called later on, we try and re-set the
422 * cpu frequencies as soon as possible so that we do not end
423 * up resuming devices and then immediately having to re-set
424 * a number of settings once these devices have restarted.
425 *
426 * as a note, it is expected devices are not used until they
427 * have been un-suspended and at that time they should have
428 * used the updated clock settings.
429 */
430
431 ret = s3c_cpufreq_settarget(NULL, suspend_freq, &suspend_pll);
432 if (ret) {
433 printk(KERN_ERR "%s: failed to reset pll/freq\n", __func__);
434 return ret;
435 }
436
437 return 0;
438 }
439 #else
440 #define s3c_cpufreq_resume NULL
441 #define s3c_cpufreq_suspend NULL
442 #endif
443
444 static struct cpufreq_driver s3c24xx_driver = {
445 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
446 .target = s3c_cpufreq_target,
447 .get = cpufreq_generic_get,
448 .init = s3c_cpufreq_init,
449 .suspend = s3c_cpufreq_suspend,
450 .resume = s3c_cpufreq_resume,
451 .name = "s3c24xx",
452 };
453
454
s3c_cpufreq_register(struct s3c_cpufreq_info * info)455 int s3c_cpufreq_register(struct s3c_cpufreq_info *info)
456 {
457 if (!info || !info->name) {
458 printk(KERN_ERR "%s: failed to pass valid information\n",
459 __func__);
460 return -EINVAL;
461 }
462
463 printk(KERN_INFO "S3C24XX CPU Frequency driver, %s cpu support\n",
464 info->name);
465
466 /* check our driver info has valid data */
467
468 BUG_ON(info->set_refresh == NULL);
469 BUG_ON(info->set_divs == NULL);
470 BUG_ON(info->calc_divs == NULL);
471
472 /* info->set_fvco is optional, depending on whether there
473 * is a need to set the clock code. */
474
475 cpu_cur.info = info;
476
477 /* Note, driver registering should probably update locktime */
478
479 return 0;
480 }
481
s3c_cpufreq_setboard(struct s3c_cpufreq_board * board)482 int __init s3c_cpufreq_setboard(struct s3c_cpufreq_board *board)
483 {
484 struct s3c_cpufreq_board *ours;
485
486 if (!board) {
487 printk(KERN_INFO "%s: no board data\n", __func__);
488 return -EINVAL;
489 }
490
491 /* Copy the board information so that each board can make this
492 * initdata. */
493
494 ours = kzalloc(sizeof(*ours), GFP_KERNEL);
495 if (ours == NULL) {
496 printk(KERN_ERR "%s: no memory\n", __func__);
497 return -ENOMEM;
498 }
499
500 *ours = *board;
501 cpu_cur.board = ours;
502
503 return 0;
504 }
505
s3c_cpufreq_auto_io(void)506 static int __init s3c_cpufreq_auto_io(void)
507 {
508 int ret;
509
510 if (!cpu_cur.info->get_iotiming) {
511 printk(KERN_ERR "%s: get_iotiming undefined\n", __func__);
512 return -ENOENT;
513 }
514
515 printk(KERN_INFO "%s: working out IO settings\n", __func__);
516
517 ret = (cpu_cur.info->get_iotiming)(&cpu_cur, &s3c24xx_iotiming);
518 if (ret)
519 printk(KERN_ERR "%s: failed to get timings\n", __func__);
520
521 return ret;
522 }
523
524 /* if one or is zero, then return the other, otherwise return the min */
525 #define do_min(_a, _b) ((_a) == 0 ? (_b) : (_b) == 0 ? (_a) : min(_a, _b))
526
527 /**
528 * s3c_cpufreq_freq_min - find the minimum settings for the given freq.
529 * @dst: The destination structure
530 * @a: One argument.
531 * @b: The other argument.
532 *
533 * Create a minimum of each frequency entry in the 'struct s3c_freq',
534 * unless the entry is zero when it is ignored and the non-zero argument
535 * used.
536 */
s3c_cpufreq_freq_min(struct s3c_freq * dst,struct s3c_freq * a,struct s3c_freq * b)537 static void s3c_cpufreq_freq_min(struct s3c_freq *dst,
538 struct s3c_freq *a, struct s3c_freq *b)
539 {
540 dst->fclk = do_min(a->fclk, b->fclk);
541 dst->hclk = do_min(a->hclk, b->hclk);
542 dst->pclk = do_min(a->pclk, b->pclk);
543 dst->armclk = do_min(a->armclk, b->armclk);
544 }
545
calc_locktime(u32 freq,u32 time_us)546 static inline u32 calc_locktime(u32 freq, u32 time_us)
547 {
548 u32 result;
549
550 result = freq * time_us;
551 result = DIV_ROUND_UP(result, 1000 * 1000);
552
553 return result;
554 }
555
s3c_cpufreq_update_loctkime(void)556 static void s3c_cpufreq_update_loctkime(void)
557 {
558 unsigned int bits = cpu_cur.info->locktime_bits;
559 u32 rate = (u32)clk_get_rate(_clk_xtal);
560 u32 val;
561
562 if (bits == 0) {
563 WARN_ON(1);
564 return;
565 }
566
567 val = calc_locktime(rate, cpu_cur.info->locktime_u) << bits;
568 val |= calc_locktime(rate, cpu_cur.info->locktime_m);
569
570 printk(KERN_INFO "%s: new locktime is 0x%08x\n", __func__, val);
571 __raw_writel(val, S3C2410_LOCKTIME);
572 }
573
s3c_cpufreq_build_freq(void)574 static int s3c_cpufreq_build_freq(void)
575 {
576 int size, ret;
577
578 if (!cpu_cur.info->calc_freqtable)
579 return -EINVAL;
580
581 kfree(ftab);
582 ftab = NULL;
583
584 size = cpu_cur.info->calc_freqtable(&cpu_cur, NULL, 0);
585 size++;
586
587 ftab = kzalloc(sizeof(*ftab) * size, GFP_KERNEL);
588 if (!ftab) {
589 printk(KERN_ERR "%s: no memory for tables\n", __func__);
590 return -ENOMEM;
591 }
592
593 ftab_size = size;
594
595 ret = cpu_cur.info->calc_freqtable(&cpu_cur, ftab, size);
596 s3c_cpufreq_addfreq(ftab, ret, size, CPUFREQ_TABLE_END);
597
598 return 0;
599 }
600
s3c_cpufreq_initcall(void)601 static int __init s3c_cpufreq_initcall(void)
602 {
603 int ret = 0;
604
605 if (cpu_cur.info && cpu_cur.board) {
606 ret = s3c_cpufreq_initclks();
607 if (ret)
608 goto out;
609
610 /* get current settings */
611 s3c_cpufreq_getcur(&cpu_cur);
612 s3c_cpufreq_show("cur", &cpu_cur);
613
614 if (cpu_cur.board->auto_io) {
615 ret = s3c_cpufreq_auto_io();
616 if (ret) {
617 printk(KERN_ERR "%s: failed to get io timing\n",
618 __func__);
619 goto out;
620 }
621 }
622
623 if (cpu_cur.board->need_io && !cpu_cur.info->set_iotiming) {
624 printk(KERN_ERR "%s: no IO support registered\n",
625 __func__);
626 ret = -EINVAL;
627 goto out;
628 }
629
630 if (!cpu_cur.info->need_pll)
631 cpu_cur.lock_pll = 1;
632
633 s3c_cpufreq_update_loctkime();
634
635 s3c_cpufreq_freq_min(&cpu_cur.max, &cpu_cur.board->max,
636 &cpu_cur.info->max);
637
638 if (cpu_cur.info->calc_freqtable)
639 s3c_cpufreq_build_freq();
640
641 ret = cpufreq_register_driver(&s3c24xx_driver);
642 }
643
644 out:
645 return ret;
646 }
647
648 late_initcall(s3c_cpufreq_initcall);
649
650 /**
651 * s3c_plltab_register - register CPU PLL table.
652 * @plls: The list of PLL entries.
653 * @plls_no: The size of the PLL entries @plls.
654 *
655 * Register the given set of PLLs with the system.
656 */
s3c_plltab_register(struct cpufreq_frequency_table * plls,unsigned int plls_no)657 int s3c_plltab_register(struct cpufreq_frequency_table *plls,
658 unsigned int plls_no)
659 {
660 struct cpufreq_frequency_table *vals;
661 unsigned int size;
662
663 size = sizeof(*vals) * (plls_no + 1);
664
665 vals = kzalloc(size, GFP_KERNEL);
666 if (vals) {
667 memcpy(vals, plls, size);
668 pll_reg = vals;
669
670 /* write a terminating entry, we don't store it in the
671 * table that is stored in the kernel */
672 vals += plls_no;
673 vals->frequency = CPUFREQ_TABLE_END;
674
675 printk(KERN_INFO "cpufreq: %d PLL entries\n", plls_no);
676 } else
677 printk(KERN_ERR "cpufreq: no memory for PLL tables\n");
678
679 return vals ? 0 : -ENOMEM;
680 }
681