1 /*
2 This file is provided under a dual BSD/GPLv2 license. When using or
3 redistributing this file, you may do so under either license.
4
5 GPL LICENSE SUMMARY
6 Copyright(c) 2014 Intel Corporation.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of version 2 of the GNU General Public License as
9 published by the Free Software Foundation.
10
11 This program is distributed in the hope that it will be useful, but
12 WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 General Public License for more details.
15
16 Contact Information:
17 qat-linux@intel.com
18
19 BSD LICENSE
20 Copyright(c) 2014 Intel Corporation.
21 Redistribution and use in source and binary forms, with or without
22 modification, are permitted provided that the following conditions
23 are met:
24
25 * Redistributions of source code must retain the above copyright
26 notice, this list of conditions and the following disclaimer.
27 * Redistributions in binary form must reproduce the above copyright
28 notice, this list of conditions and the following disclaimer in
29 the documentation and/or other materials provided with the
30 distribution.
31 * Neither the name of Intel Corporation nor the names of its
32 contributors may be used to endorse or promote products derived
33 from this software without specific prior written permission.
34
35 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
36 "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
37 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
38 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
39 OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
40 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
41 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
42 DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
43 THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
44 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
45 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
46 */
47 #ifndef ADF_ACCEL_DEVICES_H_
48 #define ADF_ACCEL_DEVICES_H_
49 #include <linux/interrupt.h>
50 #include <linux/module.h>
51 #include <linux/list.h>
52 #include <linux/io.h>
53 #include <linux/ratelimit.h>
54 #include "adf_cfg_common.h"
55
56 #define ADF_DH895XCC_DEVICE_NAME "dh895xcc"
57 #define ADF_DH895XCCVF_DEVICE_NAME "dh895xccvf"
58 #define ADF_DH895XCC_PCI_DEVICE_ID 0x435
59 #define ADF_DH895XCCIOV_PCI_DEVICE_ID 0x443
60 #define ADF_PCI_MAX_BARS 3
61 #define ADF_DEVICE_NAME_LENGTH 32
62 #define ADF_ETR_MAX_RINGS_PER_BANK 16
63 #define ADF_MAX_MSIX_VECTOR_NAME 16
64 #define ADF_DEVICE_NAME_PREFIX "qat_"
65
66 enum adf_accel_capabilities {
67 ADF_ACCEL_CAPABILITIES_NULL = 0,
68 ADF_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC = 1,
69 ADF_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC = 2,
70 ADF_ACCEL_CAPABILITIES_CIPHER = 4,
71 ADF_ACCEL_CAPABILITIES_AUTHENTICATION = 8,
72 ADF_ACCEL_CAPABILITIES_COMPRESSION = 32,
73 ADF_ACCEL_CAPABILITIES_LZS_COMPRESSION = 64,
74 ADF_ACCEL_CAPABILITIES_RANDOM_NUMBER = 128
75 };
76
77 struct adf_bar {
78 resource_size_t base_addr;
79 void __iomem *virt_addr;
80 resource_size_t size;
81 } __packed;
82
83 struct adf_accel_msix {
84 struct msix_entry *entries;
85 char **names;
86 u32 num_entries;
87 } __packed;
88
89 struct adf_accel_pci {
90 struct pci_dev *pci_dev;
91 struct adf_accel_msix msix_entries;
92 struct adf_bar pci_bars[ADF_PCI_MAX_BARS];
93 uint8_t revid;
94 uint8_t sku;
95 } __packed;
96
97 enum dev_state {
98 DEV_DOWN = 0,
99 DEV_UP
100 };
101
102 enum dev_sku_info {
103 DEV_SKU_1 = 0,
104 DEV_SKU_2,
105 DEV_SKU_3,
106 DEV_SKU_4,
107 DEV_SKU_VF,
108 DEV_SKU_UNKNOWN,
109 };
110
get_sku_info(enum dev_sku_info info)111 static inline const char *get_sku_info(enum dev_sku_info info)
112 {
113 switch (info) {
114 case DEV_SKU_1:
115 return "SKU1";
116 case DEV_SKU_2:
117 return "SKU2";
118 case DEV_SKU_3:
119 return "SKU3";
120 case DEV_SKU_4:
121 return "SKU4";
122 case DEV_SKU_VF:
123 return "SKUVF";
124 case DEV_SKU_UNKNOWN:
125 default:
126 break;
127 }
128 return "Unknown SKU";
129 }
130
131 struct adf_hw_device_class {
132 const char *name;
133 const enum adf_device_type type;
134 uint32_t instances;
135 } __packed;
136
137 struct adf_cfg_device_data;
138 struct adf_accel_dev;
139 struct adf_etr_data;
140 struct adf_etr_ring_data;
141
142 struct adf_hw_device_data {
143 struct adf_hw_device_class *dev_class;
144 uint32_t (*get_accel_mask)(uint32_t fuse);
145 uint32_t (*get_ae_mask)(uint32_t fuse);
146 uint32_t (*get_sram_bar_id)(struct adf_hw_device_data *self);
147 uint32_t (*get_misc_bar_id)(struct adf_hw_device_data *self);
148 uint32_t (*get_etr_bar_id)(struct adf_hw_device_data *self);
149 uint32_t (*get_num_aes)(struct adf_hw_device_data *self);
150 uint32_t (*get_num_accels)(struct adf_hw_device_data *self);
151 uint32_t (*get_pf2vf_offset)(uint32_t i);
152 uint32_t (*get_vintmsk_offset)(uint32_t i);
153 enum dev_sku_info (*get_sku)(struct adf_hw_device_data *self);
154 int (*alloc_irq)(struct adf_accel_dev *accel_dev);
155 void (*free_irq)(struct adf_accel_dev *accel_dev);
156 void (*enable_error_correction)(struct adf_accel_dev *accel_dev);
157 int (*init_admin_comms)(struct adf_accel_dev *accel_dev);
158 void (*exit_admin_comms)(struct adf_accel_dev *accel_dev);
159 int (*send_admin_init)(struct adf_accel_dev *accel_dev);
160 int (*init_arb)(struct adf_accel_dev *accel_dev);
161 void (*exit_arb)(struct adf_accel_dev *accel_dev);
162 void (*get_arb_mapping)(struct adf_accel_dev *accel_dev,
163 const uint32_t **cfg);
164 void (*disable_iov)(struct adf_accel_dev *accel_dev);
165 void (*enable_ints)(struct adf_accel_dev *accel_dev);
166 int (*enable_vf2pf_comms)(struct adf_accel_dev *accel_dev);
167 const char *fw_name;
168 const char *fw_mmp_name;
169 uint32_t fuses;
170 uint32_t accel_capabilities_mask;
171 uint16_t accel_mask;
172 uint16_t ae_mask;
173 uint16_t tx_rings_mask;
174 uint8_t tx_rx_gap;
175 uint8_t instance_id;
176 uint8_t num_banks;
177 uint8_t num_accel;
178 uint8_t num_logical_accel;
179 uint8_t num_engines;
180 uint8_t min_iov_compat_ver;
181 } __packed;
182
183 /* CSR write macro */
184 #define ADF_CSR_WR(csr_base, csr_offset, val) \
185 __raw_writel(val, csr_base + csr_offset)
186
187 /* CSR read macro */
188 #define ADF_CSR_RD(csr_base, csr_offset) __raw_readl(csr_base + csr_offset)
189
190 #define GET_DEV(accel_dev) ((accel_dev)->accel_pci_dev.pci_dev->dev)
191 #define GET_BARS(accel_dev) ((accel_dev)->accel_pci_dev.pci_bars)
192 #define GET_HW_DATA(accel_dev) (accel_dev->hw_device)
193 #define GET_MAX_BANKS(accel_dev) (GET_HW_DATA(accel_dev)->num_banks)
194 #define GET_MAX_ACCELENGINES(accel_dev) (GET_HW_DATA(accel_dev)->num_engines)
195 #define accel_to_pci_dev(accel_ptr) accel_ptr->accel_pci_dev.pci_dev
196
197 struct adf_admin_comms;
198 struct icp_qat_fw_loader_handle;
199 struct adf_fw_loader_data {
200 struct icp_qat_fw_loader_handle *fw_loader;
201 const struct firmware *uof_fw;
202 const struct firmware *mmp_fw;
203 };
204
205 struct adf_accel_vf_info {
206 struct adf_accel_dev *accel_dev;
207 struct tasklet_struct vf2pf_bh_tasklet;
208 struct mutex pf2vf_lock; /* protect CSR access for PF2VF messages */
209 struct ratelimit_state vf2pf_ratelimit;
210 u32 vf_nr;
211 bool init;
212 };
213
214 struct adf_accel_dev {
215 struct adf_etr_data *transport;
216 struct adf_hw_device_data *hw_device;
217 struct adf_cfg_device_data *cfg;
218 struct adf_fw_loader_data *fw_loader;
219 struct adf_admin_comms *admin;
220 struct list_head crypto_list;
221 unsigned long status;
222 atomic_t ref_count;
223 struct dentry *debugfs_dir;
224 struct list_head list;
225 struct module *owner;
226 struct adf_accel_pci accel_pci_dev;
227 union {
228 struct {
229 /* vf_info is non-zero when SR-IOV is init'ed */
230 struct adf_accel_vf_info *vf_info;
231 } pf;
232 struct {
233 char *irq_name;
234 struct tasklet_struct pf2vf_bh_tasklet;
235 struct mutex vf2pf_lock; /* protect CSR access */
236 struct completion iov_msg_completion;
237 uint8_t compatible;
238 uint8_t pf_version;
239 } vf;
240 };
241 bool is_vf;
242 uint8_t accel_id;
243 } __packed;
244 #endif
245