1 /*
2 * Copyright (C) 2012 Russell King
3 * Rewritten from the dovefb driver, and Armada510 manuals.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9 #include <drm/drmP.h>
10 #include <drm/drm_plane_helper.h>
11 #include "armada_crtc.h"
12 #include "armada_drm.h"
13 #include "armada_fb.h"
14 #include "armada_gem.h"
15 #include "armada_hw.h"
16 #include <drm/armada_drm.h>
17 #include "armada_ioctlP.h"
18
19 struct armada_ovl_plane_properties {
20 uint32_t colorkey_yr;
21 uint32_t colorkey_ug;
22 uint32_t colorkey_vb;
23 #define K2R(val) (((val) >> 0) & 0xff)
24 #define K2G(val) (((val) >> 8) & 0xff)
25 #define K2B(val) (((val) >> 16) & 0xff)
26 int16_t brightness;
27 uint16_t contrast;
28 uint16_t saturation;
29 uint32_t colorkey_mode;
30 uint32_t colorkey_enable;
31 };
32
33 struct armada_ovl_plane {
34 struct armada_plane base;
35 struct drm_framebuffer *old_fb;
36 uint32_t src_hw;
37 uint32_t dst_hw;
38 uint32_t dst_yx;
39 uint32_t ctrl0;
40 struct {
41 struct armada_plane_work work;
42 struct armada_regs regs[13];
43 } vbl;
44 struct armada_ovl_plane_properties prop;
45 };
46 #define drm_to_armada_ovl_plane(p) \
47 container_of(p, struct armada_ovl_plane, base.base)
48
49
50 static void
armada_ovl_update_attr(struct armada_ovl_plane_properties * prop,struct armada_crtc * dcrtc)51 armada_ovl_update_attr(struct armada_ovl_plane_properties *prop,
52 struct armada_crtc *dcrtc)
53 {
54 writel_relaxed(prop->colorkey_yr, dcrtc->base + LCD_SPU_COLORKEY_Y);
55 writel_relaxed(prop->colorkey_ug, dcrtc->base + LCD_SPU_COLORKEY_U);
56 writel_relaxed(prop->colorkey_vb, dcrtc->base + LCD_SPU_COLORKEY_V);
57
58 writel_relaxed(prop->brightness << 16 | prop->contrast,
59 dcrtc->base + LCD_SPU_CONTRAST);
60 /* Docs say 15:0, but it seems to actually be 31:16 on Armada 510 */
61 writel_relaxed(prop->saturation << 16,
62 dcrtc->base + LCD_SPU_SATURATION);
63 writel_relaxed(0x00002000, dcrtc->base + LCD_SPU_CBSH_HUE);
64
65 spin_lock_irq(&dcrtc->irq_lock);
66 armada_updatel(prop->colorkey_mode,
67 CFG_CKMODE_MASK | CFG_ALPHAM_MASK | CFG_ALPHA_MASK,
68 dcrtc->base + LCD_SPU_DMA_CTRL1);
69 if (dcrtc->variant->has_spu_adv_reg)
70 armada_updatel(prop->colorkey_enable,
71 ADV_GRACOLORKEY | ADV_VIDCOLORKEY,
72 dcrtc->base + LCD_SPU_ADV_REG);
73 spin_unlock_irq(&dcrtc->irq_lock);
74 }
75
armada_ovl_retire_fb(struct armada_ovl_plane * dplane,struct drm_framebuffer * fb)76 static void armada_ovl_retire_fb(struct armada_ovl_plane *dplane,
77 struct drm_framebuffer *fb)
78 {
79 struct drm_framebuffer *old_fb;
80
81 old_fb = xchg(&dplane->old_fb, fb);
82
83 if (old_fb)
84 armada_drm_queue_unref_work(dplane->base.base.dev, old_fb);
85 }
86
87 /* === Plane support === */
armada_ovl_plane_work(struct armada_crtc * dcrtc,struct armada_plane * plane,struct armada_plane_work * work)88 static void armada_ovl_plane_work(struct armada_crtc *dcrtc,
89 struct armada_plane *plane, struct armada_plane_work *work)
90 {
91 struct armada_ovl_plane *dplane = container_of(plane, struct armada_ovl_plane, base);
92
93 armada_drm_crtc_update_regs(dcrtc, dplane->vbl.regs);
94 armada_ovl_retire_fb(dplane, NULL);
95 }
96
97 static int
armada_ovl_plane_update(struct drm_plane * plane,struct drm_crtc * crtc,struct drm_framebuffer * fb,int crtc_x,int crtc_y,unsigned crtc_w,unsigned crtc_h,uint32_t src_x,uint32_t src_y,uint32_t src_w,uint32_t src_h)98 armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
99 struct drm_framebuffer *fb,
100 int crtc_x, int crtc_y, unsigned crtc_w, unsigned crtc_h,
101 uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h)
102 {
103 struct armada_ovl_plane *dplane = drm_to_armada_ovl_plane(plane);
104 struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
105 struct drm_rect src = {
106 .x1 = src_x,
107 .y1 = src_y,
108 .x2 = src_x + src_w,
109 .y2 = src_y + src_h,
110 };
111 struct drm_rect dest = {
112 .x1 = crtc_x,
113 .y1 = crtc_y,
114 .x2 = crtc_x + crtc_w,
115 .y2 = crtc_y + crtc_h,
116 };
117 const struct drm_rect clip = {
118 .x2 = crtc->mode.hdisplay,
119 .y2 = crtc->mode.vdisplay,
120 };
121 uint32_t val, ctrl0;
122 unsigned idx = 0;
123 bool visible;
124 int ret;
125
126 ret = drm_plane_helper_check_update(plane, crtc, fb, &src, &dest, &clip,
127 0, INT_MAX, true, false, &visible);
128 if (ret)
129 return ret;
130
131 ctrl0 = CFG_DMA_FMT(drm_fb_to_armada_fb(fb)->fmt) |
132 CFG_DMA_MOD(drm_fb_to_armada_fb(fb)->mod) |
133 CFG_CBSH_ENA | CFG_DMA_HSMOOTH | CFG_DMA_ENA;
134
135 /* Does the position/size result in nothing to display? */
136 if (!visible)
137 ctrl0 &= ~CFG_DMA_ENA;
138
139 if (!dcrtc->plane) {
140 dcrtc->plane = plane;
141 armada_ovl_update_attr(&dplane->prop, dcrtc);
142 }
143
144 /* FIXME: overlay on an interlaced display */
145 /* Just updating the position/size? */
146 if (plane->fb == fb && dplane->ctrl0 == ctrl0) {
147 val = (drm_rect_height(&src) & 0xffff0000) |
148 drm_rect_width(&src) >> 16;
149 dplane->src_hw = val;
150 writel_relaxed(val, dcrtc->base + LCD_SPU_DMA_HPXL_VLN);
151
152 val = drm_rect_height(&dest) << 16 | drm_rect_width(&dest);
153 dplane->dst_hw = val;
154 writel_relaxed(val, dcrtc->base + LCD_SPU_DZM_HPXL_VLN);
155
156 val = dest.y1 << 16 | dest.x1;
157 dplane->dst_yx = val;
158 writel_relaxed(val, dcrtc->base + LCD_SPU_DMA_OVSA_HPXL_VLN);
159
160 return 0;
161 } else if (~dplane->ctrl0 & ctrl0 & CFG_DMA_ENA) {
162 /* Power up the Y/U/V FIFOs on ENA 0->1 transitions */
163 armada_updatel(0, CFG_PDWN16x66 | CFG_PDWN32x66,
164 dcrtc->base + LCD_SPU_SRAM_PARA1);
165 }
166
167 if (armada_drm_plane_work_wait(&dplane->base, HZ / 25) == 0)
168 armada_drm_plane_work_cancel(dcrtc, &dplane->base);
169
170 if (plane->fb != fb) {
171 struct armada_gem_object *obj = drm_fb_obj(fb);
172 uint32_t addr[3], pixel_format;
173 int i, num_planes, hsub;
174
175 /*
176 * Take a reference on the new framebuffer - we want to
177 * hold on to it while the hardware is displaying it.
178 */
179 drm_framebuffer_reference(fb);
180
181 if (plane->fb)
182 armada_ovl_retire_fb(dplane, plane->fb);
183
184 src_y = src.y1 >> 16;
185 src_x = src.x1 >> 16;
186
187 pixel_format = fb->pixel_format;
188 hsub = drm_format_horz_chroma_subsampling(pixel_format);
189 num_planes = drm_format_num_planes(pixel_format);
190
191 /*
192 * Annoyingly, shifting a YUYV-format image by one pixel
193 * causes the U/V planes to toggle. Toggle the UV swap.
194 * (Unfortunately, this causes momentary colour flickering.)
195 */
196 if (src_x & (hsub - 1) && num_planes == 1)
197 ctrl0 ^= CFG_DMA_MOD(CFG_SWAPUV);
198
199 for (i = 0; i < num_planes; i++)
200 addr[i] = obj->dev_addr + fb->offsets[i] +
201 src_y * fb->pitches[i] +
202 src_x * drm_format_plane_cpp(pixel_format, i);
203 for (; i < ARRAY_SIZE(addr); i++)
204 addr[i] = 0;
205
206 armada_reg_queue_set(dplane->vbl.regs, idx, addr[0],
207 LCD_SPU_DMA_START_ADDR_Y0);
208 armada_reg_queue_set(dplane->vbl.regs, idx, addr[1],
209 LCD_SPU_DMA_START_ADDR_U0);
210 armada_reg_queue_set(dplane->vbl.regs, idx, addr[2],
211 LCD_SPU_DMA_START_ADDR_V0);
212 armada_reg_queue_set(dplane->vbl.regs, idx, addr[0],
213 LCD_SPU_DMA_START_ADDR_Y1);
214 armada_reg_queue_set(dplane->vbl.regs, idx, addr[1],
215 LCD_SPU_DMA_START_ADDR_U1);
216 armada_reg_queue_set(dplane->vbl.regs, idx, addr[2],
217 LCD_SPU_DMA_START_ADDR_V1);
218
219 val = fb->pitches[0] << 16 | fb->pitches[0];
220 armada_reg_queue_set(dplane->vbl.regs, idx, val,
221 LCD_SPU_DMA_PITCH_YC);
222 val = fb->pitches[1] << 16 | fb->pitches[2];
223 armada_reg_queue_set(dplane->vbl.regs, idx, val,
224 LCD_SPU_DMA_PITCH_UV);
225 }
226
227 val = (drm_rect_height(&src) & 0xffff0000) | drm_rect_width(&src) >> 16;
228 if (dplane->src_hw != val) {
229 dplane->src_hw = val;
230 armada_reg_queue_set(dplane->vbl.regs, idx, val,
231 LCD_SPU_DMA_HPXL_VLN);
232 }
233
234 val = drm_rect_height(&dest) << 16 | drm_rect_width(&dest);
235 if (dplane->dst_hw != val) {
236 dplane->dst_hw = val;
237 armada_reg_queue_set(dplane->vbl.regs, idx, val,
238 LCD_SPU_DZM_HPXL_VLN);
239 }
240
241 val = dest.y1 << 16 | dest.x1;
242 if (dplane->dst_yx != val) {
243 dplane->dst_yx = val;
244 armada_reg_queue_set(dplane->vbl.regs, idx, val,
245 LCD_SPU_DMA_OVSA_HPXL_VLN);
246 }
247
248 if (dplane->ctrl0 != ctrl0) {
249 dplane->ctrl0 = ctrl0;
250 armada_reg_queue_mod(dplane->vbl.regs, idx, ctrl0,
251 CFG_CBSH_ENA | CFG_DMAFORMAT | CFG_DMA_FTOGGLE |
252 CFG_DMA_HSMOOTH | CFG_DMA_TSTMODE |
253 CFG_DMA_MOD(CFG_SWAPRB | CFG_SWAPUV | CFG_SWAPYU |
254 CFG_YUV2RGB) | CFG_DMA_ENA,
255 LCD_SPU_DMA_CTRL0);
256 }
257 if (idx) {
258 armada_reg_queue_end(dplane->vbl.regs, idx);
259 armada_drm_plane_work_queue(dcrtc, &dplane->base,
260 &dplane->vbl.work);
261 }
262 return 0;
263 }
264
armada_ovl_plane_disable(struct drm_plane * plane)265 static int armada_ovl_plane_disable(struct drm_plane *plane)
266 {
267 struct armada_ovl_plane *dplane = drm_to_armada_ovl_plane(plane);
268 struct drm_framebuffer *fb;
269 struct armada_crtc *dcrtc;
270
271 if (!dplane->base.base.crtc)
272 return 0;
273
274 dcrtc = drm_to_armada_crtc(dplane->base.base.crtc);
275
276 armada_drm_plane_work_cancel(dcrtc, &dplane->base);
277 armada_drm_crtc_plane_disable(dcrtc, plane);
278
279 dcrtc->plane = NULL;
280 dplane->ctrl0 = 0;
281
282 fb = xchg(&dplane->old_fb, NULL);
283 if (fb)
284 drm_framebuffer_unreference(fb);
285
286 return 0;
287 }
288
armada_ovl_plane_destroy(struct drm_plane * plane)289 static void armada_ovl_plane_destroy(struct drm_plane *plane)
290 {
291 struct armada_ovl_plane *dplane = drm_to_armada_ovl_plane(plane);
292
293 drm_plane_cleanup(plane);
294
295 kfree(dplane);
296 }
297
armada_ovl_plane_set_property(struct drm_plane * plane,struct drm_property * property,uint64_t val)298 static int armada_ovl_plane_set_property(struct drm_plane *plane,
299 struct drm_property *property, uint64_t val)
300 {
301 struct armada_private *priv = plane->dev->dev_private;
302 struct armada_ovl_plane *dplane = drm_to_armada_ovl_plane(plane);
303 bool update_attr = false;
304
305 if (property == priv->colorkey_prop) {
306 #define CCC(v) ((v) << 24 | (v) << 16 | (v) << 8)
307 dplane->prop.colorkey_yr = CCC(K2R(val));
308 dplane->prop.colorkey_ug = CCC(K2G(val));
309 dplane->prop.colorkey_vb = CCC(K2B(val));
310 #undef CCC
311 update_attr = true;
312 } else if (property == priv->colorkey_min_prop) {
313 dplane->prop.colorkey_yr &= ~0x00ff0000;
314 dplane->prop.colorkey_yr |= K2R(val) << 16;
315 dplane->prop.colorkey_ug &= ~0x00ff0000;
316 dplane->prop.colorkey_ug |= K2G(val) << 16;
317 dplane->prop.colorkey_vb &= ~0x00ff0000;
318 dplane->prop.colorkey_vb |= K2B(val) << 16;
319 update_attr = true;
320 } else if (property == priv->colorkey_max_prop) {
321 dplane->prop.colorkey_yr &= ~0xff000000;
322 dplane->prop.colorkey_yr |= K2R(val) << 24;
323 dplane->prop.colorkey_ug &= ~0xff000000;
324 dplane->prop.colorkey_ug |= K2G(val) << 24;
325 dplane->prop.colorkey_vb &= ~0xff000000;
326 dplane->prop.colorkey_vb |= K2B(val) << 24;
327 update_attr = true;
328 } else if (property == priv->colorkey_val_prop) {
329 dplane->prop.colorkey_yr &= ~0x0000ff00;
330 dplane->prop.colorkey_yr |= K2R(val) << 8;
331 dplane->prop.colorkey_ug &= ~0x0000ff00;
332 dplane->prop.colorkey_ug |= K2G(val) << 8;
333 dplane->prop.colorkey_vb &= ~0x0000ff00;
334 dplane->prop.colorkey_vb |= K2B(val) << 8;
335 update_attr = true;
336 } else if (property == priv->colorkey_alpha_prop) {
337 dplane->prop.colorkey_yr &= ~0x000000ff;
338 dplane->prop.colorkey_yr |= K2R(val);
339 dplane->prop.colorkey_ug &= ~0x000000ff;
340 dplane->prop.colorkey_ug |= K2G(val);
341 dplane->prop.colorkey_vb &= ~0x000000ff;
342 dplane->prop.colorkey_vb |= K2B(val);
343 update_attr = true;
344 } else if (property == priv->colorkey_mode_prop) {
345 if (val == CKMODE_DISABLE) {
346 dplane->prop.colorkey_mode =
347 CFG_CKMODE(CKMODE_DISABLE) |
348 CFG_ALPHAM_CFG | CFG_ALPHA(255);
349 dplane->prop.colorkey_enable = 0;
350 } else {
351 dplane->prop.colorkey_mode =
352 CFG_CKMODE(val) |
353 CFG_ALPHAM_GRA | CFG_ALPHA(0);
354 dplane->prop.colorkey_enable = ADV_GRACOLORKEY;
355 }
356 update_attr = true;
357 } else if (property == priv->brightness_prop) {
358 dplane->prop.brightness = val - 256;
359 update_attr = true;
360 } else if (property == priv->contrast_prop) {
361 dplane->prop.contrast = val;
362 update_attr = true;
363 } else if (property == priv->saturation_prop) {
364 dplane->prop.saturation = val;
365 update_attr = true;
366 }
367
368 if (update_attr && dplane->base.base.crtc)
369 armada_ovl_update_attr(&dplane->prop,
370 drm_to_armada_crtc(dplane->base.base.crtc));
371
372 return 0;
373 }
374
375 static const struct drm_plane_funcs armada_ovl_plane_funcs = {
376 .update_plane = armada_ovl_plane_update,
377 .disable_plane = armada_ovl_plane_disable,
378 .destroy = armada_ovl_plane_destroy,
379 .set_property = armada_ovl_plane_set_property,
380 };
381
382 static const uint32_t armada_ovl_formats[] = {
383 DRM_FORMAT_UYVY,
384 DRM_FORMAT_YUYV,
385 DRM_FORMAT_YUV420,
386 DRM_FORMAT_YVU420,
387 DRM_FORMAT_YUV422,
388 DRM_FORMAT_YVU422,
389 DRM_FORMAT_VYUY,
390 DRM_FORMAT_YVYU,
391 DRM_FORMAT_ARGB8888,
392 DRM_FORMAT_ABGR8888,
393 DRM_FORMAT_XRGB8888,
394 DRM_FORMAT_XBGR8888,
395 DRM_FORMAT_RGB888,
396 DRM_FORMAT_BGR888,
397 DRM_FORMAT_ARGB1555,
398 DRM_FORMAT_ABGR1555,
399 DRM_FORMAT_RGB565,
400 DRM_FORMAT_BGR565,
401 };
402
403 static struct drm_prop_enum_list armada_drm_colorkey_enum_list[] = {
404 { CKMODE_DISABLE, "disabled" },
405 { CKMODE_Y, "Y component" },
406 { CKMODE_U, "U component" },
407 { CKMODE_V, "V component" },
408 { CKMODE_RGB, "RGB" },
409 { CKMODE_R, "R component" },
410 { CKMODE_G, "G component" },
411 { CKMODE_B, "B component" },
412 };
413
armada_overlay_create_properties(struct drm_device * dev)414 static int armada_overlay_create_properties(struct drm_device *dev)
415 {
416 struct armada_private *priv = dev->dev_private;
417
418 if (priv->colorkey_prop)
419 return 0;
420
421 priv->colorkey_prop = drm_property_create_range(dev, 0,
422 "colorkey", 0, 0xffffff);
423 priv->colorkey_min_prop = drm_property_create_range(dev, 0,
424 "colorkey_min", 0, 0xffffff);
425 priv->colorkey_max_prop = drm_property_create_range(dev, 0,
426 "colorkey_max", 0, 0xffffff);
427 priv->colorkey_val_prop = drm_property_create_range(dev, 0,
428 "colorkey_val", 0, 0xffffff);
429 priv->colorkey_alpha_prop = drm_property_create_range(dev, 0,
430 "colorkey_alpha", 0, 0xffffff);
431 priv->colorkey_mode_prop = drm_property_create_enum(dev, 0,
432 "colorkey_mode",
433 armada_drm_colorkey_enum_list,
434 ARRAY_SIZE(armada_drm_colorkey_enum_list));
435 priv->brightness_prop = drm_property_create_range(dev, 0,
436 "brightness", 0, 256 + 255);
437 priv->contrast_prop = drm_property_create_range(dev, 0,
438 "contrast", 0, 0x7fff);
439 priv->saturation_prop = drm_property_create_range(dev, 0,
440 "saturation", 0, 0x7fff);
441
442 if (!priv->colorkey_prop)
443 return -ENOMEM;
444
445 return 0;
446 }
447
armada_overlay_plane_create(struct drm_device * dev,unsigned long crtcs)448 int armada_overlay_plane_create(struct drm_device *dev, unsigned long crtcs)
449 {
450 struct armada_private *priv = dev->dev_private;
451 struct drm_mode_object *mobj;
452 struct armada_ovl_plane *dplane;
453 int ret;
454
455 ret = armada_overlay_create_properties(dev);
456 if (ret)
457 return ret;
458
459 dplane = kzalloc(sizeof(*dplane), GFP_KERNEL);
460 if (!dplane)
461 return -ENOMEM;
462
463 ret = armada_drm_plane_init(&dplane->base);
464 if (ret) {
465 kfree(dplane);
466 return ret;
467 }
468
469 dplane->vbl.work.fn = armada_ovl_plane_work;
470
471 ret = drm_universal_plane_init(dev, &dplane->base.base, crtcs,
472 &armada_ovl_plane_funcs,
473 armada_ovl_formats,
474 ARRAY_SIZE(armada_ovl_formats),
475 DRM_PLANE_TYPE_OVERLAY);
476 if (ret) {
477 kfree(dplane);
478 return ret;
479 }
480
481 dplane->prop.colorkey_yr = 0xfefefe00;
482 dplane->prop.colorkey_ug = 0x01010100;
483 dplane->prop.colorkey_vb = 0x01010100;
484 dplane->prop.colorkey_mode = CFG_CKMODE(CKMODE_RGB) |
485 CFG_ALPHAM_GRA | CFG_ALPHA(0);
486 dplane->prop.colorkey_enable = ADV_GRACOLORKEY;
487 dplane->prop.brightness = 0;
488 dplane->prop.contrast = 0x4000;
489 dplane->prop.saturation = 0x4000;
490
491 mobj = &dplane->base.base.base;
492 drm_object_attach_property(mobj, priv->colorkey_prop,
493 0x0101fe);
494 drm_object_attach_property(mobj, priv->colorkey_min_prop,
495 0x0101fe);
496 drm_object_attach_property(mobj, priv->colorkey_max_prop,
497 0x0101fe);
498 drm_object_attach_property(mobj, priv->colorkey_val_prop,
499 0x0101fe);
500 drm_object_attach_property(mobj, priv->colorkey_alpha_prop,
501 0x000000);
502 drm_object_attach_property(mobj, priv->colorkey_mode_prop,
503 CKMODE_RGB);
504 drm_object_attach_property(mobj, priv->brightness_prop, 256);
505 drm_object_attach_property(mobj, priv->contrast_prop,
506 dplane->prop.contrast);
507 drm_object_attach_property(mobj, priv->saturation_prop,
508 dplane->prop.saturation);
509
510 return 0;
511 }
512