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1 /*
2  * Copyright © 2013 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  */
23 
24 #ifndef _INTEL_DSI_H
25 #define _INTEL_DSI_H
26 
27 #include <drm/drmP.h>
28 #include <drm/drm_crtc.h>
29 #include <drm/drm_mipi_dsi.h>
30 #include "intel_drv.h"
31 
32 /* Dual Link support */
33 #define DSI_DUAL_LINK_NONE		0
34 #define DSI_DUAL_LINK_FRONT_BACK	1
35 #define DSI_DUAL_LINK_PIXEL_ALT		2
36 
37 struct intel_dsi_host;
38 
39 struct intel_dsi {
40 	struct intel_encoder base;
41 
42 	struct drm_panel *panel;
43 	struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS];
44 
45 	/* GPIO Desc for CRC based Panel control */
46 	struct gpio_desc *gpio_panel;
47 
48 	struct intel_connector *attached_connector;
49 
50 	/* bit mask of ports being driven */
51 	u16 ports;
52 
53 	/* if true, use HS mode, otherwise LP */
54 	bool hs;
55 
56 	/* virtual channel */
57 	int channel;
58 
59 	/* Video mode or command mode */
60 	u16 operation_mode;
61 
62 	/* number of DSI lanes */
63 	unsigned int lane_count;
64 
65 	/* video mode pixel format for MIPI_DSI_FUNC_PRG register */
66 	u32 pixel_format;
67 
68 	/* video mode format for MIPI_VIDEO_MODE_FORMAT register */
69 	u32 video_mode_format;
70 
71 	/* eot for MIPI_EOT_DISABLE register */
72 	u8 eotp_pkt;
73 	u8 clock_stop;
74 
75 	u8 escape_clk_div;
76 	u8 dual_link;
77 	u8 pixel_overlap;
78 	u32 port_bits;
79 	u32 bw_timer;
80 	u32 dphy_reg;
81 	u32 video_frmt_cfg_bits;
82 	u16 lp_byte_clk;
83 
84 	/* timeouts in byte clocks */
85 	u16 lp_rx_timeout;
86 	u16 turn_arnd_val;
87 	u16 rst_timer_val;
88 	u16 hs_to_lp_count;
89 	u16 clk_lp_to_hs_count;
90 	u16 clk_hs_to_lp_count;
91 
92 	u16 init_count;
93 	u32 pclk;
94 	u16 burst_mode_ratio;
95 
96 	/* all delays in ms */
97 	u16 backlight_off_delay;
98 	u16 backlight_on_delay;
99 	u16 panel_on_delay;
100 	u16 panel_off_delay;
101 	u16 panel_pwr_cycle_delay;
102 };
103 
104 struct intel_dsi_host {
105 	struct mipi_dsi_host base;
106 	struct intel_dsi *intel_dsi;
107 	enum port port;
108 
109 	/* our little hack */
110 	struct mipi_dsi_device *device;
111 };
112 
to_intel_dsi_host(struct mipi_dsi_host * h)113 static inline struct intel_dsi_host *to_intel_dsi_host(struct mipi_dsi_host *h)
114 {
115 	return container_of(h, struct intel_dsi_host, base);
116 }
117 
118 #define for_each_dsi_port(__port, __ports_mask) \
119 	for ((__port) = PORT_A; (__port) < I915_MAX_PORTS; (__port)++)	\
120 		if ((__ports_mask) & (1 << (__port)))
121 
enc_to_intel_dsi(struct drm_encoder * encoder)122 static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
123 {
124 	return container_of(encoder, struct intel_dsi, base.base);
125 }
126 
127 extern void intel_enable_dsi_pll(struct intel_encoder *encoder);
128 extern void intel_disable_dsi_pll(struct intel_encoder *encoder);
129 extern u32 vlv_get_dsi_pclk(struct intel_encoder *encoder, int pipe_bpp);
130 extern u32 bxt_get_dsi_pclk(struct intel_encoder *encoder, int pipe_bpp);
131 extern void intel_dsi_reset_clocks(struct intel_encoder *encoder,
132 							enum port port);
133 
134 struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id);
135 
136 #endif /* _INTEL_DSI_H */
137