1 /*
2 * rcar_du_lvdsenc.c -- R-Car Display Unit LVDS Encoder
3 *
4 * Copyright (C) 2013-2014 Renesas Electronics Corporation
5 *
6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14 #include <linux/clk.h>
15 #include <linux/delay.h>
16 #include <linux/io.h>
17 #include <linux/platform_device.h>
18 #include <linux/slab.h>
19
20 #include "rcar_du_drv.h"
21 #include "rcar_du_encoder.h"
22 #include "rcar_du_lvdsenc.h"
23 #include "rcar_lvds_regs.h"
24
25 struct rcar_du_lvdsenc {
26 struct rcar_du_device *dev;
27
28 unsigned int index;
29 void __iomem *mmio;
30 struct clk *clock;
31 bool enabled;
32
33 enum rcar_lvds_input input;
34 };
35
rcar_lvds_write(struct rcar_du_lvdsenc * lvds,u32 reg,u32 data)36 static void rcar_lvds_write(struct rcar_du_lvdsenc *lvds, u32 reg, u32 data)
37 {
38 iowrite32(data, lvds->mmio + reg);
39 }
40
rcar_du_lvdsenc_start(struct rcar_du_lvdsenc * lvds,struct rcar_du_crtc * rcrtc)41 static int rcar_du_lvdsenc_start(struct rcar_du_lvdsenc *lvds,
42 struct rcar_du_crtc *rcrtc)
43 {
44 const struct drm_display_mode *mode = &rcrtc->crtc.mode;
45 unsigned int freq = mode->clock;
46 u32 lvdcr0;
47 u32 lvdhcr;
48 u32 pllcr;
49 int ret;
50
51 if (lvds->enabled)
52 return 0;
53
54 ret = clk_prepare_enable(lvds->clock);
55 if (ret < 0)
56 return ret;
57
58 /* PLL clock configuration */
59 if (freq < 39000)
60 pllcr = LVDPLLCR_CEEN | LVDPLLCR_COSEL | LVDPLLCR_PLLDLYCNT_38M;
61 else if (freq < 61000)
62 pllcr = LVDPLLCR_CEEN | LVDPLLCR_COSEL | LVDPLLCR_PLLDLYCNT_60M;
63 else if (freq < 121000)
64 pllcr = LVDPLLCR_CEEN | LVDPLLCR_COSEL | LVDPLLCR_PLLDLYCNT_121M;
65 else
66 pllcr = LVDPLLCR_PLLDLYCNT_150M;
67
68 rcar_lvds_write(lvds, LVDPLLCR, pllcr);
69
70 /* Hardcode the channels and control signals routing for now.
71 *
72 * HSYNC -> CTRL0
73 * VSYNC -> CTRL1
74 * DISP -> CTRL2
75 * 0 -> CTRL3
76 */
77 rcar_lvds_write(lvds, LVDCTRCR, LVDCTRCR_CTR3SEL_ZERO |
78 LVDCTRCR_CTR2SEL_DISP | LVDCTRCR_CTR1SEL_VSYNC |
79 LVDCTRCR_CTR0SEL_HSYNC);
80
81 if (rcar_du_needs(lvds->dev, RCAR_DU_QUIRK_LVDS_LANES))
82 lvdhcr = LVDCHCR_CHSEL_CH(0, 0) | LVDCHCR_CHSEL_CH(1, 3)
83 | LVDCHCR_CHSEL_CH(2, 2) | LVDCHCR_CHSEL_CH(3, 1);
84 else
85 lvdhcr = LVDCHCR_CHSEL_CH(0, 0) | LVDCHCR_CHSEL_CH(1, 1)
86 | LVDCHCR_CHSEL_CH(2, 2) | LVDCHCR_CHSEL_CH(3, 3);
87
88 rcar_lvds_write(lvds, LVDCHCR, lvdhcr);
89
90 /* Select the input, hardcode mode 0, enable LVDS operation and turn
91 * bias circuitry on.
92 */
93 lvdcr0 = LVDCR0_BEN | LVDCR0_LVEN;
94 if (rcrtc->index == 2)
95 lvdcr0 |= LVDCR0_DUSEL;
96 rcar_lvds_write(lvds, LVDCR0, lvdcr0);
97
98 /* Turn all the channels on. */
99 rcar_lvds_write(lvds, LVDCR1, LVDCR1_CHSTBY(3) | LVDCR1_CHSTBY(2) |
100 LVDCR1_CHSTBY(1) | LVDCR1_CHSTBY(0) | LVDCR1_CLKSTBY);
101
102 /* Turn the PLL on, wait for the startup delay, and turn the output
103 * on.
104 */
105 lvdcr0 |= LVDCR0_PLLON;
106 rcar_lvds_write(lvds, LVDCR0, lvdcr0);
107
108 usleep_range(100, 150);
109
110 lvdcr0 |= LVDCR0_LVRES;
111 rcar_lvds_write(lvds, LVDCR0, lvdcr0);
112
113 lvds->enabled = true;
114 return 0;
115 }
116
rcar_du_lvdsenc_stop(struct rcar_du_lvdsenc * lvds)117 static void rcar_du_lvdsenc_stop(struct rcar_du_lvdsenc *lvds)
118 {
119 if (!lvds->enabled)
120 return;
121
122 rcar_lvds_write(lvds, LVDCR0, 0);
123 rcar_lvds_write(lvds, LVDCR1, 0);
124
125 clk_disable_unprepare(lvds->clock);
126
127 lvds->enabled = false;
128 }
129
rcar_du_lvdsenc_enable(struct rcar_du_lvdsenc * lvds,struct drm_crtc * crtc,bool enable)130 int rcar_du_lvdsenc_enable(struct rcar_du_lvdsenc *lvds, struct drm_crtc *crtc,
131 bool enable)
132 {
133 if (!enable) {
134 rcar_du_lvdsenc_stop(lvds);
135 return 0;
136 } else if (crtc) {
137 struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
138 return rcar_du_lvdsenc_start(lvds, rcrtc);
139 } else
140 return -EINVAL;
141 }
142
rcar_du_lvdsenc_get_resources(struct rcar_du_lvdsenc * lvds,struct platform_device * pdev)143 static int rcar_du_lvdsenc_get_resources(struct rcar_du_lvdsenc *lvds,
144 struct platform_device *pdev)
145 {
146 struct resource *mem;
147 char name[7];
148
149 sprintf(name, "lvds.%u", lvds->index);
150
151 mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
152 lvds->mmio = devm_ioremap_resource(&pdev->dev, mem);
153 if (IS_ERR(lvds->mmio))
154 return PTR_ERR(lvds->mmio);
155
156 lvds->clock = devm_clk_get(&pdev->dev, name);
157 if (IS_ERR(lvds->clock)) {
158 dev_err(&pdev->dev, "failed to get clock for %s\n", name);
159 return PTR_ERR(lvds->clock);
160 }
161
162 return 0;
163 }
164
rcar_du_lvdsenc_init(struct rcar_du_device * rcdu)165 int rcar_du_lvdsenc_init(struct rcar_du_device *rcdu)
166 {
167 struct platform_device *pdev = to_platform_device(rcdu->dev);
168 struct rcar_du_lvdsenc *lvds;
169 unsigned int i;
170 int ret;
171
172 for (i = 0; i < rcdu->info->num_lvds; ++i) {
173 lvds = devm_kzalloc(&pdev->dev, sizeof(*lvds), GFP_KERNEL);
174 if (lvds == NULL) {
175 dev_err(&pdev->dev, "failed to allocate private data\n");
176 return -ENOMEM;
177 }
178
179 lvds->dev = rcdu;
180 lvds->index = i;
181 lvds->input = i ? RCAR_LVDS_INPUT_DU1 : RCAR_LVDS_INPUT_DU0;
182 lvds->enabled = false;
183
184 ret = rcar_du_lvdsenc_get_resources(lvds, pdev);
185 if (ret < 0)
186 return ret;
187
188 rcdu->lvds[i] = lvds;
189 }
190
191 return 0;
192 }
193