1 /* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/device.h>
17 #include <linux/io.h>
18 #include <linux/err.h>
19 #include <linux/slab.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/coresight.h>
22 #include <linux/amba/bus.h>
23 #include <linux/clk.h>
24
25 #include "coresight-priv.h"
26
27 #define TPIU_SUPP_PORTSZ 0x000
28 #define TPIU_CURR_PORTSZ 0x004
29 #define TPIU_SUPP_TRIGMODES 0x100
30 #define TPIU_TRIG_CNTRVAL 0x104
31 #define TPIU_TRIG_MULT 0x108
32 #define TPIU_SUPP_TESTPATM 0x200
33 #define TPIU_CURR_TESTPATM 0x204
34 #define TPIU_TEST_PATREPCNTR 0x208
35 #define TPIU_FFSR 0x300
36 #define TPIU_FFCR 0x304
37 #define TPIU_FSYNC_CNTR 0x308
38 #define TPIU_EXTCTL_INPORT 0x400
39 #define TPIU_EXTCTL_OUTPORT 0x404
40 #define TPIU_ITTRFLINACK 0xee4
41 #define TPIU_ITTRFLIN 0xee8
42 #define TPIU_ITATBDATA0 0xeec
43 #define TPIU_ITATBCTR2 0xef0
44 #define TPIU_ITATBCTR1 0xef4
45 #define TPIU_ITATBCTR0 0xef8
46
47 /** register definition **/
48 /* FFSR - 0x300 */
49 #define FFSR_FT_STOPPED_BIT 1
50 /* FFCR - 0x304 */
51 #define FFCR_FON_MAN_BIT 6
52 #define FFCR_FON_MAN BIT(6)
53 #define FFCR_STOP_FI BIT(12)
54
55 /**
56 * @base: memory mapped base address for this component.
57 * @dev: the device entity associated to this component.
58 * @atclk: optional clock for the core parts of the TPIU.
59 * @csdev: component vitals needed by the framework.
60 */
61 struct tpiu_drvdata {
62 void __iomem *base;
63 struct device *dev;
64 struct clk *atclk;
65 struct coresight_device *csdev;
66 };
67
tpiu_enable_hw(struct tpiu_drvdata * drvdata)68 static void tpiu_enable_hw(struct tpiu_drvdata *drvdata)
69 {
70 CS_UNLOCK(drvdata->base);
71
72 /* TODO: fill this up */
73
74 CS_LOCK(drvdata->base);
75 }
76
tpiu_enable(struct coresight_device * csdev)77 static int tpiu_enable(struct coresight_device *csdev)
78 {
79 struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
80
81 pm_runtime_get_sync(csdev->dev.parent);
82 tpiu_enable_hw(drvdata);
83
84 dev_info(drvdata->dev, "TPIU enabled\n");
85 return 0;
86 }
87
tpiu_disable_hw(struct tpiu_drvdata * drvdata)88 static void tpiu_disable_hw(struct tpiu_drvdata *drvdata)
89 {
90 CS_UNLOCK(drvdata->base);
91
92 /* Clear formatter and stop on flush */
93 writel_relaxed(FFCR_STOP_FI, drvdata->base + TPIU_FFCR);
94 /* Generate manual flush */
95 writel_relaxed(FFCR_STOP_FI | FFCR_FON_MAN, drvdata->base + TPIU_FFCR);
96 /* Wait for flush to complete */
97 coresight_timeout(drvdata->base, TPIU_FFCR, FFCR_FON_MAN_BIT, 0);
98 /* Wait for formatter to stop */
99 coresight_timeout(drvdata->base, TPIU_FFSR, FFSR_FT_STOPPED_BIT, 1);
100
101 CS_LOCK(drvdata->base);
102 }
103
tpiu_disable(struct coresight_device * csdev)104 static void tpiu_disable(struct coresight_device *csdev)
105 {
106 struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
107
108 tpiu_disable_hw(drvdata);
109 pm_runtime_put(csdev->dev.parent);
110
111 dev_info(drvdata->dev, "TPIU disabled\n");
112 }
113
114 static const struct coresight_ops_sink tpiu_sink_ops = {
115 .enable = tpiu_enable,
116 .disable = tpiu_disable,
117 };
118
119 static const struct coresight_ops tpiu_cs_ops = {
120 .sink_ops = &tpiu_sink_ops,
121 };
122
tpiu_probe(struct amba_device * adev,const struct amba_id * id)123 static int tpiu_probe(struct amba_device *adev, const struct amba_id *id)
124 {
125 int ret;
126 void __iomem *base;
127 struct device *dev = &adev->dev;
128 struct coresight_platform_data *pdata = NULL;
129 struct tpiu_drvdata *drvdata;
130 struct resource *res = &adev->res;
131 struct coresight_desc *desc;
132 struct device_node *np = adev->dev.of_node;
133
134 if (np) {
135 pdata = of_get_coresight_platform_data(dev, np);
136 if (IS_ERR(pdata))
137 return PTR_ERR(pdata);
138 adev->dev.platform_data = pdata;
139 }
140
141 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
142 if (!drvdata)
143 return -ENOMEM;
144
145 drvdata->dev = &adev->dev;
146 drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
147 if (!IS_ERR(drvdata->atclk)) {
148 ret = clk_prepare_enable(drvdata->atclk);
149 if (ret)
150 return ret;
151 }
152 dev_set_drvdata(dev, drvdata);
153
154 /* Validity for the resource is already checked by the AMBA core */
155 base = devm_ioremap_resource(dev, res);
156 if (IS_ERR(base))
157 return PTR_ERR(base);
158
159 drvdata->base = base;
160
161 /* Disable tpiu to support older devices */
162 tpiu_disable_hw(drvdata);
163
164 pm_runtime_put(&adev->dev);
165
166 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
167 if (!desc)
168 return -ENOMEM;
169
170 desc->type = CORESIGHT_DEV_TYPE_SINK;
171 desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT;
172 desc->ops = &tpiu_cs_ops;
173 desc->pdata = pdata;
174 desc->dev = dev;
175 drvdata->csdev = coresight_register(desc);
176 if (IS_ERR(drvdata->csdev))
177 return PTR_ERR(drvdata->csdev);
178
179 dev_info(dev, "TPIU initialized\n");
180 return 0;
181 }
182
183 #ifdef CONFIG_PM
tpiu_runtime_suspend(struct device * dev)184 static int tpiu_runtime_suspend(struct device *dev)
185 {
186 struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);
187
188 if (drvdata && !IS_ERR(drvdata->atclk))
189 clk_disable_unprepare(drvdata->atclk);
190
191 return 0;
192 }
193
tpiu_runtime_resume(struct device * dev)194 static int tpiu_runtime_resume(struct device *dev)
195 {
196 struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);
197
198 if (drvdata && !IS_ERR(drvdata->atclk))
199 clk_prepare_enable(drvdata->atclk);
200
201 return 0;
202 }
203 #endif
204
205 static const struct dev_pm_ops tpiu_dev_pm_ops = {
206 SET_RUNTIME_PM_OPS(tpiu_runtime_suspend, tpiu_runtime_resume, NULL)
207 };
208
209 static struct amba_id tpiu_ids[] = {
210 {
211 .id = 0x0003b912,
212 .mask = 0x0003ffff,
213 },
214 {
215 .id = 0x0004b912,
216 .mask = 0x0007ffff,
217 },
218 { 0, 0},
219 };
220
221 static struct amba_driver tpiu_driver = {
222 .drv = {
223 .name = "coresight-tpiu",
224 .owner = THIS_MODULE,
225 .pm = &tpiu_dev_pm_ops,
226 .suppress_bind_attrs = true,
227 },
228 .probe = tpiu_probe,
229 .id_table = tpiu_ids,
230 };
231
232 module_amba_driver(tpiu_driver);
233
234 MODULE_LICENSE("GPL v2");
235 MODULE_DESCRIPTION("CoreSight Trace Port Interface Unit driver");
236