1 /*
2 * Copyright (C) 2013 Oskar Andero <oskar.andero@gmail.com>
3 * Copyright (C) 2014 Rose Technology
4 * Allan Bendorff Jensen <abj@rosetechnology.dk>
5 * Soren Andersen <san@rosetechnology.dk>
6 *
7 * Driver for following ADC chips from Microchip Technology's:
8 * 10 Bit converter
9 * MCP3001
10 * MCP3002
11 * MCP3004
12 * MCP3008
13 * ------------
14 * 12 bit converter
15 * MCP3201
16 * MCP3202
17 * MCP3204
18 * MCP3208
19 * ------------
20 * 13 bit converter
21 * MCP3301
22 *
23 * Datasheet can be found here:
24 * http://ww1.microchip.com/downloads/en/DeviceDoc/21293C.pdf mcp3001
25 * http://ww1.microchip.com/downloads/en/DeviceDoc/21294E.pdf mcp3002
26 * http://ww1.microchip.com/downloads/en/DeviceDoc/21295d.pdf mcp3004/08
27 * http://ww1.microchip.com/downloads/en/DeviceDoc/21290D.pdf mcp3201
28 * http://ww1.microchip.com/downloads/en/DeviceDoc/21034D.pdf mcp3202
29 * http://ww1.microchip.com/downloads/en/DeviceDoc/21298c.pdf mcp3204/08
30 * http://ww1.microchip.com/downloads/en/DeviceDoc/21700E.pdf mcp3301
31 *
32 * This program is free software; you can redistribute it and/or modify
33 * it under the terms of the GNU General Public License version 2 as
34 * published by the Free Software Foundation.
35 */
36
37 #include <linux/err.h>
38 #include <linux/delay.h>
39 #include <linux/spi/spi.h>
40 #include <linux/module.h>
41 #include <linux/iio/iio.h>
42 #include <linux/regulator/consumer.h>
43
44 enum {
45 mcp3001,
46 mcp3002,
47 mcp3004,
48 mcp3008,
49 mcp3201,
50 mcp3202,
51 mcp3204,
52 mcp3208,
53 mcp3301,
54 };
55
56 struct mcp320x_chip_info {
57 const struct iio_chan_spec *channels;
58 unsigned int num_channels;
59 unsigned int resolution;
60 };
61
62 struct mcp320x {
63 struct spi_device *spi;
64 struct spi_message msg;
65 struct spi_transfer transfer[2];
66
67 struct regulator *reg;
68 struct mutex lock;
69 const struct mcp320x_chip_info *chip_info;
70
71 u8 tx_buf ____cacheline_aligned;
72 u8 rx_buf[2];
73 };
74
mcp320x_channel_to_tx_data(int device_index,const unsigned int channel,bool differential)75 static int mcp320x_channel_to_tx_data(int device_index,
76 const unsigned int channel, bool differential)
77 {
78 int start_bit = 1;
79
80 switch (device_index) {
81 case mcp3001:
82 case mcp3201:
83 case mcp3301:
84 return 0;
85 case mcp3002:
86 case mcp3202:
87 return ((start_bit << 4) | (!differential << 3) |
88 (channel << 2));
89 case mcp3004:
90 case mcp3204:
91 case mcp3008:
92 case mcp3208:
93 return ((start_bit << 6) | (!differential << 5) |
94 (channel << 2));
95 default:
96 return -EINVAL;
97 }
98 }
99
mcp320x_adc_conversion(struct mcp320x * adc,u8 channel,bool differential,int device_index,int * val)100 static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel,
101 bool differential, int device_index, int *val)
102 {
103 int ret;
104
105 adc->rx_buf[0] = 0;
106 adc->rx_buf[1] = 0;
107 adc->tx_buf = mcp320x_channel_to_tx_data(device_index,
108 channel, differential);
109
110 if (device_index != mcp3001 && device_index != mcp3201 && device_index != mcp3301) {
111 ret = spi_sync(adc->spi, &adc->msg);
112 if (ret < 0)
113 return ret;
114 } else {
115 ret = spi_read(adc->spi, &adc->rx_buf, sizeof(adc->rx_buf));
116 if (ret < 0)
117 return ret;
118 }
119
120 switch (device_index) {
121 case mcp3001:
122 *val = (adc->rx_buf[0] << 5 | adc->rx_buf[1] >> 3);
123 return 0;
124 case mcp3002:
125 case mcp3004:
126 case mcp3008:
127 *val = (adc->rx_buf[0] << 2 | adc->rx_buf[1] >> 6);
128 return 0;
129 case mcp3201:
130 *val = (adc->rx_buf[0] << 7 | adc->rx_buf[1] >> 1);
131 return 0;
132 case mcp3202:
133 case mcp3204:
134 case mcp3208:
135 *val = (adc->rx_buf[0] << 4 | adc->rx_buf[1] >> 4);
136 return 0;
137 case mcp3301:
138 *val = sign_extend32((adc->rx_buf[0] & 0x1f) << 8
139 | adc->rx_buf[1], 12);
140 return 0;
141 default:
142 return -EINVAL;
143 }
144 }
145
mcp320x_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * channel,int * val,int * val2,long mask)146 static int mcp320x_read_raw(struct iio_dev *indio_dev,
147 struct iio_chan_spec const *channel, int *val,
148 int *val2, long mask)
149 {
150 struct mcp320x *adc = iio_priv(indio_dev);
151 int ret = -EINVAL;
152 int device_index = 0;
153
154 mutex_lock(&adc->lock);
155
156 device_index = spi_get_device_id(adc->spi)->driver_data;
157
158 switch (mask) {
159 case IIO_CHAN_INFO_RAW:
160 ret = mcp320x_adc_conversion(adc, channel->address,
161 channel->differential, device_index, val);
162 if (ret < 0)
163 goto out;
164
165 ret = IIO_VAL_INT;
166 break;
167
168 case IIO_CHAN_INFO_SCALE:
169 ret = regulator_get_voltage(adc->reg);
170 if (ret < 0)
171 goto out;
172
173 /* convert regulator output voltage to mV */
174 *val = ret / 1000;
175 *val2 = adc->chip_info->resolution;
176 ret = IIO_VAL_FRACTIONAL_LOG2;
177 break;
178 }
179
180 out:
181 mutex_unlock(&adc->lock);
182
183 return ret;
184 }
185
186 #define MCP320X_VOLTAGE_CHANNEL(num) \
187 { \
188 .type = IIO_VOLTAGE, \
189 .indexed = 1, \
190 .channel = (num), \
191 .address = (num), \
192 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
193 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
194 }
195
196 #define MCP320X_VOLTAGE_CHANNEL_DIFF(num) \
197 { \
198 .type = IIO_VOLTAGE, \
199 .indexed = 1, \
200 .channel = (num * 2), \
201 .channel2 = (num * 2 + 1), \
202 .address = (num * 2), \
203 .differential = 1, \
204 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
205 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
206 }
207
208 static const struct iio_chan_spec mcp3201_channels[] = {
209 MCP320X_VOLTAGE_CHANNEL_DIFF(0),
210 };
211
212 static const struct iio_chan_spec mcp3202_channels[] = {
213 MCP320X_VOLTAGE_CHANNEL(0),
214 MCP320X_VOLTAGE_CHANNEL(1),
215 MCP320X_VOLTAGE_CHANNEL_DIFF(0),
216 };
217
218 static const struct iio_chan_spec mcp3204_channels[] = {
219 MCP320X_VOLTAGE_CHANNEL(0),
220 MCP320X_VOLTAGE_CHANNEL(1),
221 MCP320X_VOLTAGE_CHANNEL(2),
222 MCP320X_VOLTAGE_CHANNEL(3),
223 MCP320X_VOLTAGE_CHANNEL_DIFF(0),
224 MCP320X_VOLTAGE_CHANNEL_DIFF(1),
225 };
226
227 static const struct iio_chan_spec mcp3208_channels[] = {
228 MCP320X_VOLTAGE_CHANNEL(0),
229 MCP320X_VOLTAGE_CHANNEL(1),
230 MCP320X_VOLTAGE_CHANNEL(2),
231 MCP320X_VOLTAGE_CHANNEL(3),
232 MCP320X_VOLTAGE_CHANNEL(4),
233 MCP320X_VOLTAGE_CHANNEL(5),
234 MCP320X_VOLTAGE_CHANNEL(6),
235 MCP320X_VOLTAGE_CHANNEL(7),
236 MCP320X_VOLTAGE_CHANNEL_DIFF(0),
237 MCP320X_VOLTAGE_CHANNEL_DIFF(1),
238 MCP320X_VOLTAGE_CHANNEL_DIFF(2),
239 MCP320X_VOLTAGE_CHANNEL_DIFF(3),
240 };
241
242 static const struct iio_info mcp320x_info = {
243 .read_raw = mcp320x_read_raw,
244 .driver_module = THIS_MODULE,
245 };
246
247 static const struct mcp320x_chip_info mcp320x_chip_infos[] = {
248 [mcp3001] = {
249 .channels = mcp3201_channels,
250 .num_channels = ARRAY_SIZE(mcp3201_channels),
251 .resolution = 10
252 },
253 [mcp3002] = {
254 .channels = mcp3202_channels,
255 .num_channels = ARRAY_SIZE(mcp3202_channels),
256 .resolution = 10
257 },
258 [mcp3004] = {
259 .channels = mcp3204_channels,
260 .num_channels = ARRAY_SIZE(mcp3204_channels),
261 .resolution = 10
262 },
263 [mcp3008] = {
264 .channels = mcp3208_channels,
265 .num_channels = ARRAY_SIZE(mcp3208_channels),
266 .resolution = 10
267 },
268 [mcp3201] = {
269 .channels = mcp3201_channels,
270 .num_channels = ARRAY_SIZE(mcp3201_channels),
271 .resolution = 12
272 },
273 [mcp3202] = {
274 .channels = mcp3202_channels,
275 .num_channels = ARRAY_SIZE(mcp3202_channels),
276 .resolution = 12
277 },
278 [mcp3204] = {
279 .channels = mcp3204_channels,
280 .num_channels = ARRAY_SIZE(mcp3204_channels),
281 .resolution = 12
282 },
283 [mcp3208] = {
284 .channels = mcp3208_channels,
285 .num_channels = ARRAY_SIZE(mcp3208_channels),
286 .resolution = 12
287 },
288 [mcp3301] = {
289 .channels = mcp3201_channels,
290 .num_channels = ARRAY_SIZE(mcp3201_channels),
291 .resolution = 13
292 },
293 };
294
mcp320x_probe(struct spi_device * spi)295 static int mcp320x_probe(struct spi_device *spi)
296 {
297 struct iio_dev *indio_dev;
298 struct mcp320x *adc;
299 const struct mcp320x_chip_info *chip_info;
300 int ret;
301
302 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
303 if (!indio_dev)
304 return -ENOMEM;
305
306 adc = iio_priv(indio_dev);
307 adc->spi = spi;
308
309 indio_dev->dev.parent = &spi->dev;
310 indio_dev->name = spi_get_device_id(spi)->name;
311 indio_dev->modes = INDIO_DIRECT_MODE;
312 indio_dev->info = &mcp320x_info;
313 spi_set_drvdata(spi, indio_dev);
314
315 chip_info = &mcp320x_chip_infos[spi_get_device_id(spi)->driver_data];
316 indio_dev->channels = chip_info->channels;
317 indio_dev->num_channels = chip_info->num_channels;
318
319 adc->chip_info = chip_info;
320
321 adc->transfer[0].tx_buf = &adc->tx_buf;
322 adc->transfer[0].len = sizeof(adc->tx_buf);
323 adc->transfer[1].rx_buf = adc->rx_buf;
324 adc->transfer[1].len = sizeof(adc->rx_buf);
325
326 spi_message_init_with_transfers(&adc->msg, adc->transfer,
327 ARRAY_SIZE(adc->transfer));
328
329 adc->reg = devm_regulator_get(&spi->dev, "vref");
330 if (IS_ERR(adc->reg))
331 return PTR_ERR(adc->reg);
332
333 ret = regulator_enable(adc->reg);
334 if (ret < 0)
335 return ret;
336
337 mutex_init(&adc->lock);
338
339 ret = iio_device_register(indio_dev);
340 if (ret < 0)
341 goto reg_disable;
342
343 return 0;
344
345 reg_disable:
346 regulator_disable(adc->reg);
347
348 return ret;
349 }
350
mcp320x_remove(struct spi_device * spi)351 static int mcp320x_remove(struct spi_device *spi)
352 {
353 struct iio_dev *indio_dev = spi_get_drvdata(spi);
354 struct mcp320x *adc = iio_priv(indio_dev);
355
356 iio_device_unregister(indio_dev);
357 regulator_disable(adc->reg);
358
359 return 0;
360 }
361
362 #if defined(CONFIG_OF)
363 static const struct of_device_id mcp320x_dt_ids[] = {
364 {
365 .compatible = "mcp3001",
366 .data = &mcp320x_chip_infos[mcp3001],
367 }, {
368 .compatible = "mcp3002",
369 .data = &mcp320x_chip_infos[mcp3002],
370 }, {
371 .compatible = "mcp3004",
372 .data = &mcp320x_chip_infos[mcp3004],
373 }, {
374 .compatible = "mcp3008",
375 .data = &mcp320x_chip_infos[mcp3008],
376 }, {
377 .compatible = "mcp3201",
378 .data = &mcp320x_chip_infos[mcp3201],
379 }, {
380 .compatible = "mcp3202",
381 .data = &mcp320x_chip_infos[mcp3202],
382 }, {
383 .compatible = "mcp3204",
384 .data = &mcp320x_chip_infos[mcp3204],
385 }, {
386 .compatible = "mcp3208",
387 .data = &mcp320x_chip_infos[mcp3208],
388 }, {
389 .compatible = "mcp3301",
390 .data = &mcp320x_chip_infos[mcp3301],
391 }, {
392 }
393 };
394 MODULE_DEVICE_TABLE(of, mcp320x_dt_ids);
395 #endif
396
397 static const struct spi_device_id mcp320x_id[] = {
398 { "mcp3001", mcp3001 },
399 { "mcp3002", mcp3002 },
400 { "mcp3004", mcp3004 },
401 { "mcp3008", mcp3008 },
402 { "mcp3201", mcp3201 },
403 { "mcp3202", mcp3202 },
404 { "mcp3204", mcp3204 },
405 { "mcp3208", mcp3208 },
406 { "mcp3301", mcp3301 },
407 { }
408 };
409 MODULE_DEVICE_TABLE(spi, mcp320x_id);
410
411 static struct spi_driver mcp320x_driver = {
412 .driver = {
413 .name = "mcp320x",
414 .of_match_table = of_match_ptr(mcp320x_dt_ids),
415 },
416 .probe = mcp320x_probe,
417 .remove = mcp320x_remove,
418 .id_table = mcp320x_id,
419 };
420 module_spi_driver(mcp320x_driver);
421
422 MODULE_AUTHOR("Oskar Andero <oskar.andero@gmail.com>");
423 MODULE_DESCRIPTION("Microchip Technology MCP3x01/02/04/08");
424 MODULE_LICENSE("GPL v2");
425