1 /*
2 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32 #include <linux/module.h>
33 #include <linux/moduleparam.h>
34 #include <linux/debugfs.h>
35 #include <linux/vmalloc.h>
36 #include <linux/math64.h>
37
38 #include <rdma/ib_verbs.h>
39
40 #include "iw_cxgb4.h"
41
42 #define DRV_VERSION "0.1"
43
44 MODULE_AUTHOR("Steve Wise");
45 MODULE_DESCRIPTION("Chelsio T4/T5 RDMA Driver");
46 MODULE_LICENSE("Dual BSD/GPL");
47 MODULE_VERSION(DRV_VERSION);
48
49 static int allow_db_fc_on_t5;
50 module_param(allow_db_fc_on_t5, int, 0644);
51 MODULE_PARM_DESC(allow_db_fc_on_t5,
52 "Allow DB Flow Control on T5 (default = 0)");
53
54 static int allow_db_coalescing_on_t5;
55 module_param(allow_db_coalescing_on_t5, int, 0644);
56 MODULE_PARM_DESC(allow_db_coalescing_on_t5,
57 "Allow DB Coalescing on T5 (default = 0)");
58
59 int c4iw_wr_log = 0;
60 module_param(c4iw_wr_log, int, 0444);
61 MODULE_PARM_DESC(c4iw_wr_log, "Enables logging of work request timing data.");
62
63 static int c4iw_wr_log_size_order = 12;
64 module_param(c4iw_wr_log_size_order, int, 0444);
65 MODULE_PARM_DESC(c4iw_wr_log_size_order,
66 "Number of entries (log2) in the work request timing log.");
67
68 struct uld_ctx {
69 struct list_head entry;
70 struct cxgb4_lld_info lldi;
71 struct c4iw_dev *dev;
72 };
73
74 static LIST_HEAD(uld_ctx_list);
75 static DEFINE_MUTEX(dev_mutex);
76
77 #define DB_FC_RESUME_SIZE 64
78 #define DB_FC_RESUME_DELAY 1
79 #define DB_FC_DRAIN_THRESH 0
80
81 static struct dentry *c4iw_debugfs_root;
82
83 struct c4iw_debugfs_data {
84 struct c4iw_dev *devp;
85 char *buf;
86 int bufsize;
87 int pos;
88 };
89
90 /* registered cxgb4 netlink callbacks */
91 static struct ibnl_client_cbs c4iw_nl_cb_table[] = {
92 [RDMA_NL_IWPM_REG_PID] = {.dump = iwpm_register_pid_cb},
93 [RDMA_NL_IWPM_ADD_MAPPING] = {.dump = iwpm_add_mapping_cb},
94 [RDMA_NL_IWPM_QUERY_MAPPING] = {.dump = iwpm_add_and_query_mapping_cb},
95 [RDMA_NL_IWPM_HANDLE_ERR] = {.dump = iwpm_mapping_error_cb},
96 [RDMA_NL_IWPM_REMOTE_INFO] = {.dump = iwpm_remote_info_cb},
97 [RDMA_NL_IWPM_MAPINFO] = {.dump = iwpm_mapping_info_cb},
98 [RDMA_NL_IWPM_MAPINFO_NUM] = {.dump = iwpm_ack_mapping_info_cb}
99 };
100
count_idrs(int id,void * p,void * data)101 static int count_idrs(int id, void *p, void *data)
102 {
103 int *countp = data;
104
105 *countp = *countp + 1;
106 return 0;
107 }
108
debugfs_read(struct file * file,char __user * buf,size_t count,loff_t * ppos)109 static ssize_t debugfs_read(struct file *file, char __user *buf, size_t count,
110 loff_t *ppos)
111 {
112 struct c4iw_debugfs_data *d = file->private_data;
113
114 return simple_read_from_buffer(buf, count, ppos, d->buf, d->pos);
115 }
116
c4iw_log_wr_stats(struct t4_wq * wq,struct t4_cqe * cqe)117 void c4iw_log_wr_stats(struct t4_wq *wq, struct t4_cqe *cqe)
118 {
119 struct wr_log_entry le;
120 int idx;
121
122 if (!wq->rdev->wr_log)
123 return;
124
125 idx = (atomic_inc_return(&wq->rdev->wr_log_idx) - 1) &
126 (wq->rdev->wr_log_size - 1);
127 le.poll_sge_ts = cxgb4_read_sge_timestamp(wq->rdev->lldi.ports[0]);
128 getnstimeofday(&le.poll_host_ts);
129 le.valid = 1;
130 le.cqe_sge_ts = CQE_TS(cqe);
131 if (SQ_TYPE(cqe)) {
132 le.qid = wq->sq.qid;
133 le.opcode = CQE_OPCODE(cqe);
134 le.post_host_ts = wq->sq.sw_sq[wq->sq.cidx].host_ts;
135 le.post_sge_ts = wq->sq.sw_sq[wq->sq.cidx].sge_ts;
136 le.wr_id = CQE_WRID_SQ_IDX(cqe);
137 } else {
138 le.qid = wq->rq.qid;
139 le.opcode = FW_RI_RECEIVE;
140 le.post_host_ts = wq->rq.sw_rq[wq->rq.cidx].host_ts;
141 le.post_sge_ts = wq->rq.sw_rq[wq->rq.cidx].sge_ts;
142 le.wr_id = CQE_WRID_MSN(cqe);
143 }
144 wq->rdev->wr_log[idx] = le;
145 }
146
wr_log_show(struct seq_file * seq,void * v)147 static int wr_log_show(struct seq_file *seq, void *v)
148 {
149 struct c4iw_dev *dev = seq->private;
150 struct timespec prev_ts = {0, 0};
151 struct wr_log_entry *lep;
152 int prev_ts_set = 0;
153 int idx, end;
154
155 #define ts2ns(ts) div64_u64((ts) * dev->rdev.lldi.cclk_ps, 1000)
156
157 idx = atomic_read(&dev->rdev.wr_log_idx) &
158 (dev->rdev.wr_log_size - 1);
159 end = idx - 1;
160 if (end < 0)
161 end = dev->rdev.wr_log_size - 1;
162 lep = &dev->rdev.wr_log[idx];
163 while (idx != end) {
164 if (lep->valid) {
165 if (!prev_ts_set) {
166 prev_ts_set = 1;
167 prev_ts = lep->poll_host_ts;
168 }
169 seq_printf(seq, "%04u: sec %lu nsec %lu qid %u opcode "
170 "%u %s 0x%x host_wr_delta sec %lu nsec %lu "
171 "post_sge_ts 0x%llx cqe_sge_ts 0x%llx "
172 "poll_sge_ts 0x%llx post_poll_delta_ns %llu "
173 "cqe_poll_delta_ns %llu\n",
174 idx,
175 timespec_sub(lep->poll_host_ts,
176 prev_ts).tv_sec,
177 timespec_sub(lep->poll_host_ts,
178 prev_ts).tv_nsec,
179 lep->qid, lep->opcode,
180 lep->opcode == FW_RI_RECEIVE ?
181 "msn" : "wrid",
182 lep->wr_id,
183 timespec_sub(lep->poll_host_ts,
184 lep->post_host_ts).tv_sec,
185 timespec_sub(lep->poll_host_ts,
186 lep->post_host_ts).tv_nsec,
187 lep->post_sge_ts, lep->cqe_sge_ts,
188 lep->poll_sge_ts,
189 ts2ns(lep->poll_sge_ts - lep->post_sge_ts),
190 ts2ns(lep->poll_sge_ts - lep->cqe_sge_ts));
191 prev_ts = lep->poll_host_ts;
192 }
193 idx++;
194 if (idx > (dev->rdev.wr_log_size - 1))
195 idx = 0;
196 lep = &dev->rdev.wr_log[idx];
197 }
198 #undef ts2ns
199 return 0;
200 }
201
wr_log_open(struct inode * inode,struct file * file)202 static int wr_log_open(struct inode *inode, struct file *file)
203 {
204 return single_open(file, wr_log_show, inode->i_private);
205 }
206
wr_log_clear(struct file * file,const char __user * buf,size_t count,loff_t * pos)207 static ssize_t wr_log_clear(struct file *file, const char __user *buf,
208 size_t count, loff_t *pos)
209 {
210 struct c4iw_dev *dev = ((struct seq_file *)file->private_data)->private;
211 int i;
212
213 if (dev->rdev.wr_log)
214 for (i = 0; i < dev->rdev.wr_log_size; i++)
215 dev->rdev.wr_log[i].valid = 0;
216 return count;
217 }
218
219 static const struct file_operations wr_log_debugfs_fops = {
220 .owner = THIS_MODULE,
221 .open = wr_log_open,
222 .release = single_release,
223 .read = seq_read,
224 .llseek = seq_lseek,
225 .write = wr_log_clear,
226 };
227
dump_qp(int id,void * p,void * data)228 static int dump_qp(int id, void *p, void *data)
229 {
230 struct c4iw_qp *qp = p;
231 struct c4iw_debugfs_data *qpd = data;
232 int space;
233 int cc;
234
235 if (id != qp->wq.sq.qid)
236 return 0;
237
238 space = qpd->bufsize - qpd->pos - 1;
239 if (space == 0)
240 return 1;
241
242 if (qp->ep) {
243 if (qp->ep->com.local_addr.ss_family == AF_INET) {
244 struct sockaddr_in *lsin = (struct sockaddr_in *)
245 &qp->ep->com.local_addr;
246 struct sockaddr_in *rsin = (struct sockaddr_in *)
247 &qp->ep->com.remote_addr;
248 struct sockaddr_in *mapped_lsin = (struct sockaddr_in *)
249 &qp->ep->com.mapped_local_addr;
250 struct sockaddr_in *mapped_rsin = (struct sockaddr_in *)
251 &qp->ep->com.mapped_remote_addr;
252
253 cc = snprintf(qpd->buf + qpd->pos, space,
254 "rc qp sq id %u rq id %u state %u "
255 "onchip %u ep tid %u state %u "
256 "%pI4:%u/%u->%pI4:%u/%u\n",
257 qp->wq.sq.qid, qp->wq.rq.qid,
258 (int)qp->attr.state,
259 qp->wq.sq.flags & T4_SQ_ONCHIP,
260 qp->ep->hwtid, (int)qp->ep->com.state,
261 &lsin->sin_addr, ntohs(lsin->sin_port),
262 ntohs(mapped_lsin->sin_port),
263 &rsin->sin_addr, ntohs(rsin->sin_port),
264 ntohs(mapped_rsin->sin_port));
265 } else {
266 struct sockaddr_in6 *lsin6 = (struct sockaddr_in6 *)
267 &qp->ep->com.local_addr;
268 struct sockaddr_in6 *rsin6 = (struct sockaddr_in6 *)
269 &qp->ep->com.remote_addr;
270 struct sockaddr_in6 *mapped_lsin6 =
271 (struct sockaddr_in6 *)
272 &qp->ep->com.mapped_local_addr;
273 struct sockaddr_in6 *mapped_rsin6 =
274 (struct sockaddr_in6 *)
275 &qp->ep->com.mapped_remote_addr;
276
277 cc = snprintf(qpd->buf + qpd->pos, space,
278 "rc qp sq id %u rq id %u state %u "
279 "onchip %u ep tid %u state %u "
280 "%pI6:%u/%u->%pI6:%u/%u\n",
281 qp->wq.sq.qid, qp->wq.rq.qid,
282 (int)qp->attr.state,
283 qp->wq.sq.flags & T4_SQ_ONCHIP,
284 qp->ep->hwtid, (int)qp->ep->com.state,
285 &lsin6->sin6_addr,
286 ntohs(lsin6->sin6_port),
287 ntohs(mapped_lsin6->sin6_port),
288 &rsin6->sin6_addr,
289 ntohs(rsin6->sin6_port),
290 ntohs(mapped_rsin6->sin6_port));
291 }
292 } else
293 cc = snprintf(qpd->buf + qpd->pos, space,
294 "qp sq id %u rq id %u state %u onchip %u\n",
295 qp->wq.sq.qid, qp->wq.rq.qid,
296 (int)qp->attr.state,
297 qp->wq.sq.flags & T4_SQ_ONCHIP);
298 if (cc < space)
299 qpd->pos += cc;
300 return 0;
301 }
302
qp_release(struct inode * inode,struct file * file)303 static int qp_release(struct inode *inode, struct file *file)
304 {
305 struct c4iw_debugfs_data *qpd = file->private_data;
306 if (!qpd) {
307 printk(KERN_INFO "%s null qpd?\n", __func__);
308 return 0;
309 }
310 vfree(qpd->buf);
311 kfree(qpd);
312 return 0;
313 }
314
qp_open(struct inode * inode,struct file * file)315 static int qp_open(struct inode *inode, struct file *file)
316 {
317 struct c4iw_debugfs_data *qpd;
318 int ret = 0;
319 int count = 1;
320
321 qpd = kmalloc(sizeof *qpd, GFP_KERNEL);
322 if (!qpd) {
323 ret = -ENOMEM;
324 goto out;
325 }
326 qpd->devp = inode->i_private;
327 qpd->pos = 0;
328
329 spin_lock_irq(&qpd->devp->lock);
330 idr_for_each(&qpd->devp->qpidr, count_idrs, &count);
331 spin_unlock_irq(&qpd->devp->lock);
332
333 qpd->bufsize = count * 128;
334 qpd->buf = vmalloc(qpd->bufsize);
335 if (!qpd->buf) {
336 ret = -ENOMEM;
337 goto err1;
338 }
339
340 spin_lock_irq(&qpd->devp->lock);
341 idr_for_each(&qpd->devp->qpidr, dump_qp, qpd);
342 spin_unlock_irq(&qpd->devp->lock);
343
344 qpd->buf[qpd->pos++] = 0;
345 file->private_data = qpd;
346 goto out;
347 err1:
348 kfree(qpd);
349 out:
350 return ret;
351 }
352
353 static const struct file_operations qp_debugfs_fops = {
354 .owner = THIS_MODULE,
355 .open = qp_open,
356 .release = qp_release,
357 .read = debugfs_read,
358 .llseek = default_llseek,
359 };
360
dump_stag(int id,void * p,void * data)361 static int dump_stag(int id, void *p, void *data)
362 {
363 struct c4iw_debugfs_data *stagd = data;
364 int space;
365 int cc;
366 struct fw_ri_tpte tpte;
367 int ret;
368
369 space = stagd->bufsize - stagd->pos - 1;
370 if (space == 0)
371 return 1;
372
373 ret = cxgb4_read_tpte(stagd->devp->rdev.lldi.ports[0], (u32)id<<8,
374 (__be32 *)&tpte);
375 if (ret) {
376 dev_err(&stagd->devp->rdev.lldi.pdev->dev,
377 "%s cxgb4_read_tpte err %d\n", __func__, ret);
378 return ret;
379 }
380 cc = snprintf(stagd->buf + stagd->pos, space,
381 "stag: idx 0x%x valid %d key 0x%x state %d pdid %d "
382 "perm 0x%x ps %d len 0x%llx va 0x%llx\n",
383 (u32)id<<8,
384 FW_RI_TPTE_VALID_G(ntohl(tpte.valid_to_pdid)),
385 FW_RI_TPTE_STAGKEY_G(ntohl(tpte.valid_to_pdid)),
386 FW_RI_TPTE_STAGSTATE_G(ntohl(tpte.valid_to_pdid)),
387 FW_RI_TPTE_PDID_G(ntohl(tpte.valid_to_pdid)),
388 FW_RI_TPTE_PERM_G(ntohl(tpte.locread_to_qpid)),
389 FW_RI_TPTE_PS_G(ntohl(tpte.locread_to_qpid)),
390 ((u64)ntohl(tpte.len_hi) << 32) | ntohl(tpte.len_lo),
391 ((u64)ntohl(tpte.va_hi) << 32) | ntohl(tpte.va_lo_fbo));
392 if (cc < space)
393 stagd->pos += cc;
394 return 0;
395 }
396
stag_release(struct inode * inode,struct file * file)397 static int stag_release(struct inode *inode, struct file *file)
398 {
399 struct c4iw_debugfs_data *stagd = file->private_data;
400 if (!stagd) {
401 printk(KERN_INFO "%s null stagd?\n", __func__);
402 return 0;
403 }
404 vfree(stagd->buf);
405 kfree(stagd);
406 return 0;
407 }
408
stag_open(struct inode * inode,struct file * file)409 static int stag_open(struct inode *inode, struct file *file)
410 {
411 struct c4iw_debugfs_data *stagd;
412 int ret = 0;
413 int count = 1;
414
415 stagd = kmalloc(sizeof *stagd, GFP_KERNEL);
416 if (!stagd) {
417 ret = -ENOMEM;
418 goto out;
419 }
420 stagd->devp = inode->i_private;
421 stagd->pos = 0;
422
423 spin_lock_irq(&stagd->devp->lock);
424 idr_for_each(&stagd->devp->mmidr, count_idrs, &count);
425 spin_unlock_irq(&stagd->devp->lock);
426
427 stagd->bufsize = count * 256;
428 stagd->buf = vmalloc(stagd->bufsize);
429 if (!stagd->buf) {
430 ret = -ENOMEM;
431 goto err1;
432 }
433
434 spin_lock_irq(&stagd->devp->lock);
435 idr_for_each(&stagd->devp->mmidr, dump_stag, stagd);
436 spin_unlock_irq(&stagd->devp->lock);
437
438 stagd->buf[stagd->pos++] = 0;
439 file->private_data = stagd;
440 goto out;
441 err1:
442 kfree(stagd);
443 out:
444 return ret;
445 }
446
447 static const struct file_operations stag_debugfs_fops = {
448 .owner = THIS_MODULE,
449 .open = stag_open,
450 .release = stag_release,
451 .read = debugfs_read,
452 .llseek = default_llseek,
453 };
454
455 static char *db_state_str[] = {"NORMAL", "FLOW_CONTROL", "RECOVERY", "STOPPED"};
456
stats_show(struct seq_file * seq,void * v)457 static int stats_show(struct seq_file *seq, void *v)
458 {
459 struct c4iw_dev *dev = seq->private;
460
461 seq_printf(seq, " Object: %10s %10s %10s %10s\n", "Total", "Current",
462 "Max", "Fail");
463 seq_printf(seq, " PDID: %10llu %10llu %10llu %10llu\n",
464 dev->rdev.stats.pd.total, dev->rdev.stats.pd.cur,
465 dev->rdev.stats.pd.max, dev->rdev.stats.pd.fail);
466 seq_printf(seq, " QID: %10llu %10llu %10llu %10llu\n",
467 dev->rdev.stats.qid.total, dev->rdev.stats.qid.cur,
468 dev->rdev.stats.qid.max, dev->rdev.stats.qid.fail);
469 seq_printf(seq, " TPTMEM: %10llu %10llu %10llu %10llu\n",
470 dev->rdev.stats.stag.total, dev->rdev.stats.stag.cur,
471 dev->rdev.stats.stag.max, dev->rdev.stats.stag.fail);
472 seq_printf(seq, " PBLMEM: %10llu %10llu %10llu %10llu\n",
473 dev->rdev.stats.pbl.total, dev->rdev.stats.pbl.cur,
474 dev->rdev.stats.pbl.max, dev->rdev.stats.pbl.fail);
475 seq_printf(seq, " RQTMEM: %10llu %10llu %10llu %10llu\n",
476 dev->rdev.stats.rqt.total, dev->rdev.stats.rqt.cur,
477 dev->rdev.stats.rqt.max, dev->rdev.stats.rqt.fail);
478 seq_printf(seq, " OCQPMEM: %10llu %10llu %10llu %10llu\n",
479 dev->rdev.stats.ocqp.total, dev->rdev.stats.ocqp.cur,
480 dev->rdev.stats.ocqp.max, dev->rdev.stats.ocqp.fail);
481 seq_printf(seq, " DB FULL: %10llu\n", dev->rdev.stats.db_full);
482 seq_printf(seq, " DB EMPTY: %10llu\n", dev->rdev.stats.db_empty);
483 seq_printf(seq, " DB DROP: %10llu\n", dev->rdev.stats.db_drop);
484 seq_printf(seq, " DB State: %s Transitions %llu FC Interruptions %llu\n",
485 db_state_str[dev->db_state],
486 dev->rdev.stats.db_state_transitions,
487 dev->rdev.stats.db_fc_interruptions);
488 seq_printf(seq, "TCAM_FULL: %10llu\n", dev->rdev.stats.tcam_full);
489 seq_printf(seq, "ACT_OFLD_CONN_FAILS: %10llu\n",
490 dev->rdev.stats.act_ofld_conn_fails);
491 seq_printf(seq, "PAS_OFLD_CONN_FAILS: %10llu\n",
492 dev->rdev.stats.pas_ofld_conn_fails);
493 seq_printf(seq, "NEG_ADV_RCVD: %10llu\n", dev->rdev.stats.neg_adv);
494 seq_printf(seq, "AVAILABLE IRD: %10u\n", dev->avail_ird);
495 return 0;
496 }
497
stats_open(struct inode * inode,struct file * file)498 static int stats_open(struct inode *inode, struct file *file)
499 {
500 return single_open(file, stats_show, inode->i_private);
501 }
502
stats_clear(struct file * file,const char __user * buf,size_t count,loff_t * pos)503 static ssize_t stats_clear(struct file *file, const char __user *buf,
504 size_t count, loff_t *pos)
505 {
506 struct c4iw_dev *dev = ((struct seq_file *)file->private_data)->private;
507
508 mutex_lock(&dev->rdev.stats.lock);
509 dev->rdev.stats.pd.max = 0;
510 dev->rdev.stats.pd.fail = 0;
511 dev->rdev.stats.qid.max = 0;
512 dev->rdev.stats.qid.fail = 0;
513 dev->rdev.stats.stag.max = 0;
514 dev->rdev.stats.stag.fail = 0;
515 dev->rdev.stats.pbl.max = 0;
516 dev->rdev.stats.pbl.fail = 0;
517 dev->rdev.stats.rqt.max = 0;
518 dev->rdev.stats.rqt.fail = 0;
519 dev->rdev.stats.ocqp.max = 0;
520 dev->rdev.stats.ocqp.fail = 0;
521 dev->rdev.stats.db_full = 0;
522 dev->rdev.stats.db_empty = 0;
523 dev->rdev.stats.db_drop = 0;
524 dev->rdev.stats.db_state_transitions = 0;
525 dev->rdev.stats.tcam_full = 0;
526 dev->rdev.stats.act_ofld_conn_fails = 0;
527 dev->rdev.stats.pas_ofld_conn_fails = 0;
528 mutex_unlock(&dev->rdev.stats.lock);
529 return count;
530 }
531
532 static const struct file_operations stats_debugfs_fops = {
533 .owner = THIS_MODULE,
534 .open = stats_open,
535 .release = single_release,
536 .read = seq_read,
537 .llseek = seq_lseek,
538 .write = stats_clear,
539 };
540
dump_ep(int id,void * p,void * data)541 static int dump_ep(int id, void *p, void *data)
542 {
543 struct c4iw_ep *ep = p;
544 struct c4iw_debugfs_data *epd = data;
545 int space;
546 int cc;
547
548 space = epd->bufsize - epd->pos - 1;
549 if (space == 0)
550 return 1;
551
552 if (ep->com.local_addr.ss_family == AF_INET) {
553 struct sockaddr_in *lsin = (struct sockaddr_in *)
554 &ep->com.local_addr;
555 struct sockaddr_in *rsin = (struct sockaddr_in *)
556 &ep->com.remote_addr;
557 struct sockaddr_in *mapped_lsin = (struct sockaddr_in *)
558 &ep->com.mapped_local_addr;
559 struct sockaddr_in *mapped_rsin = (struct sockaddr_in *)
560 &ep->com.mapped_remote_addr;
561
562 cc = snprintf(epd->buf + epd->pos, space,
563 "ep %p cm_id %p qp %p state %d flags 0x%lx "
564 "history 0x%lx hwtid %d atid %d "
565 "conn_na %u abort_na %u "
566 "%pI4:%d/%d <-> %pI4:%d/%d\n",
567 ep, ep->com.cm_id, ep->com.qp,
568 (int)ep->com.state, ep->com.flags,
569 ep->com.history, ep->hwtid, ep->atid,
570 ep->stats.connect_neg_adv,
571 ep->stats.abort_neg_adv,
572 &lsin->sin_addr, ntohs(lsin->sin_port),
573 ntohs(mapped_lsin->sin_port),
574 &rsin->sin_addr, ntohs(rsin->sin_port),
575 ntohs(mapped_rsin->sin_port));
576 } else {
577 struct sockaddr_in6 *lsin6 = (struct sockaddr_in6 *)
578 &ep->com.local_addr;
579 struct sockaddr_in6 *rsin6 = (struct sockaddr_in6 *)
580 &ep->com.remote_addr;
581 struct sockaddr_in6 *mapped_lsin6 = (struct sockaddr_in6 *)
582 &ep->com.mapped_local_addr;
583 struct sockaddr_in6 *mapped_rsin6 = (struct sockaddr_in6 *)
584 &ep->com.mapped_remote_addr;
585
586 cc = snprintf(epd->buf + epd->pos, space,
587 "ep %p cm_id %p qp %p state %d flags 0x%lx "
588 "history 0x%lx hwtid %d atid %d "
589 "conn_na %u abort_na %u "
590 "%pI6:%d/%d <-> %pI6:%d/%d\n",
591 ep, ep->com.cm_id, ep->com.qp,
592 (int)ep->com.state, ep->com.flags,
593 ep->com.history, ep->hwtid, ep->atid,
594 ep->stats.connect_neg_adv,
595 ep->stats.abort_neg_adv,
596 &lsin6->sin6_addr, ntohs(lsin6->sin6_port),
597 ntohs(mapped_lsin6->sin6_port),
598 &rsin6->sin6_addr, ntohs(rsin6->sin6_port),
599 ntohs(mapped_rsin6->sin6_port));
600 }
601 if (cc < space)
602 epd->pos += cc;
603 return 0;
604 }
605
dump_listen_ep(int id,void * p,void * data)606 static int dump_listen_ep(int id, void *p, void *data)
607 {
608 struct c4iw_listen_ep *ep = p;
609 struct c4iw_debugfs_data *epd = data;
610 int space;
611 int cc;
612
613 space = epd->bufsize - epd->pos - 1;
614 if (space == 0)
615 return 1;
616
617 if (ep->com.local_addr.ss_family == AF_INET) {
618 struct sockaddr_in *lsin = (struct sockaddr_in *)
619 &ep->com.local_addr;
620 struct sockaddr_in *mapped_lsin = (struct sockaddr_in *)
621 &ep->com.mapped_local_addr;
622
623 cc = snprintf(epd->buf + epd->pos, space,
624 "ep %p cm_id %p state %d flags 0x%lx stid %d "
625 "backlog %d %pI4:%d/%d\n",
626 ep, ep->com.cm_id, (int)ep->com.state,
627 ep->com.flags, ep->stid, ep->backlog,
628 &lsin->sin_addr, ntohs(lsin->sin_port),
629 ntohs(mapped_lsin->sin_port));
630 } else {
631 struct sockaddr_in6 *lsin6 = (struct sockaddr_in6 *)
632 &ep->com.local_addr;
633 struct sockaddr_in6 *mapped_lsin6 = (struct sockaddr_in6 *)
634 &ep->com.mapped_local_addr;
635
636 cc = snprintf(epd->buf + epd->pos, space,
637 "ep %p cm_id %p state %d flags 0x%lx stid %d "
638 "backlog %d %pI6:%d/%d\n",
639 ep, ep->com.cm_id, (int)ep->com.state,
640 ep->com.flags, ep->stid, ep->backlog,
641 &lsin6->sin6_addr, ntohs(lsin6->sin6_port),
642 ntohs(mapped_lsin6->sin6_port));
643 }
644 if (cc < space)
645 epd->pos += cc;
646 return 0;
647 }
648
ep_release(struct inode * inode,struct file * file)649 static int ep_release(struct inode *inode, struct file *file)
650 {
651 struct c4iw_debugfs_data *epd = file->private_data;
652 if (!epd) {
653 pr_info("%s null qpd?\n", __func__);
654 return 0;
655 }
656 vfree(epd->buf);
657 kfree(epd);
658 return 0;
659 }
660
ep_open(struct inode * inode,struct file * file)661 static int ep_open(struct inode *inode, struct file *file)
662 {
663 struct c4iw_debugfs_data *epd;
664 int ret = 0;
665 int count = 1;
666
667 epd = kmalloc(sizeof(*epd), GFP_KERNEL);
668 if (!epd) {
669 ret = -ENOMEM;
670 goto out;
671 }
672 epd->devp = inode->i_private;
673 epd->pos = 0;
674
675 spin_lock_irq(&epd->devp->lock);
676 idr_for_each(&epd->devp->hwtid_idr, count_idrs, &count);
677 idr_for_each(&epd->devp->atid_idr, count_idrs, &count);
678 idr_for_each(&epd->devp->stid_idr, count_idrs, &count);
679 spin_unlock_irq(&epd->devp->lock);
680
681 epd->bufsize = count * 240;
682 epd->buf = vmalloc(epd->bufsize);
683 if (!epd->buf) {
684 ret = -ENOMEM;
685 goto err1;
686 }
687
688 spin_lock_irq(&epd->devp->lock);
689 idr_for_each(&epd->devp->hwtid_idr, dump_ep, epd);
690 idr_for_each(&epd->devp->atid_idr, dump_ep, epd);
691 idr_for_each(&epd->devp->stid_idr, dump_listen_ep, epd);
692 spin_unlock_irq(&epd->devp->lock);
693
694 file->private_data = epd;
695 goto out;
696 err1:
697 kfree(epd);
698 out:
699 return ret;
700 }
701
702 static const struct file_operations ep_debugfs_fops = {
703 .owner = THIS_MODULE,
704 .open = ep_open,
705 .release = ep_release,
706 .read = debugfs_read,
707 };
708
setup_debugfs(struct c4iw_dev * devp)709 static int setup_debugfs(struct c4iw_dev *devp)
710 {
711 if (!devp->debugfs_root)
712 return -1;
713
714 debugfs_create_file_size("qps", S_IWUSR, devp->debugfs_root,
715 (void *)devp, &qp_debugfs_fops, 4096);
716
717 debugfs_create_file_size("stags", S_IWUSR, devp->debugfs_root,
718 (void *)devp, &stag_debugfs_fops, 4096);
719
720 debugfs_create_file_size("stats", S_IWUSR, devp->debugfs_root,
721 (void *)devp, &stats_debugfs_fops, 4096);
722
723 debugfs_create_file_size("eps", S_IWUSR, devp->debugfs_root,
724 (void *)devp, &ep_debugfs_fops, 4096);
725
726 if (c4iw_wr_log)
727 debugfs_create_file_size("wr_log", S_IWUSR, devp->debugfs_root,
728 (void *)devp, &wr_log_debugfs_fops, 4096);
729 return 0;
730 }
731
c4iw_release_dev_ucontext(struct c4iw_rdev * rdev,struct c4iw_dev_ucontext * uctx)732 void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev,
733 struct c4iw_dev_ucontext *uctx)
734 {
735 struct list_head *pos, *nxt;
736 struct c4iw_qid_list *entry;
737
738 mutex_lock(&uctx->lock);
739 list_for_each_safe(pos, nxt, &uctx->qpids) {
740 entry = list_entry(pos, struct c4iw_qid_list, entry);
741 list_del_init(&entry->entry);
742 if (!(entry->qid & rdev->qpmask)) {
743 c4iw_put_resource(&rdev->resource.qid_table,
744 entry->qid);
745 mutex_lock(&rdev->stats.lock);
746 rdev->stats.qid.cur -= rdev->qpmask + 1;
747 mutex_unlock(&rdev->stats.lock);
748 }
749 kfree(entry);
750 }
751
752 list_for_each_safe(pos, nxt, &uctx->qpids) {
753 entry = list_entry(pos, struct c4iw_qid_list, entry);
754 list_del_init(&entry->entry);
755 kfree(entry);
756 }
757 mutex_unlock(&uctx->lock);
758 }
759
c4iw_init_dev_ucontext(struct c4iw_rdev * rdev,struct c4iw_dev_ucontext * uctx)760 void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev,
761 struct c4iw_dev_ucontext *uctx)
762 {
763 INIT_LIST_HEAD(&uctx->qpids);
764 INIT_LIST_HEAD(&uctx->cqids);
765 mutex_init(&uctx->lock);
766 }
767
768 /* Caller takes care of locking if needed */
c4iw_rdev_open(struct c4iw_rdev * rdev)769 static int c4iw_rdev_open(struct c4iw_rdev *rdev)
770 {
771 int err;
772
773 c4iw_init_dev_ucontext(rdev, &rdev->uctx);
774
775 /*
776 * This implementation assumes udb_density == ucq_density! Eventually
777 * we might need to support this but for now fail the open. Also the
778 * cqid and qpid range must match for now.
779 */
780 if (rdev->lldi.udb_density != rdev->lldi.ucq_density) {
781 pr_err(MOD "%s: unsupported udb/ucq densities %u/%u\n",
782 pci_name(rdev->lldi.pdev), rdev->lldi.udb_density,
783 rdev->lldi.ucq_density);
784 err = -EINVAL;
785 goto err1;
786 }
787 if (rdev->lldi.vr->qp.start != rdev->lldi.vr->cq.start ||
788 rdev->lldi.vr->qp.size != rdev->lldi.vr->cq.size) {
789 pr_err(MOD "%s: unsupported qp and cq id ranges "
790 "qp start %u size %u cq start %u size %u\n",
791 pci_name(rdev->lldi.pdev), rdev->lldi.vr->qp.start,
792 rdev->lldi.vr->qp.size, rdev->lldi.vr->cq.size,
793 rdev->lldi.vr->cq.size);
794 err = -EINVAL;
795 goto err1;
796 }
797
798 rdev->qpmask = rdev->lldi.udb_density - 1;
799 rdev->cqmask = rdev->lldi.ucq_density - 1;
800 PDBG("%s dev %s stag start 0x%0x size 0x%0x num stags %d "
801 "pbl start 0x%0x size 0x%0x rq start 0x%0x size 0x%0x "
802 "qp qid start %u size %u cq qid start %u size %u\n",
803 __func__, pci_name(rdev->lldi.pdev), rdev->lldi.vr->stag.start,
804 rdev->lldi.vr->stag.size, c4iw_num_stags(rdev),
805 rdev->lldi.vr->pbl.start,
806 rdev->lldi.vr->pbl.size, rdev->lldi.vr->rq.start,
807 rdev->lldi.vr->rq.size,
808 rdev->lldi.vr->qp.start,
809 rdev->lldi.vr->qp.size,
810 rdev->lldi.vr->cq.start,
811 rdev->lldi.vr->cq.size);
812 PDBG("udb %pR db_reg %p gts_reg %p "
813 "qpmask 0x%x cqmask 0x%x\n",
814 &rdev->lldi.pdev->resource[2],
815 rdev->lldi.db_reg, rdev->lldi.gts_reg,
816 rdev->qpmask, rdev->cqmask);
817
818 if (c4iw_num_stags(rdev) == 0) {
819 err = -EINVAL;
820 goto err1;
821 }
822
823 rdev->stats.pd.total = T4_MAX_NUM_PD;
824 rdev->stats.stag.total = rdev->lldi.vr->stag.size;
825 rdev->stats.pbl.total = rdev->lldi.vr->pbl.size;
826 rdev->stats.rqt.total = rdev->lldi.vr->rq.size;
827 rdev->stats.ocqp.total = rdev->lldi.vr->ocq.size;
828 rdev->stats.qid.total = rdev->lldi.vr->qp.size;
829
830 err = c4iw_init_resource(rdev, c4iw_num_stags(rdev), T4_MAX_NUM_PD);
831 if (err) {
832 printk(KERN_ERR MOD "error %d initializing resources\n", err);
833 goto err1;
834 }
835 err = c4iw_pblpool_create(rdev);
836 if (err) {
837 printk(KERN_ERR MOD "error %d initializing pbl pool\n", err);
838 goto err2;
839 }
840 err = c4iw_rqtpool_create(rdev);
841 if (err) {
842 printk(KERN_ERR MOD "error %d initializing rqt pool\n", err);
843 goto err3;
844 }
845 err = c4iw_ocqp_pool_create(rdev);
846 if (err) {
847 printk(KERN_ERR MOD "error %d initializing ocqp pool\n", err);
848 goto err4;
849 }
850 rdev->status_page = (struct t4_dev_status_page *)
851 __get_free_page(GFP_KERNEL);
852 if (!rdev->status_page) {
853 pr_err(MOD "error allocating status page\n");
854 goto err4;
855 }
856
857 if (c4iw_wr_log) {
858 rdev->wr_log = kzalloc((1 << c4iw_wr_log_size_order) *
859 sizeof(*rdev->wr_log), GFP_KERNEL);
860 if (rdev->wr_log) {
861 rdev->wr_log_size = 1 << c4iw_wr_log_size_order;
862 atomic_set(&rdev->wr_log_idx, 0);
863 } else {
864 pr_err(MOD "error allocating wr_log. Logging disabled\n");
865 }
866 }
867
868 rdev->status_page->db_off = 0;
869
870 return 0;
871 err4:
872 c4iw_rqtpool_destroy(rdev);
873 err3:
874 c4iw_pblpool_destroy(rdev);
875 err2:
876 c4iw_destroy_resource(&rdev->resource);
877 err1:
878 return err;
879 }
880
c4iw_rdev_close(struct c4iw_rdev * rdev)881 static void c4iw_rdev_close(struct c4iw_rdev *rdev)
882 {
883 kfree(rdev->wr_log);
884 free_page((unsigned long)rdev->status_page);
885 c4iw_pblpool_destroy(rdev);
886 c4iw_rqtpool_destroy(rdev);
887 c4iw_destroy_resource(&rdev->resource);
888 }
889
c4iw_dealloc(struct uld_ctx * ctx)890 static void c4iw_dealloc(struct uld_ctx *ctx)
891 {
892 c4iw_rdev_close(&ctx->dev->rdev);
893 idr_destroy(&ctx->dev->cqidr);
894 idr_destroy(&ctx->dev->qpidr);
895 idr_destroy(&ctx->dev->mmidr);
896 idr_destroy(&ctx->dev->hwtid_idr);
897 idr_destroy(&ctx->dev->stid_idr);
898 idr_destroy(&ctx->dev->atid_idr);
899 if (ctx->dev->rdev.bar2_kva)
900 iounmap(ctx->dev->rdev.bar2_kva);
901 if (ctx->dev->rdev.oc_mw_kva)
902 iounmap(ctx->dev->rdev.oc_mw_kva);
903 ib_dealloc_device(&ctx->dev->ibdev);
904 ctx->dev = NULL;
905 }
906
c4iw_remove(struct uld_ctx * ctx)907 static void c4iw_remove(struct uld_ctx *ctx)
908 {
909 PDBG("%s c4iw_dev %p\n", __func__, ctx->dev);
910 c4iw_unregister_device(ctx->dev);
911 c4iw_dealloc(ctx);
912 }
913
rdma_supported(const struct cxgb4_lld_info * infop)914 static int rdma_supported(const struct cxgb4_lld_info *infop)
915 {
916 return infop->vr->stag.size > 0 && infop->vr->pbl.size > 0 &&
917 infop->vr->rq.size > 0 && infop->vr->qp.size > 0 &&
918 infop->vr->cq.size > 0;
919 }
920
c4iw_alloc(const struct cxgb4_lld_info * infop)921 static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop)
922 {
923 struct c4iw_dev *devp;
924 int ret;
925
926 if (!rdma_supported(infop)) {
927 printk(KERN_INFO MOD "%s: RDMA not supported on this device.\n",
928 pci_name(infop->pdev));
929 return ERR_PTR(-ENOSYS);
930 }
931 if (!ocqp_supported(infop))
932 pr_info("%s: On-Chip Queues not supported on this device.\n",
933 pci_name(infop->pdev));
934
935 devp = (struct c4iw_dev *)ib_alloc_device(sizeof(*devp));
936 if (!devp) {
937 printk(KERN_ERR MOD "Cannot allocate ib device\n");
938 return ERR_PTR(-ENOMEM);
939 }
940 devp->rdev.lldi = *infop;
941
942 /* init various hw-queue params based on lld info */
943 PDBG("%s: Ing. padding boundary is %d, egrsstatuspagesize = %d\n",
944 __func__, devp->rdev.lldi.sge_ingpadboundary,
945 devp->rdev.lldi.sge_egrstatuspagesize);
946
947 devp->rdev.hw_queue.t4_eq_status_entries =
948 devp->rdev.lldi.sge_ingpadboundary > 64 ? 2 : 1;
949 devp->rdev.hw_queue.t4_max_eq_size = 65520;
950 devp->rdev.hw_queue.t4_max_iq_size = 65520;
951 devp->rdev.hw_queue.t4_max_rq_size = 8192 -
952 devp->rdev.hw_queue.t4_eq_status_entries - 1;
953 devp->rdev.hw_queue.t4_max_sq_size =
954 devp->rdev.hw_queue.t4_max_eq_size -
955 devp->rdev.hw_queue.t4_eq_status_entries - 1;
956 devp->rdev.hw_queue.t4_max_qp_depth =
957 devp->rdev.hw_queue.t4_max_rq_size;
958 devp->rdev.hw_queue.t4_max_cq_depth =
959 devp->rdev.hw_queue.t4_max_iq_size - 2;
960 devp->rdev.hw_queue.t4_stat_len =
961 devp->rdev.lldi.sge_egrstatuspagesize;
962
963 /*
964 * For T5/T6 devices, we map all of BAR2 with WC.
965 * For T4 devices with onchip qp mem, we map only that part
966 * of BAR2 with WC.
967 */
968 devp->rdev.bar2_pa = pci_resource_start(devp->rdev.lldi.pdev, 2);
969 if (!is_t4(devp->rdev.lldi.adapter_type)) {
970 devp->rdev.bar2_kva = ioremap_wc(devp->rdev.bar2_pa,
971 pci_resource_len(devp->rdev.lldi.pdev, 2));
972 if (!devp->rdev.bar2_kva) {
973 pr_err(MOD "Unable to ioremap BAR2\n");
974 ib_dealloc_device(&devp->ibdev);
975 return ERR_PTR(-EINVAL);
976 }
977 } else if (ocqp_supported(infop)) {
978 devp->rdev.oc_mw_pa =
979 pci_resource_start(devp->rdev.lldi.pdev, 2) +
980 pci_resource_len(devp->rdev.lldi.pdev, 2) -
981 roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size);
982 devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa,
983 devp->rdev.lldi.vr->ocq.size);
984 if (!devp->rdev.oc_mw_kva) {
985 pr_err(MOD "Unable to ioremap onchip mem\n");
986 ib_dealloc_device(&devp->ibdev);
987 return ERR_PTR(-EINVAL);
988 }
989 }
990
991 PDBG(KERN_INFO MOD "ocq memory: "
992 "hw_start 0x%x size %u mw_pa 0x%lx mw_kva %p\n",
993 devp->rdev.lldi.vr->ocq.start, devp->rdev.lldi.vr->ocq.size,
994 devp->rdev.oc_mw_pa, devp->rdev.oc_mw_kva);
995
996 ret = c4iw_rdev_open(&devp->rdev);
997 if (ret) {
998 printk(KERN_ERR MOD "Unable to open CXIO rdev err %d\n", ret);
999 ib_dealloc_device(&devp->ibdev);
1000 return ERR_PTR(ret);
1001 }
1002
1003 idr_init(&devp->cqidr);
1004 idr_init(&devp->qpidr);
1005 idr_init(&devp->mmidr);
1006 idr_init(&devp->hwtid_idr);
1007 idr_init(&devp->stid_idr);
1008 idr_init(&devp->atid_idr);
1009 spin_lock_init(&devp->lock);
1010 mutex_init(&devp->rdev.stats.lock);
1011 mutex_init(&devp->db_mutex);
1012 INIT_LIST_HEAD(&devp->db_fc_list);
1013 devp->avail_ird = devp->rdev.lldi.max_ird_adapter;
1014
1015 if (c4iw_debugfs_root) {
1016 devp->debugfs_root = debugfs_create_dir(
1017 pci_name(devp->rdev.lldi.pdev),
1018 c4iw_debugfs_root);
1019 setup_debugfs(devp);
1020 }
1021
1022
1023 return devp;
1024 }
1025
c4iw_uld_add(const struct cxgb4_lld_info * infop)1026 static void *c4iw_uld_add(const struct cxgb4_lld_info *infop)
1027 {
1028 struct uld_ctx *ctx;
1029 static int vers_printed;
1030 int i;
1031
1032 if (!vers_printed++)
1033 pr_info("Chelsio T4/T5 RDMA Driver - version %s\n",
1034 DRV_VERSION);
1035
1036 ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
1037 if (!ctx) {
1038 ctx = ERR_PTR(-ENOMEM);
1039 goto out;
1040 }
1041 ctx->lldi = *infop;
1042
1043 PDBG("%s found device %s nchan %u nrxq %u ntxq %u nports %u\n",
1044 __func__, pci_name(ctx->lldi.pdev),
1045 ctx->lldi.nchan, ctx->lldi.nrxq,
1046 ctx->lldi.ntxq, ctx->lldi.nports);
1047
1048 mutex_lock(&dev_mutex);
1049 list_add_tail(&ctx->entry, &uld_ctx_list);
1050 mutex_unlock(&dev_mutex);
1051
1052 for (i = 0; i < ctx->lldi.nrxq; i++)
1053 PDBG("rxqid[%u] %u\n", i, ctx->lldi.rxq_ids[i]);
1054 out:
1055 return ctx;
1056 }
1057
copy_gl_to_skb_pkt(const struct pkt_gl * gl,const __be64 * rsp,u32 pktshift)1058 static inline struct sk_buff *copy_gl_to_skb_pkt(const struct pkt_gl *gl,
1059 const __be64 *rsp,
1060 u32 pktshift)
1061 {
1062 struct sk_buff *skb;
1063
1064 /*
1065 * Allocate space for cpl_pass_accept_req which will be synthesized by
1066 * driver. Once the driver synthesizes the request the skb will go
1067 * through the regular cpl_pass_accept_req processing.
1068 * The math here assumes sizeof cpl_pass_accept_req >= sizeof
1069 * cpl_rx_pkt.
1070 */
1071 skb = alloc_skb(gl->tot_len + sizeof(struct cpl_pass_accept_req) +
1072 sizeof(struct rss_header) - pktshift, GFP_ATOMIC);
1073 if (unlikely(!skb))
1074 return NULL;
1075
1076 __skb_put(skb, gl->tot_len + sizeof(struct cpl_pass_accept_req) +
1077 sizeof(struct rss_header) - pktshift);
1078
1079 /*
1080 * This skb will contain:
1081 * rss_header from the rspq descriptor (1 flit)
1082 * cpl_rx_pkt struct from the rspq descriptor (2 flits)
1083 * space for the difference between the size of an
1084 * rx_pkt and pass_accept_req cpl (1 flit)
1085 * the packet data from the gl
1086 */
1087 skb_copy_to_linear_data(skb, rsp, sizeof(struct cpl_pass_accept_req) +
1088 sizeof(struct rss_header));
1089 skb_copy_to_linear_data_offset(skb, sizeof(struct rss_header) +
1090 sizeof(struct cpl_pass_accept_req),
1091 gl->va + pktshift,
1092 gl->tot_len - pktshift);
1093 return skb;
1094 }
1095
recv_rx_pkt(struct c4iw_dev * dev,const struct pkt_gl * gl,const __be64 * rsp)1096 static inline int recv_rx_pkt(struct c4iw_dev *dev, const struct pkt_gl *gl,
1097 const __be64 *rsp)
1098 {
1099 unsigned int opcode = *(u8 *)rsp;
1100 struct sk_buff *skb;
1101
1102 if (opcode != CPL_RX_PKT)
1103 goto out;
1104
1105 skb = copy_gl_to_skb_pkt(gl , rsp, dev->rdev.lldi.sge_pktshift);
1106 if (skb == NULL)
1107 goto out;
1108
1109 if (c4iw_handlers[opcode] == NULL) {
1110 pr_info("%s no handler opcode 0x%x...\n", __func__,
1111 opcode);
1112 kfree_skb(skb);
1113 goto out;
1114 }
1115 c4iw_handlers[opcode](dev, skb);
1116 return 1;
1117 out:
1118 return 0;
1119 }
1120
c4iw_uld_rx_handler(void * handle,const __be64 * rsp,const struct pkt_gl * gl)1121 static int c4iw_uld_rx_handler(void *handle, const __be64 *rsp,
1122 const struct pkt_gl *gl)
1123 {
1124 struct uld_ctx *ctx = handle;
1125 struct c4iw_dev *dev = ctx->dev;
1126 struct sk_buff *skb;
1127 u8 opcode;
1128
1129 if (gl == NULL) {
1130 /* omit RSS and rsp_ctrl at end of descriptor */
1131 unsigned int len = 64 - sizeof(struct rsp_ctrl) - 8;
1132
1133 skb = alloc_skb(256, GFP_ATOMIC);
1134 if (!skb)
1135 goto nomem;
1136 __skb_put(skb, len);
1137 skb_copy_to_linear_data(skb, &rsp[1], len);
1138 } else if (gl == CXGB4_MSG_AN) {
1139 const struct rsp_ctrl *rc = (void *)rsp;
1140
1141 u32 qid = be32_to_cpu(rc->pldbuflen_qid);
1142 c4iw_ev_handler(dev, qid);
1143 return 0;
1144 } else if (unlikely(*(u8 *)rsp != *(u8 *)gl->va)) {
1145 if (recv_rx_pkt(dev, gl, rsp))
1146 return 0;
1147
1148 pr_info("%s: unexpected FL contents at %p, " \
1149 "RSS %#llx, FL %#llx, len %u\n",
1150 pci_name(ctx->lldi.pdev), gl->va,
1151 (unsigned long long)be64_to_cpu(*rsp),
1152 (unsigned long long)be64_to_cpu(
1153 *(__force __be64 *)gl->va),
1154 gl->tot_len);
1155
1156 return 0;
1157 } else {
1158 skb = cxgb4_pktgl_to_skb(gl, 128, 128);
1159 if (unlikely(!skb))
1160 goto nomem;
1161 }
1162
1163 opcode = *(u8 *)rsp;
1164 if (c4iw_handlers[opcode]) {
1165 c4iw_handlers[opcode](dev, skb);
1166 } else {
1167 pr_info("%s no handler opcode 0x%x...\n", __func__,
1168 opcode);
1169 kfree_skb(skb);
1170 }
1171
1172 return 0;
1173 nomem:
1174 return -1;
1175 }
1176
c4iw_uld_state_change(void * handle,enum cxgb4_state new_state)1177 static int c4iw_uld_state_change(void *handle, enum cxgb4_state new_state)
1178 {
1179 struct uld_ctx *ctx = handle;
1180
1181 PDBG("%s new_state %u\n", __func__, new_state);
1182 switch (new_state) {
1183 case CXGB4_STATE_UP:
1184 printk(KERN_INFO MOD "%s: Up\n", pci_name(ctx->lldi.pdev));
1185 if (!ctx->dev) {
1186 int ret;
1187
1188 ctx->dev = c4iw_alloc(&ctx->lldi);
1189 if (IS_ERR(ctx->dev)) {
1190 printk(KERN_ERR MOD
1191 "%s: initialization failed: %ld\n",
1192 pci_name(ctx->lldi.pdev),
1193 PTR_ERR(ctx->dev));
1194 ctx->dev = NULL;
1195 break;
1196 }
1197 ret = c4iw_register_device(ctx->dev);
1198 if (ret) {
1199 printk(KERN_ERR MOD
1200 "%s: RDMA registration failed: %d\n",
1201 pci_name(ctx->lldi.pdev), ret);
1202 c4iw_dealloc(ctx);
1203 }
1204 }
1205 break;
1206 case CXGB4_STATE_DOWN:
1207 printk(KERN_INFO MOD "%s: Down\n",
1208 pci_name(ctx->lldi.pdev));
1209 if (ctx->dev)
1210 c4iw_remove(ctx);
1211 break;
1212 case CXGB4_STATE_START_RECOVERY:
1213 printk(KERN_INFO MOD "%s: Fatal Error\n",
1214 pci_name(ctx->lldi.pdev));
1215 if (ctx->dev) {
1216 struct ib_event event;
1217
1218 ctx->dev->rdev.flags |= T4_FATAL_ERROR;
1219 memset(&event, 0, sizeof event);
1220 event.event = IB_EVENT_DEVICE_FATAL;
1221 event.device = &ctx->dev->ibdev;
1222 ib_dispatch_event(&event);
1223 c4iw_remove(ctx);
1224 }
1225 break;
1226 case CXGB4_STATE_DETACH:
1227 printk(KERN_INFO MOD "%s: Detach\n",
1228 pci_name(ctx->lldi.pdev));
1229 if (ctx->dev)
1230 c4iw_remove(ctx);
1231 break;
1232 }
1233 return 0;
1234 }
1235
disable_qp_db(int id,void * p,void * data)1236 static int disable_qp_db(int id, void *p, void *data)
1237 {
1238 struct c4iw_qp *qp = p;
1239
1240 t4_disable_wq_db(&qp->wq);
1241 return 0;
1242 }
1243
stop_queues(struct uld_ctx * ctx)1244 static void stop_queues(struct uld_ctx *ctx)
1245 {
1246 unsigned long flags;
1247
1248 spin_lock_irqsave(&ctx->dev->lock, flags);
1249 ctx->dev->rdev.stats.db_state_transitions++;
1250 ctx->dev->db_state = STOPPED;
1251 if (ctx->dev->rdev.flags & T4_STATUS_PAGE_DISABLED)
1252 idr_for_each(&ctx->dev->qpidr, disable_qp_db, NULL);
1253 else
1254 ctx->dev->rdev.status_page->db_off = 1;
1255 spin_unlock_irqrestore(&ctx->dev->lock, flags);
1256 }
1257
enable_qp_db(int id,void * p,void * data)1258 static int enable_qp_db(int id, void *p, void *data)
1259 {
1260 struct c4iw_qp *qp = p;
1261
1262 t4_enable_wq_db(&qp->wq);
1263 return 0;
1264 }
1265
resume_rc_qp(struct c4iw_qp * qp)1266 static void resume_rc_qp(struct c4iw_qp *qp)
1267 {
1268 spin_lock(&qp->lock);
1269 t4_ring_sq_db(&qp->wq, qp->wq.sq.wq_pidx_inc, NULL);
1270 qp->wq.sq.wq_pidx_inc = 0;
1271 t4_ring_rq_db(&qp->wq, qp->wq.rq.wq_pidx_inc, NULL);
1272 qp->wq.rq.wq_pidx_inc = 0;
1273 spin_unlock(&qp->lock);
1274 }
1275
resume_a_chunk(struct uld_ctx * ctx)1276 static void resume_a_chunk(struct uld_ctx *ctx)
1277 {
1278 int i;
1279 struct c4iw_qp *qp;
1280
1281 for (i = 0; i < DB_FC_RESUME_SIZE; i++) {
1282 qp = list_first_entry(&ctx->dev->db_fc_list, struct c4iw_qp,
1283 db_fc_entry);
1284 list_del_init(&qp->db_fc_entry);
1285 resume_rc_qp(qp);
1286 if (list_empty(&ctx->dev->db_fc_list))
1287 break;
1288 }
1289 }
1290
resume_queues(struct uld_ctx * ctx)1291 static void resume_queues(struct uld_ctx *ctx)
1292 {
1293 spin_lock_irq(&ctx->dev->lock);
1294 if (ctx->dev->db_state != STOPPED)
1295 goto out;
1296 ctx->dev->db_state = FLOW_CONTROL;
1297 while (1) {
1298 if (list_empty(&ctx->dev->db_fc_list)) {
1299 WARN_ON(ctx->dev->db_state != FLOW_CONTROL);
1300 ctx->dev->db_state = NORMAL;
1301 ctx->dev->rdev.stats.db_state_transitions++;
1302 if (ctx->dev->rdev.flags & T4_STATUS_PAGE_DISABLED) {
1303 idr_for_each(&ctx->dev->qpidr, enable_qp_db,
1304 NULL);
1305 } else {
1306 ctx->dev->rdev.status_page->db_off = 0;
1307 }
1308 break;
1309 } else {
1310 if (cxgb4_dbfifo_count(ctx->dev->rdev.lldi.ports[0], 1)
1311 < (ctx->dev->rdev.lldi.dbfifo_int_thresh <<
1312 DB_FC_DRAIN_THRESH)) {
1313 resume_a_chunk(ctx);
1314 }
1315 if (!list_empty(&ctx->dev->db_fc_list)) {
1316 spin_unlock_irq(&ctx->dev->lock);
1317 if (DB_FC_RESUME_DELAY) {
1318 set_current_state(TASK_UNINTERRUPTIBLE);
1319 schedule_timeout(DB_FC_RESUME_DELAY);
1320 }
1321 spin_lock_irq(&ctx->dev->lock);
1322 if (ctx->dev->db_state != FLOW_CONTROL)
1323 break;
1324 }
1325 }
1326 }
1327 out:
1328 if (ctx->dev->db_state != NORMAL)
1329 ctx->dev->rdev.stats.db_fc_interruptions++;
1330 spin_unlock_irq(&ctx->dev->lock);
1331 }
1332
1333 struct qp_list {
1334 unsigned idx;
1335 struct c4iw_qp **qps;
1336 };
1337
add_and_ref_qp(int id,void * p,void * data)1338 static int add_and_ref_qp(int id, void *p, void *data)
1339 {
1340 struct qp_list *qp_listp = data;
1341 struct c4iw_qp *qp = p;
1342
1343 c4iw_qp_add_ref(&qp->ibqp);
1344 qp_listp->qps[qp_listp->idx++] = qp;
1345 return 0;
1346 }
1347
count_qps(int id,void * p,void * data)1348 static int count_qps(int id, void *p, void *data)
1349 {
1350 unsigned *countp = data;
1351 (*countp)++;
1352 return 0;
1353 }
1354
deref_qps(struct qp_list * qp_list)1355 static void deref_qps(struct qp_list *qp_list)
1356 {
1357 int idx;
1358
1359 for (idx = 0; idx < qp_list->idx; idx++)
1360 c4iw_qp_rem_ref(&qp_list->qps[idx]->ibqp);
1361 }
1362
recover_lost_dbs(struct uld_ctx * ctx,struct qp_list * qp_list)1363 static void recover_lost_dbs(struct uld_ctx *ctx, struct qp_list *qp_list)
1364 {
1365 int idx;
1366 int ret;
1367
1368 for (idx = 0; idx < qp_list->idx; idx++) {
1369 struct c4iw_qp *qp = qp_list->qps[idx];
1370
1371 spin_lock_irq(&qp->rhp->lock);
1372 spin_lock(&qp->lock);
1373 ret = cxgb4_sync_txq_pidx(qp->rhp->rdev.lldi.ports[0],
1374 qp->wq.sq.qid,
1375 t4_sq_host_wq_pidx(&qp->wq),
1376 t4_sq_wq_size(&qp->wq));
1377 if (ret) {
1378 pr_err(MOD "%s: Fatal error - "
1379 "DB overflow recovery failed - "
1380 "error syncing SQ qid %u\n",
1381 pci_name(ctx->lldi.pdev), qp->wq.sq.qid);
1382 spin_unlock(&qp->lock);
1383 spin_unlock_irq(&qp->rhp->lock);
1384 return;
1385 }
1386 qp->wq.sq.wq_pidx_inc = 0;
1387
1388 ret = cxgb4_sync_txq_pidx(qp->rhp->rdev.lldi.ports[0],
1389 qp->wq.rq.qid,
1390 t4_rq_host_wq_pidx(&qp->wq),
1391 t4_rq_wq_size(&qp->wq));
1392
1393 if (ret) {
1394 pr_err(MOD "%s: Fatal error - "
1395 "DB overflow recovery failed - "
1396 "error syncing RQ qid %u\n",
1397 pci_name(ctx->lldi.pdev), qp->wq.rq.qid);
1398 spin_unlock(&qp->lock);
1399 spin_unlock_irq(&qp->rhp->lock);
1400 return;
1401 }
1402 qp->wq.rq.wq_pidx_inc = 0;
1403 spin_unlock(&qp->lock);
1404 spin_unlock_irq(&qp->rhp->lock);
1405
1406 /* Wait for the dbfifo to drain */
1407 while (cxgb4_dbfifo_count(qp->rhp->rdev.lldi.ports[0], 1) > 0) {
1408 set_current_state(TASK_UNINTERRUPTIBLE);
1409 schedule_timeout(usecs_to_jiffies(10));
1410 }
1411 }
1412 }
1413
recover_queues(struct uld_ctx * ctx)1414 static void recover_queues(struct uld_ctx *ctx)
1415 {
1416 int count = 0;
1417 struct qp_list qp_list;
1418 int ret;
1419
1420 /* slow everybody down */
1421 set_current_state(TASK_UNINTERRUPTIBLE);
1422 schedule_timeout(usecs_to_jiffies(1000));
1423
1424 /* flush the SGE contexts */
1425 ret = cxgb4_flush_eq_cache(ctx->dev->rdev.lldi.ports[0]);
1426 if (ret) {
1427 printk(KERN_ERR MOD "%s: Fatal error - DB overflow recovery failed\n",
1428 pci_name(ctx->lldi.pdev));
1429 return;
1430 }
1431
1432 /* Count active queues so we can build a list of queues to recover */
1433 spin_lock_irq(&ctx->dev->lock);
1434 WARN_ON(ctx->dev->db_state != STOPPED);
1435 ctx->dev->db_state = RECOVERY;
1436 idr_for_each(&ctx->dev->qpidr, count_qps, &count);
1437
1438 qp_list.qps = kzalloc(count * sizeof *qp_list.qps, GFP_ATOMIC);
1439 if (!qp_list.qps) {
1440 printk(KERN_ERR MOD "%s: Fatal error - DB overflow recovery failed\n",
1441 pci_name(ctx->lldi.pdev));
1442 spin_unlock_irq(&ctx->dev->lock);
1443 return;
1444 }
1445 qp_list.idx = 0;
1446
1447 /* add and ref each qp so it doesn't get freed */
1448 idr_for_each(&ctx->dev->qpidr, add_and_ref_qp, &qp_list);
1449
1450 spin_unlock_irq(&ctx->dev->lock);
1451
1452 /* now traverse the list in a safe context to recover the db state*/
1453 recover_lost_dbs(ctx, &qp_list);
1454
1455 /* we're almost done! deref the qps and clean up */
1456 deref_qps(&qp_list);
1457 kfree(qp_list.qps);
1458
1459 spin_lock_irq(&ctx->dev->lock);
1460 WARN_ON(ctx->dev->db_state != RECOVERY);
1461 ctx->dev->db_state = STOPPED;
1462 spin_unlock_irq(&ctx->dev->lock);
1463 }
1464
c4iw_uld_control(void * handle,enum cxgb4_control control,...)1465 static int c4iw_uld_control(void *handle, enum cxgb4_control control, ...)
1466 {
1467 struct uld_ctx *ctx = handle;
1468
1469 switch (control) {
1470 case CXGB4_CONTROL_DB_FULL:
1471 stop_queues(ctx);
1472 ctx->dev->rdev.stats.db_full++;
1473 break;
1474 case CXGB4_CONTROL_DB_EMPTY:
1475 resume_queues(ctx);
1476 mutex_lock(&ctx->dev->rdev.stats.lock);
1477 ctx->dev->rdev.stats.db_empty++;
1478 mutex_unlock(&ctx->dev->rdev.stats.lock);
1479 break;
1480 case CXGB4_CONTROL_DB_DROP:
1481 recover_queues(ctx);
1482 mutex_lock(&ctx->dev->rdev.stats.lock);
1483 ctx->dev->rdev.stats.db_drop++;
1484 mutex_unlock(&ctx->dev->rdev.stats.lock);
1485 break;
1486 default:
1487 printk(KERN_WARNING MOD "%s: unknown control cmd %u\n",
1488 pci_name(ctx->lldi.pdev), control);
1489 break;
1490 }
1491 return 0;
1492 }
1493
1494 static struct cxgb4_uld_info c4iw_uld_info = {
1495 .name = DRV_NAME,
1496 .add = c4iw_uld_add,
1497 .rx_handler = c4iw_uld_rx_handler,
1498 .state_change = c4iw_uld_state_change,
1499 .control = c4iw_uld_control,
1500 };
1501
c4iw_init_module(void)1502 static int __init c4iw_init_module(void)
1503 {
1504 int err;
1505
1506 err = c4iw_cm_init();
1507 if (err)
1508 return err;
1509
1510 c4iw_debugfs_root = debugfs_create_dir(DRV_NAME, NULL);
1511 if (!c4iw_debugfs_root)
1512 printk(KERN_WARNING MOD
1513 "could not create debugfs entry, continuing\n");
1514
1515 if (ibnl_add_client(RDMA_NL_C4IW, RDMA_NL_IWPM_NUM_OPS,
1516 c4iw_nl_cb_table))
1517 pr_err("%s[%u]: Failed to add netlink callback\n"
1518 , __func__, __LINE__);
1519
1520 err = iwpm_init(RDMA_NL_C4IW);
1521 if (err) {
1522 pr_err("port mapper initialization failed with %d\n", err);
1523 ibnl_remove_client(RDMA_NL_C4IW);
1524 c4iw_cm_term();
1525 debugfs_remove_recursive(c4iw_debugfs_root);
1526 return err;
1527 }
1528
1529 cxgb4_register_uld(CXGB4_ULD_RDMA, &c4iw_uld_info);
1530
1531 return 0;
1532 }
1533
c4iw_exit_module(void)1534 static void __exit c4iw_exit_module(void)
1535 {
1536 struct uld_ctx *ctx, *tmp;
1537
1538 mutex_lock(&dev_mutex);
1539 list_for_each_entry_safe(ctx, tmp, &uld_ctx_list, entry) {
1540 if (ctx->dev)
1541 c4iw_remove(ctx);
1542 kfree(ctx);
1543 }
1544 mutex_unlock(&dev_mutex);
1545 cxgb4_unregister_uld(CXGB4_ULD_RDMA);
1546 iwpm_exit(RDMA_NL_C4IW);
1547 ibnl_remove_client(RDMA_NL_C4IW);
1548 c4iw_cm_term();
1549 debugfs_remove_recursive(c4iw_debugfs_root);
1550 }
1551
1552 module_init(c4iw_init_module);
1553 module_exit(c4iw_exit_module);
1554