1 /**
2 * OV519 driver
3 *
4 * Copyright (C) 2008-2011 Jean-François Moine <moinejf@free.fr>
5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
6 *
7 * This module is adapted from the ov51x-jpeg package, which itself
8 * was adapted from the ov511 driver.
9 *
10 * Original copyright for the ov511 driver is:
11 *
12 * Copyright (c) 1999-2006 Mark W. McClelland
13 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
14 * Many improvements by Bret Wallach <bwallac1@san.rr.com>
15 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
16 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
17 * Changes by Claudio Matsuoka <claudio@conectiva.com>
18 *
19 * ov51x-jpeg original copyright is:
20 *
21 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
22 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
23 *
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
27 * any later version.
28 *
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
33 *
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
37 *
38 */
39
40 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
41
42 #define MODULE_NAME "ov519"
43
44 #include <linux/input.h>
45 #include "gspca.h"
46
47 /* The jpeg_hdr is used by w996Xcf only */
48 /* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
49 #define CONEX_CAM
50 #include "jpeg.h"
51
52 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
53 MODULE_DESCRIPTION("OV519 USB Camera Driver");
54 MODULE_LICENSE("GPL");
55
56 /* global parameters */
57 static int frame_rate;
58
59 /* Number of times to retry a failed I2C transaction. Increase this if you
60 * are getting "Failed to read sensor ID..." */
61 static int i2c_detect_tries = 10;
62
63 /* ov519 device descriptor */
64 struct sd {
65 struct gspca_dev gspca_dev; /* !! must be the first item */
66
67 struct v4l2_ctrl *jpegqual;
68 struct v4l2_ctrl *freq;
69 struct { /* h/vflip control cluster */
70 struct v4l2_ctrl *hflip;
71 struct v4l2_ctrl *vflip;
72 };
73 struct { /* autobrightness/brightness control cluster */
74 struct v4l2_ctrl *autobright;
75 struct v4l2_ctrl *brightness;
76 };
77
78 u8 revision;
79
80 u8 packet_nr;
81
82 char bridge;
83 #define BRIDGE_OV511 0
84 #define BRIDGE_OV511PLUS 1
85 #define BRIDGE_OV518 2
86 #define BRIDGE_OV518PLUS 3
87 #define BRIDGE_OV519 4 /* = ov530 */
88 #define BRIDGE_OVFX2 5
89 #define BRIDGE_W9968CF 6
90 #define BRIDGE_MASK 7
91
92 char invert_led;
93 #define BRIDGE_INVERT_LED 8
94
95 char snapshot_pressed;
96 char snapshot_needs_reset;
97
98 /* Determined by sensor type */
99 u8 sif;
100
101 #define QUALITY_MIN 50
102 #define QUALITY_MAX 70
103 #define QUALITY_DEF 50
104
105 u8 stopped; /* Streaming is temporarily paused */
106 u8 first_frame;
107
108 u8 frame_rate; /* current Framerate */
109 u8 clockdiv; /* clockdiv override */
110
111 s8 sensor; /* Type of image sensor chip (SEN_*) */
112
113 u8 sensor_addr;
114 u16 sensor_width;
115 u16 sensor_height;
116 s16 sensor_reg_cache[256];
117
118 u8 jpeg_hdr[JPEG_HDR_SZ];
119 };
120 enum sensors {
121 SEN_OV2610,
122 SEN_OV2610AE,
123 SEN_OV3610,
124 SEN_OV6620,
125 SEN_OV6630,
126 SEN_OV66308AF,
127 SEN_OV7610,
128 SEN_OV7620,
129 SEN_OV7620AE,
130 SEN_OV7640,
131 SEN_OV7648,
132 SEN_OV7660,
133 SEN_OV7670,
134 SEN_OV76BE,
135 SEN_OV8610,
136 SEN_OV9600,
137 };
138
139 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
140 the ov sensors which is already present here. When we have the time we
141 really should move the sensor drivers to v4l2 sub drivers. */
142 #include "w996Xcf.c"
143
144 /* table of the disabled controls */
145 struct ctrl_valid {
146 unsigned int has_brightness:1;
147 unsigned int has_contrast:1;
148 unsigned int has_exposure:1;
149 unsigned int has_autogain:1;
150 unsigned int has_sat:1;
151 unsigned int has_hvflip:1;
152 unsigned int has_autobright:1;
153 unsigned int has_freq:1;
154 };
155
156 static const struct ctrl_valid valid_controls[] = {
157 [SEN_OV2610] = {
158 .has_exposure = 1,
159 .has_autogain = 1,
160 },
161 [SEN_OV2610AE] = {
162 .has_exposure = 1,
163 .has_autogain = 1,
164 },
165 [SEN_OV3610] = {
166 /* No controls */
167 },
168 [SEN_OV6620] = {
169 .has_brightness = 1,
170 .has_contrast = 1,
171 .has_sat = 1,
172 .has_autobright = 1,
173 .has_freq = 1,
174 },
175 [SEN_OV6630] = {
176 .has_brightness = 1,
177 .has_contrast = 1,
178 .has_sat = 1,
179 .has_autobright = 1,
180 .has_freq = 1,
181 },
182 [SEN_OV66308AF] = {
183 .has_brightness = 1,
184 .has_contrast = 1,
185 .has_sat = 1,
186 .has_autobright = 1,
187 .has_freq = 1,
188 },
189 [SEN_OV7610] = {
190 .has_brightness = 1,
191 .has_contrast = 1,
192 .has_sat = 1,
193 .has_autobright = 1,
194 .has_freq = 1,
195 },
196 [SEN_OV7620] = {
197 .has_brightness = 1,
198 .has_contrast = 1,
199 .has_sat = 1,
200 .has_autobright = 1,
201 .has_freq = 1,
202 },
203 [SEN_OV7620AE] = {
204 .has_brightness = 1,
205 .has_contrast = 1,
206 .has_sat = 1,
207 .has_autobright = 1,
208 .has_freq = 1,
209 },
210 [SEN_OV7640] = {
211 .has_brightness = 1,
212 .has_sat = 1,
213 .has_freq = 1,
214 },
215 [SEN_OV7648] = {
216 .has_brightness = 1,
217 .has_sat = 1,
218 .has_freq = 1,
219 },
220 [SEN_OV7660] = {
221 .has_brightness = 1,
222 .has_contrast = 1,
223 .has_sat = 1,
224 .has_hvflip = 1,
225 .has_freq = 1,
226 },
227 [SEN_OV7670] = {
228 .has_brightness = 1,
229 .has_contrast = 1,
230 .has_hvflip = 1,
231 .has_freq = 1,
232 },
233 [SEN_OV76BE] = {
234 .has_brightness = 1,
235 .has_contrast = 1,
236 .has_sat = 1,
237 .has_autobright = 1,
238 .has_freq = 1,
239 },
240 [SEN_OV8610] = {
241 .has_brightness = 1,
242 .has_contrast = 1,
243 .has_sat = 1,
244 .has_autobright = 1,
245 },
246 [SEN_OV9600] = {
247 .has_exposure = 1,
248 .has_autogain = 1,
249 },
250 };
251
252 static const struct v4l2_pix_format ov519_vga_mode[] = {
253 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
254 .bytesperline = 320,
255 .sizeimage = 320 * 240 * 3 / 8 + 590,
256 .colorspace = V4L2_COLORSPACE_JPEG,
257 .priv = 1},
258 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
259 .bytesperline = 640,
260 .sizeimage = 640 * 480 * 3 / 8 + 590,
261 .colorspace = V4L2_COLORSPACE_JPEG,
262 .priv = 0},
263 };
264 static const struct v4l2_pix_format ov519_sif_mode[] = {
265 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
266 .bytesperline = 160,
267 .sizeimage = 160 * 120 * 3 / 8 + 590,
268 .colorspace = V4L2_COLORSPACE_JPEG,
269 .priv = 3},
270 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
271 .bytesperline = 176,
272 .sizeimage = 176 * 144 * 3 / 8 + 590,
273 .colorspace = V4L2_COLORSPACE_JPEG,
274 .priv = 1},
275 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
276 .bytesperline = 320,
277 .sizeimage = 320 * 240 * 3 / 8 + 590,
278 .colorspace = V4L2_COLORSPACE_JPEG,
279 .priv = 2},
280 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
281 .bytesperline = 352,
282 .sizeimage = 352 * 288 * 3 / 8 + 590,
283 .colorspace = V4L2_COLORSPACE_JPEG,
284 .priv = 0},
285 };
286
287 /* Note some of the sizeimage values for the ov511 / ov518 may seem
288 larger then necessary, however they need to be this big as the ov511 /
289 ov518 always fills the entire isoc frame, using 0 padding bytes when
290 it doesn't have any data. So with low framerates the amount of data
291 transferred can become quite large (libv4l will remove all the 0 padding
292 in userspace). */
293 static const struct v4l2_pix_format ov518_vga_mode[] = {
294 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
295 .bytesperline = 320,
296 .sizeimage = 320 * 240 * 3,
297 .colorspace = V4L2_COLORSPACE_JPEG,
298 .priv = 1},
299 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
300 .bytesperline = 640,
301 .sizeimage = 640 * 480 * 2,
302 .colorspace = V4L2_COLORSPACE_JPEG,
303 .priv = 0},
304 };
305 static const struct v4l2_pix_format ov518_sif_mode[] = {
306 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
307 .bytesperline = 160,
308 .sizeimage = 70000,
309 .colorspace = V4L2_COLORSPACE_JPEG,
310 .priv = 3},
311 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
312 .bytesperline = 176,
313 .sizeimage = 70000,
314 .colorspace = V4L2_COLORSPACE_JPEG,
315 .priv = 1},
316 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
317 .bytesperline = 320,
318 .sizeimage = 320 * 240 * 3,
319 .colorspace = V4L2_COLORSPACE_JPEG,
320 .priv = 2},
321 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
322 .bytesperline = 352,
323 .sizeimage = 352 * 288 * 3,
324 .colorspace = V4L2_COLORSPACE_JPEG,
325 .priv = 0},
326 };
327
328 static const struct v4l2_pix_format ov511_vga_mode[] = {
329 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
330 .bytesperline = 320,
331 .sizeimage = 320 * 240 * 3,
332 .colorspace = V4L2_COLORSPACE_JPEG,
333 .priv = 1},
334 {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
335 .bytesperline = 640,
336 .sizeimage = 640 * 480 * 2,
337 .colorspace = V4L2_COLORSPACE_JPEG,
338 .priv = 0},
339 };
340 static const struct v4l2_pix_format ov511_sif_mode[] = {
341 {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
342 .bytesperline = 160,
343 .sizeimage = 70000,
344 .colorspace = V4L2_COLORSPACE_JPEG,
345 .priv = 3},
346 {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
347 .bytesperline = 176,
348 .sizeimage = 70000,
349 .colorspace = V4L2_COLORSPACE_JPEG,
350 .priv = 1},
351 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
352 .bytesperline = 320,
353 .sizeimage = 320 * 240 * 3,
354 .colorspace = V4L2_COLORSPACE_JPEG,
355 .priv = 2},
356 {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
357 .bytesperline = 352,
358 .sizeimage = 352 * 288 * 3,
359 .colorspace = V4L2_COLORSPACE_JPEG,
360 .priv = 0},
361 };
362
363 static const struct v4l2_pix_format ovfx2_vga_mode[] = {
364 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
365 .bytesperline = 320,
366 .sizeimage = 320 * 240,
367 .colorspace = V4L2_COLORSPACE_SRGB,
368 .priv = 1},
369 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
370 .bytesperline = 640,
371 .sizeimage = 640 * 480,
372 .colorspace = V4L2_COLORSPACE_SRGB,
373 .priv = 0},
374 };
375 static const struct v4l2_pix_format ovfx2_cif_mode[] = {
376 {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
377 .bytesperline = 160,
378 .sizeimage = 160 * 120,
379 .colorspace = V4L2_COLORSPACE_SRGB,
380 .priv = 3},
381 {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
382 .bytesperline = 176,
383 .sizeimage = 176 * 144,
384 .colorspace = V4L2_COLORSPACE_SRGB,
385 .priv = 1},
386 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
387 .bytesperline = 320,
388 .sizeimage = 320 * 240,
389 .colorspace = V4L2_COLORSPACE_SRGB,
390 .priv = 2},
391 {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
392 .bytesperline = 352,
393 .sizeimage = 352 * 288,
394 .colorspace = V4L2_COLORSPACE_SRGB,
395 .priv = 0},
396 };
397 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
398 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
399 .bytesperline = 800,
400 .sizeimage = 800 * 600,
401 .colorspace = V4L2_COLORSPACE_SRGB,
402 .priv = 1},
403 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
404 .bytesperline = 1600,
405 .sizeimage = 1600 * 1200,
406 .colorspace = V4L2_COLORSPACE_SRGB},
407 };
408 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
409 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
410 .bytesperline = 640,
411 .sizeimage = 640 * 480,
412 .colorspace = V4L2_COLORSPACE_SRGB,
413 .priv = 1},
414 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
415 .bytesperline = 800,
416 .sizeimage = 800 * 600,
417 .colorspace = V4L2_COLORSPACE_SRGB,
418 .priv = 1},
419 {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
420 .bytesperline = 1024,
421 .sizeimage = 1024 * 768,
422 .colorspace = V4L2_COLORSPACE_SRGB,
423 .priv = 1},
424 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
425 .bytesperline = 1600,
426 .sizeimage = 1600 * 1200,
427 .colorspace = V4L2_COLORSPACE_SRGB,
428 .priv = 0},
429 {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
430 .bytesperline = 2048,
431 .sizeimage = 2048 * 1536,
432 .colorspace = V4L2_COLORSPACE_SRGB,
433 .priv = 0},
434 };
435 static const struct v4l2_pix_format ovfx2_ov9600_mode[] = {
436 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
437 .bytesperline = 640,
438 .sizeimage = 640 * 480,
439 .colorspace = V4L2_COLORSPACE_SRGB,
440 .priv = 1},
441 {1280, 1024, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
442 .bytesperline = 1280,
443 .sizeimage = 1280 * 1024,
444 .colorspace = V4L2_COLORSPACE_SRGB},
445 };
446
447 /* Registers common to OV511 / OV518 */
448 #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
449 #define R51x_SYS_RESET 0x50
450 /* Reset type flags */
451 #define OV511_RESET_OMNICE 0x08
452 #define R51x_SYS_INIT 0x53
453 #define R51x_SYS_SNAP 0x52
454 #define R51x_SYS_CUST_ID 0x5f
455 #define R51x_COMP_LUT_BEGIN 0x80
456
457 /* OV511 Camera interface register numbers */
458 #define R511_CAM_DELAY 0x10
459 #define R511_CAM_EDGE 0x11
460 #define R511_CAM_PXCNT 0x12
461 #define R511_CAM_LNCNT 0x13
462 #define R511_CAM_PXDIV 0x14
463 #define R511_CAM_LNDIV 0x15
464 #define R511_CAM_UV_EN 0x16
465 #define R511_CAM_LINE_MODE 0x17
466 #define R511_CAM_OPTS 0x18
467
468 #define R511_SNAP_FRAME 0x19
469 #define R511_SNAP_PXCNT 0x1a
470 #define R511_SNAP_LNCNT 0x1b
471 #define R511_SNAP_PXDIV 0x1c
472 #define R511_SNAP_LNDIV 0x1d
473 #define R511_SNAP_UV_EN 0x1e
474 #define R511_SNAP_OPTS 0x1f
475
476 #define R511_DRAM_FLOW_CTL 0x20
477 #define R511_FIFO_OPTS 0x31
478 #define R511_I2C_CTL 0x40
479 #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
480 #define R511_COMP_EN 0x78
481 #define R511_COMP_LUT_EN 0x79
482
483 /* OV518 Camera interface register numbers */
484 #define R518_GPIO_OUT 0x56 /* OV518(+) only */
485 #define R518_GPIO_CTL 0x57 /* OV518(+) only */
486
487 /* OV519 Camera interface register numbers */
488 #define OV519_R10_H_SIZE 0x10
489 #define OV519_R11_V_SIZE 0x11
490 #define OV519_R12_X_OFFSETL 0x12
491 #define OV519_R13_X_OFFSETH 0x13
492 #define OV519_R14_Y_OFFSETL 0x14
493 #define OV519_R15_Y_OFFSETH 0x15
494 #define OV519_R16_DIVIDER 0x16
495 #define OV519_R20_DFR 0x20
496 #define OV519_R25_FORMAT 0x25
497
498 /* OV519 System Controller register numbers */
499 #define OV519_R51_RESET1 0x51
500 #define OV519_R54_EN_CLK1 0x54
501 #define OV519_R57_SNAPSHOT 0x57
502
503 #define OV519_GPIO_DATA_OUT0 0x71
504 #define OV519_GPIO_IO_CTRL0 0x72
505
506 /*#define OV511_ENDPOINT_ADDRESS 1 * Isoc endpoint number */
507
508 /*
509 * The FX2 chip does not give us a zero length read at end of frame.
510 * It does, however, give a short read at the end of a frame, if
511 * necessary, rather than run two frames together.
512 *
513 * By choosing the right bulk transfer size, we are guaranteed to always
514 * get a short read for the last read of each frame. Frame sizes are
515 * always a composite number (width * height, or a multiple) so if we
516 * choose a prime number, we are guaranteed that the last read of a
517 * frame will be short.
518 *
519 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
520 * otherwise EOVERFLOW "babbling" errors occur. I have not been able
521 * to figure out why. [PMiller]
522 *
523 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
524 *
525 * It isn't enough to know the number of bytes per frame, in case we
526 * have data dropouts or buffer overruns (even though the FX2 double
527 * buffers, there are some pretty strict real time constraints for
528 * isochronous transfer for larger frame sizes).
529 */
530 /*jfm: this value does not work for 800x600 - see isoc_init */
531 #define OVFX2_BULK_SIZE (13 * 4096)
532
533 /* I2C registers */
534 #define R51x_I2C_W_SID 0x41
535 #define R51x_I2C_SADDR_3 0x42
536 #define R51x_I2C_SADDR_2 0x43
537 #define R51x_I2C_R_SID 0x44
538 #define R51x_I2C_DATA 0x45
539 #define R518_I2C_CTL 0x47 /* OV518(+) only */
540 #define OVFX2_I2C_ADDR 0x00
541
542 /* I2C ADDRESSES */
543 #define OV7xx0_SID 0x42
544 #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
545 #define OV8xx0_SID 0xa0
546 #define OV6xx0_SID 0xc0
547
548 /* OV7610 registers */
549 #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
550 #define OV7610_REG_BLUE 0x01 /* blue channel balance */
551 #define OV7610_REG_RED 0x02 /* red channel balance */
552 #define OV7610_REG_SAT 0x03 /* saturation */
553 #define OV8610_REG_HUE 0x04 /* 04 reserved */
554 #define OV7610_REG_CNT 0x05 /* Y contrast */
555 #define OV7610_REG_BRT 0x06 /* Y brightness */
556 #define OV7610_REG_COM_C 0x14 /* misc common regs */
557 #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
558 #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
559 #define OV7610_REG_COM_I 0x29 /* misc settings */
560
561 /* OV7660 and OV7670 registers */
562 #define OV7670_R00_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
563 #define OV7670_R01_BLUE 0x01 /* blue gain */
564 #define OV7670_R02_RED 0x02 /* red gain */
565 #define OV7670_R03_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
566 #define OV7670_R04_COM1 0x04 /* Control 1 */
567 /*#define OV7670_R07_AECHH 0x07 * AEC MS 5 bits */
568 #define OV7670_R0C_COM3 0x0c /* Control 3 */
569 #define OV7670_R0D_COM4 0x0d /* Control 4 */
570 #define OV7670_R0E_COM5 0x0e /* All "reserved" */
571 #define OV7670_R0F_COM6 0x0f /* Control 6 */
572 #define OV7670_R10_AECH 0x10 /* More bits of AEC value */
573 #define OV7670_R11_CLKRC 0x11 /* Clock control */
574 #define OV7670_R12_COM7 0x12 /* Control 7 */
575 #define OV7670_COM7_FMT_VGA 0x00
576 /*#define OV7670_COM7_YUV 0x00 * YUV */
577 #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
578 #define OV7670_COM7_FMT_MASK 0x38
579 #define OV7670_COM7_RESET 0x80 /* Register reset */
580 #define OV7670_R13_COM8 0x13 /* Control 8 */
581 #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
582 #define OV7670_COM8_AWB 0x02 /* White balance enable */
583 #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
584 #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
585 #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
586 #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
587 #define OV7670_R14_COM9 0x14 /* Control 9 - gain ceiling */
588 #define OV7670_R15_COM10 0x15 /* Control 10 */
589 #define OV7670_R17_HSTART 0x17 /* Horiz start high bits */
590 #define OV7670_R18_HSTOP 0x18 /* Horiz stop high bits */
591 #define OV7670_R19_VSTART 0x19 /* Vert start high bits */
592 #define OV7670_R1A_VSTOP 0x1a /* Vert stop high bits */
593 #define OV7670_R1E_MVFP 0x1e /* Mirror / vflip */
594 #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
595 #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
596 #define OV7670_R24_AEW 0x24 /* AGC upper limit */
597 #define OV7670_R25_AEB 0x25 /* AGC lower limit */
598 #define OV7670_R26_VPT 0x26 /* AGC/AEC fast mode op region */
599 #define OV7670_R32_HREF 0x32 /* HREF pieces */
600 #define OV7670_R3A_TSLB 0x3a /* lots of stuff */
601 #define OV7670_R3B_COM11 0x3b /* Control 11 */
602 #define OV7670_COM11_EXP 0x02
603 #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
604 #define OV7670_R3C_COM12 0x3c /* Control 12 */
605 #define OV7670_R3D_COM13 0x3d /* Control 13 */
606 #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
607 #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
608 #define OV7670_R3E_COM14 0x3e /* Control 14 */
609 #define OV7670_R3F_EDGE 0x3f /* Edge enhancement factor */
610 #define OV7670_R40_COM15 0x40 /* Control 15 */
611 /*#define OV7670_COM15_R00FF 0xc0 * 00 to FF */
612 #define OV7670_R41_COM16 0x41 /* Control 16 */
613 #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
614 /* end of ov7660 common registers */
615 #define OV7670_R55_BRIGHT 0x55 /* Brightness */
616 #define OV7670_R56_CONTRAS 0x56 /* Contrast control */
617 #define OV7670_R69_GFIX 0x69 /* Fix gain control */
618 /*#define OV7670_R8C_RGB444 0x8c * RGB 444 control */
619 #define OV7670_R9F_HAECC1 0x9f /* Hist AEC/AGC control 1 */
620 #define OV7670_RA0_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
621 #define OV7670_RA5_BD50MAX 0xa5 /* 50hz banding step limit */
622 #define OV7670_RA6_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
623 #define OV7670_RA7_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
624 #define OV7670_RA8_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
625 #define OV7670_RA9_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
626 #define OV7670_RAA_HAECC7 0xaa /* Hist AEC/AGC control 7 */
627 #define OV7670_RAB_BD60MAX 0xab /* 60hz banding step limit */
628
629 struct ov_regvals {
630 u8 reg;
631 u8 val;
632 };
633 struct ov_i2c_regvals {
634 u8 reg;
635 u8 val;
636 };
637
638 /* Settings for OV2610 camera chip */
639 static const struct ov_i2c_regvals norm_2610[] = {
640 { 0x12, 0x80 }, /* reset */
641 };
642
643 static const struct ov_i2c_regvals norm_2610ae[] = {
644 {0x12, 0x80}, /* reset */
645 {0x13, 0xcd},
646 {0x09, 0x01},
647 {0x0d, 0x00},
648 {0x11, 0x80},
649 {0x12, 0x20}, /* 1600x1200 */
650 {0x33, 0x0c},
651 {0x35, 0x90},
652 {0x36, 0x37},
653 /* ms-win traces */
654 {0x11, 0x83}, /* clock / 3 ? */
655 {0x2d, 0x00}, /* 60 Hz filter */
656 {0x24, 0xb0}, /* normal colors */
657 {0x25, 0x90},
658 {0x10, 0x43},
659 };
660
661 static const struct ov_i2c_regvals norm_3620b[] = {
662 /*
663 * From the datasheet: "Note that after writing to register COMH
664 * (0x12) to change the sensor mode, registers related to the
665 * sensor’s cropping window will be reset back to their default
666 * values."
667 *
668 * "wait 4096 external clock ... to make sure the sensor is
669 * stable and ready to access registers" i.e. 160us at 24MHz
670 */
671 { 0x12, 0x80 }, /* COMH reset */
672 { 0x12, 0x00 }, /* QXGA, master */
673
674 /*
675 * 11 CLKRC "Clock Rate Control"
676 * [7] internal frequency doublers: on
677 * [6] video port mode: master
678 * [5:0] clock divider: 1
679 */
680 { 0x11, 0x80 },
681
682 /*
683 * 13 COMI "Common Control I"
684 * = 192 (0xC0) 11000000
685 * COMI[7] "AEC speed selection"
686 * = 1 (0x01) 1....... "Faster AEC correction"
687 * COMI[6] "AEC speed step selection"
688 * = 1 (0x01) .1...... "Big steps, fast"
689 * COMI[5] "Banding filter on off"
690 * = 0 (0x00) ..0..... "Off"
691 * COMI[4] "Banding filter option"
692 * = 0 (0x00) ...0.... "Main clock is 48 MHz and
693 * the PLL is ON"
694 * COMI[3] "Reserved"
695 * = 0 (0x00) ....0...
696 * COMI[2] "AGC auto manual control selection"
697 * = 0 (0x00) .....0.. "Manual"
698 * COMI[1] "AWB auto manual control selection"
699 * = 0 (0x00) ......0. "Manual"
700 * COMI[0] "Exposure control"
701 * = 0 (0x00) .......0 "Manual"
702 */
703 { 0x13, 0xc0 },
704
705 /*
706 * 09 COMC "Common Control C"
707 * = 8 (0x08) 00001000
708 * COMC[7:5] "Reserved"
709 * = 0 (0x00) 000.....
710 * COMC[4] "Sleep Mode Enable"
711 * = 0 (0x00) ...0.... "Normal mode"
712 * COMC[3:2] "Sensor sampling reset timing selection"
713 * = 2 (0x02) ....10.. "Longer reset time"
714 * COMC[1:0] "Output drive current select"
715 * = 0 (0x00) ......00 "Weakest"
716 */
717 { 0x09, 0x08 },
718
719 /*
720 * 0C COMD "Common Control D"
721 * = 8 (0x08) 00001000
722 * COMD[7] "Reserved"
723 * = 0 (0x00) 0.......
724 * COMD[6] "Swap MSB and LSB at the output port"
725 * = 0 (0x00) .0...... "False"
726 * COMD[5:3] "Reserved"
727 * = 1 (0x01) ..001...
728 * COMD[2] "Output Average On Off"
729 * = 0 (0x00) .....0.. "Output Normal"
730 * COMD[1] "Sensor precharge voltage selection"
731 * = 0 (0x00) ......0. "Selects internal
732 * reference precharge
733 * voltage"
734 * COMD[0] "Snapshot option"
735 * = 0 (0x00) .......0 "Enable live video output
736 * after snapshot sequence"
737 */
738 { 0x0c, 0x08 },
739
740 /*
741 * 0D COME "Common Control E"
742 * = 161 (0xA1) 10100001
743 * COME[7] "Output average option"
744 * = 1 (0x01) 1....... "Output average of 4 pixels"
745 * COME[6] "Anti-blooming control"
746 * = 0 (0x00) .0...... "Off"
747 * COME[5:3] "Reserved"
748 * = 4 (0x04) ..100...
749 * COME[2] "Clock output power down pin status"
750 * = 0 (0x00) .....0.. "Tri-state data output pin
751 * on power down"
752 * COME[1] "Data output pin status selection at power down"
753 * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
754 * HREF, and CHSYNC pins on
755 * power down"
756 * COME[0] "Auto zero circuit select"
757 * = 1 (0x01) .......1 "On"
758 */
759 { 0x0d, 0xa1 },
760
761 /*
762 * 0E COMF "Common Control F"
763 * = 112 (0x70) 01110000
764 * COMF[7] "System clock selection"
765 * = 0 (0x00) 0....... "Use 24 MHz system clock"
766 * COMF[6:4] "Reserved"
767 * = 7 (0x07) .111....
768 * COMF[3] "Manual auto negative offset canceling selection"
769 * = 0 (0x00) ....0... "Auto detect negative
770 * offset and cancel it"
771 * COMF[2:0] "Reserved"
772 * = 0 (0x00) .....000
773 */
774 { 0x0e, 0x70 },
775
776 /*
777 * 0F COMG "Common Control G"
778 * = 66 (0x42) 01000010
779 * COMG[7] "Optical black output selection"
780 * = 0 (0x00) 0....... "Disable"
781 * COMG[6] "Black level calibrate selection"
782 * = 1 (0x01) .1...... "Use optical black pixels
783 * to calibrate"
784 * COMG[5:4] "Reserved"
785 * = 0 (0x00) ..00....
786 * COMG[3] "Channel offset adjustment"
787 * = 0 (0x00) ....0... "Disable offset adjustment"
788 * COMG[2] "ADC black level calibration option"
789 * = 0 (0x00) .....0.. "Use B/G line and G/R
790 * line to calibrate each
791 * channel's black level"
792 * COMG[1] "Reserved"
793 * = 1 (0x01) ......1.
794 * COMG[0] "ADC black level calibration enable"
795 * = 0 (0x00) .......0 "Disable"
796 */
797 { 0x0f, 0x42 },
798
799 /*
800 * 14 COMJ "Common Control J"
801 * = 198 (0xC6) 11000110
802 * COMJ[7:6] "AGC gain ceiling"
803 * = 3 (0x03) 11...... "8x"
804 * COMJ[5:4] "Reserved"
805 * = 0 (0x00) ..00....
806 * COMJ[3] "Auto banding filter"
807 * = 0 (0x00) ....0... "Banding filter is always
808 * on off depending on
809 * COMI[5] setting"
810 * COMJ[2] "VSYNC drop option"
811 * = 1 (0x01) .....1.. "SYNC is dropped if frame
812 * data is dropped"
813 * COMJ[1] "Frame data drop"
814 * = 1 (0x01) ......1. "Drop frame data if
815 * exposure is not within
816 * tolerance. In AEC mode,
817 * data is normally dropped
818 * when data is out of
819 * range."
820 * COMJ[0] "Reserved"
821 * = 0 (0x00) .......0
822 */
823 { 0x14, 0xc6 },
824
825 /*
826 * 15 COMK "Common Control K"
827 * = 2 (0x02) 00000010
828 * COMK[7] "CHSYNC pin output swap"
829 * = 0 (0x00) 0....... "CHSYNC"
830 * COMK[6] "HREF pin output swap"
831 * = 0 (0x00) .0...... "HREF"
832 * COMK[5] "PCLK output selection"
833 * = 0 (0x00) ..0..... "PCLK always output"
834 * COMK[4] "PCLK edge selection"
835 * = 0 (0x00) ...0.... "Data valid on falling edge"
836 * COMK[3] "HREF output polarity"
837 * = 0 (0x00) ....0... "positive"
838 * COMK[2] "Reserved"
839 * = 0 (0x00) .....0..
840 * COMK[1] "VSYNC polarity"
841 * = 1 (0x01) ......1. "negative"
842 * COMK[0] "HSYNC polarity"
843 * = 0 (0x00) .......0 "positive"
844 */
845 { 0x15, 0x02 },
846
847 /*
848 * 33 CHLF "Current Control"
849 * = 9 (0x09) 00001001
850 * CHLF[7:6] "Sensor current control"
851 * = 0 (0x00) 00......
852 * CHLF[5] "Sensor current range control"
853 * = 0 (0x00) ..0..... "normal range"
854 * CHLF[4] "Sensor current"
855 * = 0 (0x00) ...0.... "normal current"
856 * CHLF[3] "Sensor buffer current control"
857 * = 1 (0x01) ....1... "half current"
858 * CHLF[2] "Column buffer current control"
859 * = 0 (0x00) .....0.. "normal current"
860 * CHLF[1] "Analog DSP current control"
861 * = 0 (0x00) ......0. "normal current"
862 * CHLF[1] "ADC current control"
863 * = 0 (0x00) ......0. "normal current"
864 */
865 { 0x33, 0x09 },
866
867 /*
868 * 34 VBLM "Blooming Control"
869 * = 80 (0x50) 01010000
870 * VBLM[7] "Hard soft reset switch"
871 * = 0 (0x00) 0....... "Hard reset"
872 * VBLM[6:4] "Blooming voltage selection"
873 * = 5 (0x05) .101....
874 * VBLM[3:0] "Sensor current control"
875 * = 0 (0x00) ....0000
876 */
877 { 0x34, 0x50 },
878
879 /*
880 * 36 VCHG "Sensor Precharge Voltage Control"
881 * = 0 (0x00) 00000000
882 * VCHG[7] "Reserved"
883 * = 0 (0x00) 0.......
884 * VCHG[6:4] "Sensor precharge voltage control"
885 * = 0 (0x00) .000....
886 * VCHG[3:0] "Sensor array common reference"
887 * = 0 (0x00) ....0000
888 */
889 { 0x36, 0x00 },
890
891 /*
892 * 37 ADC "ADC Reference Control"
893 * = 4 (0x04) 00000100
894 * ADC[7:4] "Reserved"
895 * = 0 (0x00) 0000....
896 * ADC[3] "ADC input signal range"
897 * = 0 (0x00) ....0... "Input signal 1.0x"
898 * ADC[2:0] "ADC range control"
899 * = 4 (0x04) .....100
900 */
901 { 0x37, 0x04 },
902
903 /*
904 * 38 ACOM "Analog Common Ground"
905 * = 82 (0x52) 01010010
906 * ACOM[7] "Analog gain control"
907 * = 0 (0x00) 0....... "Gain 1x"
908 * ACOM[6] "Analog black level calibration"
909 * = 1 (0x01) .1...... "On"
910 * ACOM[5:0] "Reserved"
911 * = 18 (0x12) ..010010
912 */
913 { 0x38, 0x52 },
914
915 /*
916 * 3A FREFA "Internal Reference Adjustment"
917 * = 0 (0x00) 00000000
918 * FREFA[7:0] "Range"
919 * = 0 (0x00) 00000000
920 */
921 { 0x3a, 0x00 },
922
923 /*
924 * 3C FVOPT "Internal Reference Adjustment"
925 * = 31 (0x1F) 00011111
926 * FVOPT[7:0] "Range"
927 * = 31 (0x1F) 00011111
928 */
929 { 0x3c, 0x1f },
930
931 /*
932 * 44 Undocumented = 0 (0x00) 00000000
933 * 44[7:0] "It's a secret"
934 * = 0 (0x00) 00000000
935 */
936 { 0x44, 0x00 },
937
938 /*
939 * 40 Undocumented = 0 (0x00) 00000000
940 * 40[7:0] "It's a secret"
941 * = 0 (0x00) 00000000
942 */
943 { 0x40, 0x00 },
944
945 /*
946 * 41 Undocumented = 0 (0x00) 00000000
947 * 41[7:0] "It's a secret"
948 * = 0 (0x00) 00000000
949 */
950 { 0x41, 0x00 },
951
952 /*
953 * 42 Undocumented = 0 (0x00) 00000000
954 * 42[7:0] "It's a secret"
955 * = 0 (0x00) 00000000
956 */
957 { 0x42, 0x00 },
958
959 /*
960 * 43 Undocumented = 0 (0x00) 00000000
961 * 43[7:0] "It's a secret"
962 * = 0 (0x00) 00000000
963 */
964 { 0x43, 0x00 },
965
966 /*
967 * 45 Undocumented = 128 (0x80) 10000000
968 * 45[7:0] "It's a secret"
969 * = 128 (0x80) 10000000
970 */
971 { 0x45, 0x80 },
972
973 /*
974 * 48 Undocumented = 192 (0xC0) 11000000
975 * 48[7:0] "It's a secret"
976 * = 192 (0xC0) 11000000
977 */
978 { 0x48, 0xc0 },
979
980 /*
981 * 49 Undocumented = 25 (0x19) 00011001
982 * 49[7:0] "It's a secret"
983 * = 25 (0x19) 00011001
984 */
985 { 0x49, 0x19 },
986
987 /*
988 * 4B Undocumented = 128 (0x80) 10000000
989 * 4B[7:0] "It's a secret"
990 * = 128 (0x80) 10000000
991 */
992 { 0x4b, 0x80 },
993
994 /*
995 * 4D Undocumented = 196 (0xC4) 11000100
996 * 4D[7:0] "It's a secret"
997 * = 196 (0xC4) 11000100
998 */
999 { 0x4d, 0xc4 },
1000
1001 /*
1002 * 35 VREF "Reference Voltage Control"
1003 * = 76 (0x4c) 01001100
1004 * VREF[7:5] "Column high reference control"
1005 * = 2 (0x02) 010..... "higher voltage"
1006 * VREF[4:2] "Column low reference control"
1007 * = 3 (0x03) ...011.. "Highest voltage"
1008 * VREF[1:0] "Reserved"
1009 * = 0 (0x00) ......00
1010 */
1011 { 0x35, 0x4c },
1012
1013 /*
1014 * 3D Undocumented = 0 (0x00) 00000000
1015 * 3D[7:0] "It's a secret"
1016 * = 0 (0x00) 00000000
1017 */
1018 { 0x3d, 0x00 },
1019
1020 /*
1021 * 3E Undocumented = 0 (0x00) 00000000
1022 * 3E[7:0] "It's a secret"
1023 * = 0 (0x00) 00000000
1024 */
1025 { 0x3e, 0x00 },
1026
1027 /*
1028 * 3B FREFB "Internal Reference Adjustment"
1029 * = 24 (0x18) 00011000
1030 * FREFB[7:0] "Range"
1031 * = 24 (0x18) 00011000
1032 */
1033 { 0x3b, 0x18 },
1034
1035 /*
1036 * 33 CHLF "Current Control"
1037 * = 25 (0x19) 00011001
1038 * CHLF[7:6] "Sensor current control"
1039 * = 0 (0x00) 00......
1040 * CHLF[5] "Sensor current range control"
1041 * = 0 (0x00) ..0..... "normal range"
1042 * CHLF[4] "Sensor current"
1043 * = 1 (0x01) ...1.... "double current"
1044 * CHLF[3] "Sensor buffer current control"
1045 * = 1 (0x01) ....1... "half current"
1046 * CHLF[2] "Column buffer current control"
1047 * = 0 (0x00) .....0.. "normal current"
1048 * CHLF[1] "Analog DSP current control"
1049 * = 0 (0x00) ......0. "normal current"
1050 * CHLF[1] "ADC current control"
1051 * = 0 (0x00) ......0. "normal current"
1052 */
1053 { 0x33, 0x19 },
1054
1055 /*
1056 * 34 VBLM "Blooming Control"
1057 * = 90 (0x5A) 01011010
1058 * VBLM[7] "Hard soft reset switch"
1059 * = 0 (0x00) 0....... "Hard reset"
1060 * VBLM[6:4] "Blooming voltage selection"
1061 * = 5 (0x05) .101....
1062 * VBLM[3:0] "Sensor current control"
1063 * = 10 (0x0A) ....1010
1064 */
1065 { 0x34, 0x5a },
1066
1067 /*
1068 * 3B FREFB "Internal Reference Adjustment"
1069 * = 0 (0x00) 00000000
1070 * FREFB[7:0] "Range"
1071 * = 0 (0x00) 00000000
1072 */
1073 { 0x3b, 0x00 },
1074
1075 /*
1076 * 33 CHLF "Current Control"
1077 * = 9 (0x09) 00001001
1078 * CHLF[7:6] "Sensor current control"
1079 * = 0 (0x00) 00......
1080 * CHLF[5] "Sensor current range control"
1081 * = 0 (0x00) ..0..... "normal range"
1082 * CHLF[4] "Sensor current"
1083 * = 0 (0x00) ...0.... "normal current"
1084 * CHLF[3] "Sensor buffer current control"
1085 * = 1 (0x01) ....1... "half current"
1086 * CHLF[2] "Column buffer current control"
1087 * = 0 (0x00) .....0.. "normal current"
1088 * CHLF[1] "Analog DSP current control"
1089 * = 0 (0x00) ......0. "normal current"
1090 * CHLF[1] "ADC current control"
1091 * = 0 (0x00) ......0. "normal current"
1092 */
1093 { 0x33, 0x09 },
1094
1095 /*
1096 * 34 VBLM "Blooming Control"
1097 * = 80 (0x50) 01010000
1098 * VBLM[7] "Hard soft reset switch"
1099 * = 0 (0x00) 0....... "Hard reset"
1100 * VBLM[6:4] "Blooming voltage selection"
1101 * = 5 (0x05) .101....
1102 * VBLM[3:0] "Sensor current control"
1103 * = 0 (0x00) ....0000
1104 */
1105 { 0x34, 0x50 },
1106
1107 /*
1108 * 12 COMH "Common Control H"
1109 * = 64 (0x40) 01000000
1110 * COMH[7] "SRST"
1111 * = 0 (0x00) 0....... "No-op"
1112 * COMH[6:4] "Resolution selection"
1113 * = 4 (0x04) .100.... "XGA"
1114 * COMH[3] "Master slave selection"
1115 * = 0 (0x00) ....0... "Master mode"
1116 * COMH[2] "Internal B/R channel option"
1117 * = 0 (0x00) .....0.. "B/R use same channel"
1118 * COMH[1] "Color bar test pattern"
1119 * = 0 (0x00) ......0. "Off"
1120 * COMH[0] "Reserved"
1121 * = 0 (0x00) .......0
1122 */
1123 { 0x12, 0x40 },
1124
1125 /*
1126 * 17 HREFST "Horizontal window start"
1127 * = 31 (0x1F) 00011111
1128 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1129 * = 31 (0x1F) 00011111
1130 */
1131 { 0x17, 0x1f },
1132
1133 /*
1134 * 18 HREFEND "Horizontal window end"
1135 * = 95 (0x5F) 01011111
1136 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1137 * = 95 (0x5F) 01011111
1138 */
1139 { 0x18, 0x5f },
1140
1141 /*
1142 * 19 VSTRT "Vertical window start"
1143 * = 0 (0x00) 00000000
1144 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1145 * = 0 (0x00) 00000000
1146 */
1147 { 0x19, 0x00 },
1148
1149 /*
1150 * 1A VEND "Vertical window end"
1151 * = 96 (0x60) 01100000
1152 * VEND[7:0] "Vertical Window End, 8 MSBs"
1153 * = 96 (0x60) 01100000
1154 */
1155 { 0x1a, 0x60 },
1156
1157 /*
1158 * 32 COMM "Common Control M"
1159 * = 18 (0x12) 00010010
1160 * COMM[7:6] "Pixel clock divide option"
1161 * = 0 (0x00) 00...... "/1"
1162 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1163 * = 2 (0x02) ..010...
1164 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1165 * = 2 (0x02) .....010
1166 */
1167 { 0x32, 0x12 },
1168
1169 /*
1170 * 03 COMA "Common Control A"
1171 * = 74 (0x4A) 01001010
1172 * COMA[7:4] "AWB Update Threshold"
1173 * = 4 (0x04) 0100....
1174 * COMA[3:2] "Vertical window end line control 2 LSBs"
1175 * = 2 (0x02) ....10..
1176 * COMA[1:0] "Vertical window start line control 2 LSBs"
1177 * = 2 (0x02) ......10
1178 */
1179 { 0x03, 0x4a },
1180
1181 /*
1182 * 11 CLKRC "Clock Rate Control"
1183 * = 128 (0x80) 10000000
1184 * CLKRC[7] "Internal frequency doublers on off seclection"
1185 * = 1 (0x01) 1....... "On"
1186 * CLKRC[6] "Digital video master slave selection"
1187 * = 0 (0x00) .0...... "Master mode, sensor
1188 * provides PCLK"
1189 * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1190 * = 0 (0x00) ..000000
1191 */
1192 { 0x11, 0x80 },
1193
1194 /*
1195 * 12 COMH "Common Control H"
1196 * = 0 (0x00) 00000000
1197 * COMH[7] "SRST"
1198 * = 0 (0x00) 0....... "No-op"
1199 * COMH[6:4] "Resolution selection"
1200 * = 0 (0x00) .000.... "QXGA"
1201 * COMH[3] "Master slave selection"
1202 * = 0 (0x00) ....0... "Master mode"
1203 * COMH[2] "Internal B/R channel option"
1204 * = 0 (0x00) .....0.. "B/R use same channel"
1205 * COMH[1] "Color bar test pattern"
1206 * = 0 (0x00) ......0. "Off"
1207 * COMH[0] "Reserved"
1208 * = 0 (0x00) .......0
1209 */
1210 { 0x12, 0x00 },
1211
1212 /*
1213 * 12 COMH "Common Control H"
1214 * = 64 (0x40) 01000000
1215 * COMH[7] "SRST"
1216 * = 0 (0x00) 0....... "No-op"
1217 * COMH[6:4] "Resolution selection"
1218 * = 4 (0x04) .100.... "XGA"
1219 * COMH[3] "Master slave selection"
1220 * = 0 (0x00) ....0... "Master mode"
1221 * COMH[2] "Internal B/R channel option"
1222 * = 0 (0x00) .....0.. "B/R use same channel"
1223 * COMH[1] "Color bar test pattern"
1224 * = 0 (0x00) ......0. "Off"
1225 * COMH[0] "Reserved"
1226 * = 0 (0x00) .......0
1227 */
1228 { 0x12, 0x40 },
1229
1230 /*
1231 * 17 HREFST "Horizontal window start"
1232 * = 31 (0x1F) 00011111
1233 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1234 * = 31 (0x1F) 00011111
1235 */
1236 { 0x17, 0x1f },
1237
1238 /*
1239 * 18 HREFEND "Horizontal window end"
1240 * = 95 (0x5F) 01011111
1241 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1242 * = 95 (0x5F) 01011111
1243 */
1244 { 0x18, 0x5f },
1245
1246 /*
1247 * 19 VSTRT "Vertical window start"
1248 * = 0 (0x00) 00000000
1249 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1250 * = 0 (0x00) 00000000
1251 */
1252 { 0x19, 0x00 },
1253
1254 /*
1255 * 1A VEND "Vertical window end"
1256 * = 96 (0x60) 01100000
1257 * VEND[7:0] "Vertical Window End, 8 MSBs"
1258 * = 96 (0x60) 01100000
1259 */
1260 { 0x1a, 0x60 },
1261
1262 /*
1263 * 32 COMM "Common Control M"
1264 * = 18 (0x12) 00010010
1265 * COMM[7:6] "Pixel clock divide option"
1266 * = 0 (0x00) 00...... "/1"
1267 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1268 * = 2 (0x02) ..010...
1269 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1270 * = 2 (0x02) .....010
1271 */
1272 { 0x32, 0x12 },
1273
1274 /*
1275 * 03 COMA "Common Control A"
1276 * = 74 (0x4A) 01001010
1277 * COMA[7:4] "AWB Update Threshold"
1278 * = 4 (0x04) 0100....
1279 * COMA[3:2] "Vertical window end line control 2 LSBs"
1280 * = 2 (0x02) ....10..
1281 * COMA[1:0] "Vertical window start line control 2 LSBs"
1282 * = 2 (0x02) ......10
1283 */
1284 { 0x03, 0x4a },
1285
1286 /*
1287 * 02 RED "Red Gain Control"
1288 * = 175 (0xAF) 10101111
1289 * RED[7] "Action"
1290 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1291 * RED[6:0] "Value"
1292 * = 47 (0x2F) .0101111
1293 */
1294 { 0x02, 0xaf },
1295
1296 /*
1297 * 2D ADDVSL "VSYNC Pulse Width"
1298 * = 210 (0xD2) 11010010
1299 * ADDVSL[7:0] "VSYNC pulse width, LSB"
1300 * = 210 (0xD2) 11010010
1301 */
1302 { 0x2d, 0xd2 },
1303
1304 /*
1305 * 00 GAIN = 24 (0x18) 00011000
1306 * GAIN[7:6] "Reserved"
1307 * = 0 (0x00) 00......
1308 * GAIN[5] "Double"
1309 * = 0 (0x00) ..0..... "False"
1310 * GAIN[4] "Double"
1311 * = 1 (0x01) ...1.... "True"
1312 * GAIN[3:0] "Range"
1313 * = 8 (0x08) ....1000
1314 */
1315 { 0x00, 0x18 },
1316
1317 /*
1318 * 01 BLUE "Blue Gain Control"
1319 * = 240 (0xF0) 11110000
1320 * BLUE[7] "Action"
1321 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1322 * BLUE[6:0] "Value"
1323 * = 112 (0x70) .1110000
1324 */
1325 { 0x01, 0xf0 },
1326
1327 /*
1328 * 10 AEC "Automatic Exposure Control"
1329 * = 10 (0x0A) 00001010
1330 * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1331 * = 10 (0x0A) 00001010
1332 */
1333 { 0x10, 0x0a },
1334
1335 { 0xe1, 0x67 },
1336 { 0xe3, 0x03 },
1337 { 0xe4, 0x26 },
1338 { 0xe5, 0x3e },
1339 { 0xf8, 0x01 },
1340 { 0xff, 0x01 },
1341 };
1342
1343 static const struct ov_i2c_regvals norm_6x20[] = {
1344 { 0x12, 0x80 }, /* reset */
1345 { 0x11, 0x01 },
1346 { 0x03, 0x60 },
1347 { 0x05, 0x7f }, /* For when autoadjust is off */
1348 { 0x07, 0xa8 },
1349 /* The ratio of 0x0c and 0x0d controls the white point */
1350 { 0x0c, 0x24 },
1351 { 0x0d, 0x24 },
1352 { 0x0f, 0x15 }, /* COMS */
1353 { 0x10, 0x75 }, /* AEC Exposure time */
1354 { 0x12, 0x24 }, /* Enable AGC */
1355 { 0x14, 0x04 },
1356 /* 0x16: 0x06 helps frame stability with moving objects */
1357 { 0x16, 0x06 },
1358 /* { 0x20, 0x30 }, * Aperture correction enable */
1359 { 0x26, 0xb2 }, /* BLC enable */
1360 /* 0x28: 0x05 Selects RGB format if RGB on */
1361 { 0x28, 0x05 },
1362 { 0x2a, 0x04 }, /* Disable framerate adjust */
1363 /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
1364 { 0x2d, 0x85 },
1365 { 0x33, 0xa0 }, /* Color Processing Parameter */
1366 { 0x34, 0xd2 }, /* Max A/D range */
1367 { 0x38, 0x8b },
1368 { 0x39, 0x40 },
1369
1370 { 0x3c, 0x39 }, /* Enable AEC mode changing */
1371 { 0x3c, 0x3c }, /* Change AEC mode */
1372 { 0x3c, 0x24 }, /* Disable AEC mode changing */
1373
1374 { 0x3d, 0x80 },
1375 /* These next two registers (0x4a, 0x4b) are undocumented.
1376 * They control the color balance */
1377 { 0x4a, 0x80 },
1378 { 0x4b, 0x80 },
1379 { 0x4d, 0xd2 }, /* This reduces noise a bit */
1380 { 0x4e, 0xc1 },
1381 { 0x4f, 0x04 },
1382 /* Do 50-53 have any effect? */
1383 /* Toggle 0x12[2] off and on here? */
1384 };
1385
1386 static const struct ov_i2c_regvals norm_6x30[] = {
1387 { 0x12, 0x80 }, /* Reset */
1388 { 0x00, 0x1f }, /* Gain */
1389 { 0x01, 0x99 }, /* Blue gain */
1390 { 0x02, 0x7c }, /* Red gain */
1391 { 0x03, 0xc0 }, /* Saturation */
1392 { 0x05, 0x0a }, /* Contrast */
1393 { 0x06, 0x95 }, /* Brightness */
1394 { 0x07, 0x2d }, /* Sharpness */
1395 { 0x0c, 0x20 },
1396 { 0x0d, 0x20 },
1397 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1398 { 0x0f, 0x05 },
1399 { 0x10, 0x9a },
1400 { 0x11, 0x00 }, /* Pixel clock = fastest */
1401 { 0x12, 0x24 }, /* Enable AGC and AWB */
1402 { 0x13, 0x21 },
1403 { 0x14, 0x80 },
1404 { 0x15, 0x01 },
1405 { 0x16, 0x03 },
1406 { 0x17, 0x38 },
1407 { 0x18, 0xea },
1408 { 0x19, 0x04 },
1409 { 0x1a, 0x93 },
1410 { 0x1b, 0x00 },
1411 { 0x1e, 0xc4 },
1412 { 0x1f, 0x04 },
1413 { 0x20, 0x20 },
1414 { 0x21, 0x10 },
1415 { 0x22, 0x88 },
1416 { 0x23, 0xc0 }, /* Crystal circuit power level */
1417 { 0x25, 0x9a }, /* Increase AEC black ratio */
1418 { 0x26, 0xb2 }, /* BLC enable */
1419 { 0x27, 0xa2 },
1420 { 0x28, 0x00 },
1421 { 0x29, 0x00 },
1422 { 0x2a, 0x84 }, /* 60 Hz power */
1423 { 0x2b, 0xa8 }, /* 60 Hz power */
1424 { 0x2c, 0xa0 },
1425 { 0x2d, 0x95 }, /* Enable auto-brightness */
1426 { 0x2e, 0x88 },
1427 { 0x33, 0x26 },
1428 { 0x34, 0x03 },
1429 { 0x36, 0x8f },
1430 { 0x37, 0x80 },
1431 { 0x38, 0x83 },
1432 { 0x39, 0x80 },
1433 { 0x3a, 0x0f },
1434 { 0x3b, 0x3c },
1435 { 0x3c, 0x1a },
1436 { 0x3d, 0x80 },
1437 { 0x3e, 0x80 },
1438 { 0x3f, 0x0e },
1439 { 0x40, 0x00 }, /* White bal */
1440 { 0x41, 0x00 }, /* White bal */
1441 { 0x42, 0x80 },
1442 { 0x43, 0x3f }, /* White bal */
1443 { 0x44, 0x80 },
1444 { 0x45, 0x20 },
1445 { 0x46, 0x20 },
1446 { 0x47, 0x80 },
1447 { 0x48, 0x7f },
1448 { 0x49, 0x00 },
1449 { 0x4a, 0x00 },
1450 { 0x4b, 0x80 },
1451 { 0x4c, 0xd0 },
1452 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1453 { 0x4e, 0x40 },
1454 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1455 { 0x50, 0xff },
1456 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1457 { 0x55, 0xff },
1458 { 0x56, 0x12 },
1459 { 0x57, 0x81 },
1460 { 0x58, 0x75 },
1461 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1462 { 0x5a, 0x2c },
1463 { 0x5b, 0x0f }, /* AWB chrominance levels */
1464 { 0x5c, 0x10 },
1465 { 0x3d, 0x80 },
1466 { 0x27, 0xa6 },
1467 { 0x12, 0x20 }, /* Toggle AWB */
1468 { 0x12, 0x24 },
1469 };
1470
1471 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
1472 *
1473 * Register 0x0f in the 7610 has the following effects:
1474 *
1475 * 0x85 (AEC method 1): Best overall, good contrast range
1476 * 0x45 (AEC method 2): Very overexposed
1477 * 0xa5 (spec sheet default): Ok, but the black level is
1478 * shifted resulting in loss of contrast
1479 * 0x05 (old driver setting): very overexposed, too much
1480 * contrast
1481 */
1482 static const struct ov_i2c_regvals norm_7610[] = {
1483 { 0x10, 0xff },
1484 { 0x16, 0x06 },
1485 { 0x28, 0x24 },
1486 { 0x2b, 0xac },
1487 { 0x12, 0x00 },
1488 { 0x38, 0x81 },
1489 { 0x28, 0x24 }, /* 0c */
1490 { 0x0f, 0x85 }, /* lg's setting */
1491 { 0x15, 0x01 },
1492 { 0x20, 0x1c },
1493 { 0x23, 0x2a },
1494 { 0x24, 0x10 },
1495 { 0x25, 0x8a },
1496 { 0x26, 0xa2 },
1497 { 0x27, 0xc2 },
1498 { 0x2a, 0x04 },
1499 { 0x2c, 0xfe },
1500 { 0x2d, 0x93 },
1501 { 0x30, 0x71 },
1502 { 0x31, 0x60 },
1503 { 0x32, 0x26 },
1504 { 0x33, 0x20 },
1505 { 0x34, 0x48 },
1506 { 0x12, 0x24 },
1507 { 0x11, 0x01 },
1508 { 0x0c, 0x24 },
1509 { 0x0d, 0x24 },
1510 };
1511
1512 static const struct ov_i2c_regvals norm_7620[] = {
1513 { 0x12, 0x80 }, /* reset */
1514 { 0x00, 0x00 }, /* gain */
1515 { 0x01, 0x80 }, /* blue gain */
1516 { 0x02, 0x80 }, /* red gain */
1517 { 0x03, 0xc0 }, /* OV7670_R03_VREF */
1518 { 0x06, 0x60 },
1519 { 0x07, 0x00 },
1520 { 0x0c, 0x24 },
1521 { 0x0c, 0x24 },
1522 { 0x0d, 0x24 },
1523 { 0x11, 0x01 },
1524 { 0x12, 0x24 },
1525 { 0x13, 0x01 },
1526 { 0x14, 0x84 },
1527 { 0x15, 0x01 },
1528 { 0x16, 0x03 },
1529 { 0x17, 0x2f },
1530 { 0x18, 0xcf },
1531 { 0x19, 0x06 },
1532 { 0x1a, 0xf5 },
1533 { 0x1b, 0x00 },
1534 { 0x20, 0x18 },
1535 { 0x21, 0x80 },
1536 { 0x22, 0x80 },
1537 { 0x23, 0x00 },
1538 { 0x26, 0xa2 },
1539 { 0x27, 0xea },
1540 { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1541 { 0x29, 0x00 },
1542 { 0x2a, 0x10 },
1543 { 0x2b, 0x00 },
1544 { 0x2c, 0x88 },
1545 { 0x2d, 0x91 },
1546 { 0x2e, 0x80 },
1547 { 0x2f, 0x44 },
1548 { 0x60, 0x27 },
1549 { 0x61, 0x02 },
1550 { 0x62, 0x5f },
1551 { 0x63, 0xd5 },
1552 { 0x64, 0x57 },
1553 { 0x65, 0x83 },
1554 { 0x66, 0x55 },
1555 { 0x67, 0x92 },
1556 { 0x68, 0xcf },
1557 { 0x69, 0x76 },
1558 { 0x6a, 0x22 },
1559 { 0x6b, 0x00 },
1560 { 0x6c, 0x02 },
1561 { 0x6d, 0x44 },
1562 { 0x6e, 0x80 },
1563 { 0x6f, 0x1d },
1564 { 0x70, 0x8b },
1565 { 0x71, 0x00 },
1566 { 0x72, 0x14 },
1567 { 0x73, 0x54 },
1568 { 0x74, 0x00 },
1569 { 0x75, 0x8e },
1570 { 0x76, 0x00 },
1571 { 0x77, 0xff },
1572 { 0x78, 0x80 },
1573 { 0x79, 0x80 },
1574 { 0x7a, 0x80 },
1575 { 0x7b, 0xe2 },
1576 { 0x7c, 0x00 },
1577 };
1578
1579 /* 7640 and 7648. The defaults should be OK for most registers. */
1580 static const struct ov_i2c_regvals norm_7640[] = {
1581 { 0x12, 0x80 },
1582 { 0x12, 0x14 },
1583 };
1584
1585 static const struct ov_regvals init_519_ov7660[] = {
1586 { 0x5d, 0x03 }, /* Turn off suspend mode */
1587 { 0x53, 0x9b }, /* 0x9f enables the (unused) microcontroller */
1588 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1589 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1590 { 0xa3, 0x18 },
1591 { 0xa4, 0x04 },
1592 { 0xa5, 0x28 },
1593 { 0x37, 0x00 }, /* SetUsbInit */
1594 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1595 /* Enable both fields, YUV Input, disable defect comp (why?) */
1596 { 0x20, 0x0c }, /* 0x0d does U <-> V swap */
1597 { 0x21, 0x38 },
1598 { 0x22, 0x1d },
1599 { 0x17, 0x50 }, /* undocumented */
1600 { 0x37, 0x00 }, /* undocumented */
1601 { 0x40, 0xff }, /* I2C timeout counter */
1602 { 0x46, 0x00 }, /* I2C clock prescaler */
1603 };
1604 static const struct ov_i2c_regvals norm_7660[] = {
1605 {OV7670_R12_COM7, OV7670_COM7_RESET},
1606 {OV7670_R11_CLKRC, 0x81},
1607 {0x92, 0x00}, /* DM_LNL */
1608 {0x93, 0x00}, /* DM_LNH */
1609 {0x9d, 0x4c}, /* BD50ST */
1610 {0x9e, 0x3f}, /* BD60ST */
1611 {OV7670_R3B_COM11, 0x02},
1612 {OV7670_R13_COM8, 0xf5},
1613 {OV7670_R10_AECH, 0x00},
1614 {OV7670_R00_GAIN, 0x00},
1615 {OV7670_R01_BLUE, 0x7c},
1616 {OV7670_R02_RED, 0x9d},
1617 {OV7670_R12_COM7, 0x00},
1618 {OV7670_R04_COM1, 00},
1619 {OV7670_R18_HSTOP, 0x01},
1620 {OV7670_R17_HSTART, 0x13},
1621 {OV7670_R32_HREF, 0x92},
1622 {OV7670_R19_VSTART, 0x02},
1623 {OV7670_R1A_VSTOP, 0x7a},
1624 {OV7670_R03_VREF, 0x00},
1625 {OV7670_R0E_COM5, 0x04},
1626 {OV7670_R0F_COM6, 0x62},
1627 {OV7670_R15_COM10, 0x00},
1628 {0x16, 0x02}, /* RSVD */
1629 {0x1b, 0x00}, /* PSHFT */
1630 {OV7670_R1E_MVFP, 0x01},
1631 {0x29, 0x3c}, /* RSVD */
1632 {0x33, 0x00}, /* CHLF */
1633 {0x34, 0x07}, /* ARBLM */
1634 {0x35, 0x84}, /* RSVD */
1635 {0x36, 0x00}, /* RSVD */
1636 {0x37, 0x04}, /* ADC */
1637 {0x39, 0x43}, /* OFON */
1638 {OV7670_R3A_TSLB, 0x00},
1639 {OV7670_R3C_COM12, 0x6c},
1640 {OV7670_R3D_COM13, 0x98},
1641 {OV7670_R3F_EDGE, 0x23},
1642 {OV7670_R40_COM15, 0xc1},
1643 {OV7670_R41_COM16, 0x22},
1644 {0x6b, 0x0a}, /* DBLV */
1645 {0xa1, 0x08}, /* RSVD */
1646 {0x69, 0x80}, /* HV */
1647 {0x43, 0xf0}, /* RSVD.. */
1648 {0x44, 0x10},
1649 {0x45, 0x78},
1650 {0x46, 0xa8},
1651 {0x47, 0x60},
1652 {0x48, 0x80},
1653 {0x59, 0xba},
1654 {0x5a, 0x9a},
1655 {0x5b, 0x22},
1656 {0x5c, 0xb9},
1657 {0x5d, 0x9b},
1658 {0x5e, 0x10},
1659 {0x5f, 0xe0},
1660 {0x60, 0x85},
1661 {0x61, 0x60},
1662 {0x9f, 0x9d}, /* RSVD */
1663 {0xa0, 0xa0}, /* DSPC2 */
1664 {0x4f, 0x60}, /* matrix */
1665 {0x50, 0x64},
1666 {0x51, 0x04},
1667 {0x52, 0x18},
1668 {0x53, 0x3c},
1669 {0x54, 0x54},
1670 {0x55, 0x40},
1671 {0x56, 0x40},
1672 {0x57, 0x40},
1673 {0x58, 0x0d}, /* matrix sign */
1674 {0x8b, 0xcc}, /* RSVD */
1675 {0x8c, 0xcc},
1676 {0x8d, 0xcf},
1677 {0x6c, 0x40}, /* gamma curve */
1678 {0x6d, 0xe0},
1679 {0x6e, 0xa0},
1680 {0x6f, 0x80},
1681 {0x70, 0x70},
1682 {0x71, 0x80},
1683 {0x72, 0x60},
1684 {0x73, 0x60},
1685 {0x74, 0x50},
1686 {0x75, 0x40},
1687 {0x76, 0x38},
1688 {0x77, 0x3c},
1689 {0x78, 0x32},
1690 {0x79, 0x1a},
1691 {0x7a, 0x28},
1692 {0x7b, 0x24},
1693 {0x7c, 0x04}, /* gamma curve */
1694 {0x7d, 0x12},
1695 {0x7e, 0x26},
1696 {0x7f, 0x46},
1697 {0x80, 0x54},
1698 {0x81, 0x64},
1699 {0x82, 0x70},
1700 {0x83, 0x7c},
1701 {0x84, 0x86},
1702 {0x85, 0x8e},
1703 {0x86, 0x9c},
1704 {0x87, 0xab},
1705 {0x88, 0xc4},
1706 {0x89, 0xd1},
1707 {0x8a, 0xe5},
1708 {OV7670_R14_COM9, 0x1e},
1709 {OV7670_R24_AEW, 0x80},
1710 {OV7670_R25_AEB, 0x72},
1711 {OV7670_R26_VPT, 0xb3},
1712 {0x62, 0x80}, /* LCC1 */
1713 {0x63, 0x80}, /* LCC2 */
1714 {0x64, 0x06}, /* LCC3 */
1715 {0x65, 0x00}, /* LCC4 */
1716 {0x66, 0x01}, /* LCC5 */
1717 {0x94, 0x0e}, /* RSVD.. */
1718 {0x95, 0x14},
1719 {OV7670_R13_COM8, OV7670_COM8_FASTAEC
1720 | OV7670_COM8_AECSTEP
1721 | OV7670_COM8_BFILT
1722 | 0x10
1723 | OV7670_COM8_AGC
1724 | OV7670_COM8_AWB
1725 | OV7670_COM8_AEC},
1726 {0xa1, 0xc8}
1727 };
1728 static const struct ov_i2c_regvals norm_9600[] = {
1729 {0x12, 0x80},
1730 {0x0c, 0x28},
1731 {0x11, 0x80},
1732 {0x13, 0xb5},
1733 {0x14, 0x3e},
1734 {0x1b, 0x04},
1735 {0x24, 0xb0},
1736 {0x25, 0x90},
1737 {0x26, 0x94},
1738 {0x35, 0x90},
1739 {0x37, 0x07},
1740 {0x38, 0x08},
1741 {0x01, 0x8e},
1742 {0x02, 0x85}
1743 };
1744
1745 /* 7670. Defaults taken from OmniVision provided data,
1746 * as provided by Jonathan Corbet of OLPC */
1747 static const struct ov_i2c_regvals norm_7670[] = {
1748 { OV7670_R12_COM7, OV7670_COM7_RESET },
1749 { OV7670_R3A_TSLB, 0x04 }, /* OV */
1750 { OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1751 { OV7670_R11_CLKRC, 0x01 },
1752 /*
1753 * Set the hardware window. These values from OV don't entirely
1754 * make sense - hstop is less than hstart. But they work...
1755 */
1756 { OV7670_R17_HSTART, 0x13 },
1757 { OV7670_R18_HSTOP, 0x01 },
1758 { OV7670_R32_HREF, 0xb6 },
1759 { OV7670_R19_VSTART, 0x02 },
1760 { OV7670_R1A_VSTOP, 0x7a },
1761 { OV7670_R03_VREF, 0x0a },
1762
1763 { OV7670_R0C_COM3, 0x00 },
1764 { OV7670_R3E_COM14, 0x00 },
1765 /* Mystery scaling numbers */
1766 { 0x70, 0x3a },
1767 { 0x71, 0x35 },
1768 { 0x72, 0x11 },
1769 { 0x73, 0xf0 },
1770 { 0xa2, 0x02 },
1771 /* { OV7670_R15_COM10, 0x0 }, */
1772
1773 /* Gamma curve values */
1774 { 0x7a, 0x20 },
1775 { 0x7b, 0x10 },
1776 { 0x7c, 0x1e },
1777 { 0x7d, 0x35 },
1778 { 0x7e, 0x5a },
1779 { 0x7f, 0x69 },
1780 { 0x80, 0x76 },
1781 { 0x81, 0x80 },
1782 { 0x82, 0x88 },
1783 { 0x83, 0x8f },
1784 { 0x84, 0x96 },
1785 { 0x85, 0xa3 },
1786 { 0x86, 0xaf },
1787 { 0x87, 0xc4 },
1788 { 0x88, 0xd7 },
1789 { 0x89, 0xe8 },
1790
1791 /* AGC and AEC parameters. Note we start by disabling those features,
1792 then turn them only after tweaking the values. */
1793 { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1794 | OV7670_COM8_AECSTEP
1795 | OV7670_COM8_BFILT },
1796 { OV7670_R00_GAIN, 0x00 },
1797 { OV7670_R10_AECH, 0x00 },
1798 { OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
1799 { OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1800 { OV7670_RA5_BD50MAX, 0x05 },
1801 { OV7670_RAB_BD60MAX, 0x07 },
1802 { OV7670_R24_AEW, 0x95 },
1803 { OV7670_R25_AEB, 0x33 },
1804 { OV7670_R26_VPT, 0xe3 },
1805 { OV7670_R9F_HAECC1, 0x78 },
1806 { OV7670_RA0_HAECC2, 0x68 },
1807 { 0xa1, 0x03 }, /* magic */
1808 { OV7670_RA6_HAECC3, 0xd8 },
1809 { OV7670_RA7_HAECC4, 0xd8 },
1810 { OV7670_RA8_HAECC5, 0xf0 },
1811 { OV7670_RA9_HAECC6, 0x90 },
1812 { OV7670_RAA_HAECC7, 0x94 },
1813 { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1814 | OV7670_COM8_AECSTEP
1815 | OV7670_COM8_BFILT
1816 | OV7670_COM8_AGC
1817 | OV7670_COM8_AEC },
1818
1819 /* Almost all of these are magic "reserved" values. */
1820 { OV7670_R0E_COM5, 0x61 },
1821 { OV7670_R0F_COM6, 0x4b },
1822 { 0x16, 0x02 },
1823 { OV7670_R1E_MVFP, 0x07 },
1824 { 0x21, 0x02 },
1825 { 0x22, 0x91 },
1826 { 0x29, 0x07 },
1827 { 0x33, 0x0b },
1828 { 0x35, 0x0b },
1829 { 0x37, 0x1d },
1830 { 0x38, 0x71 },
1831 { 0x39, 0x2a },
1832 { OV7670_R3C_COM12, 0x78 },
1833 { 0x4d, 0x40 },
1834 { 0x4e, 0x20 },
1835 { OV7670_R69_GFIX, 0x00 },
1836 { 0x6b, 0x4a },
1837 { 0x74, 0x10 },
1838 { 0x8d, 0x4f },
1839 { 0x8e, 0x00 },
1840 { 0x8f, 0x00 },
1841 { 0x90, 0x00 },
1842 { 0x91, 0x00 },
1843 { 0x96, 0x00 },
1844 { 0x9a, 0x00 },
1845 { 0xb0, 0x84 },
1846 { 0xb1, 0x0c },
1847 { 0xb2, 0x0e },
1848 { 0xb3, 0x82 },
1849 { 0xb8, 0x0a },
1850
1851 /* More reserved magic, some of which tweaks white balance */
1852 { 0x43, 0x0a },
1853 { 0x44, 0xf0 },
1854 { 0x45, 0x34 },
1855 { 0x46, 0x58 },
1856 { 0x47, 0x28 },
1857 { 0x48, 0x3a },
1858 { 0x59, 0x88 },
1859 { 0x5a, 0x88 },
1860 { 0x5b, 0x44 },
1861 { 0x5c, 0x67 },
1862 { 0x5d, 0x49 },
1863 { 0x5e, 0x0e },
1864 { 0x6c, 0x0a },
1865 { 0x6d, 0x55 },
1866 { 0x6e, 0x11 },
1867 { 0x6f, 0x9f }, /* "9e for advance AWB" */
1868 { 0x6a, 0x40 },
1869 { OV7670_R01_BLUE, 0x40 },
1870 { OV7670_R02_RED, 0x60 },
1871 { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1872 | OV7670_COM8_AECSTEP
1873 | OV7670_COM8_BFILT
1874 | OV7670_COM8_AGC
1875 | OV7670_COM8_AEC
1876 | OV7670_COM8_AWB },
1877
1878 /* Matrix coefficients */
1879 { 0x4f, 0x80 },
1880 { 0x50, 0x80 },
1881 { 0x51, 0x00 },
1882 { 0x52, 0x22 },
1883 { 0x53, 0x5e },
1884 { 0x54, 0x80 },
1885 { 0x58, 0x9e },
1886
1887 { OV7670_R41_COM16, OV7670_COM16_AWBGAIN },
1888 { OV7670_R3F_EDGE, 0x00 },
1889 { 0x75, 0x05 },
1890 { 0x76, 0xe1 },
1891 { 0x4c, 0x00 },
1892 { 0x77, 0x01 },
1893 { OV7670_R3D_COM13, OV7670_COM13_GAMMA
1894 | OV7670_COM13_UVSAT
1895 | 2}, /* was 3 */
1896 { 0x4b, 0x09 },
1897 { 0xc9, 0x60 },
1898 { OV7670_R41_COM16, 0x38 },
1899 { 0x56, 0x40 },
1900
1901 { 0x34, 0x11 },
1902 { OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1903 { 0xa4, 0x88 },
1904 { 0x96, 0x00 },
1905 { 0x97, 0x30 },
1906 { 0x98, 0x20 },
1907 { 0x99, 0x30 },
1908 { 0x9a, 0x84 },
1909 { 0x9b, 0x29 },
1910 { 0x9c, 0x03 },
1911 { 0x9d, 0x4c },
1912 { 0x9e, 0x3f },
1913 { 0x78, 0x04 },
1914
1915 /* Extra-weird stuff. Some sort of multiplexor register */
1916 { 0x79, 0x01 },
1917 { 0xc8, 0xf0 },
1918 { 0x79, 0x0f },
1919 { 0xc8, 0x00 },
1920 { 0x79, 0x10 },
1921 { 0xc8, 0x7e },
1922 { 0x79, 0x0a },
1923 { 0xc8, 0x80 },
1924 { 0x79, 0x0b },
1925 { 0xc8, 0x01 },
1926 { 0x79, 0x0c },
1927 { 0xc8, 0x0f },
1928 { 0x79, 0x0d },
1929 { 0xc8, 0x20 },
1930 { 0x79, 0x09 },
1931 { 0xc8, 0x80 },
1932 { 0x79, 0x02 },
1933 { 0xc8, 0xc0 },
1934 { 0x79, 0x03 },
1935 { 0xc8, 0x40 },
1936 { 0x79, 0x05 },
1937 { 0xc8, 0x30 },
1938 { 0x79, 0x26 },
1939 };
1940
1941 static const struct ov_i2c_regvals norm_8610[] = {
1942 { 0x12, 0x80 },
1943 { 0x00, 0x00 },
1944 { 0x01, 0x80 },
1945 { 0x02, 0x80 },
1946 { 0x03, 0xc0 },
1947 { 0x04, 0x30 },
1948 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1949 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1950 { 0x0a, 0x86 },
1951 { 0x0b, 0xb0 },
1952 { 0x0c, 0x20 },
1953 { 0x0d, 0x20 },
1954 { 0x11, 0x01 },
1955 { 0x12, 0x25 },
1956 { 0x13, 0x01 },
1957 { 0x14, 0x04 },
1958 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1959 { 0x16, 0x03 },
1960 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1961 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1962 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1963 { 0x1a, 0xf5 },
1964 { 0x1b, 0x00 },
1965 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1966 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1967 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1968 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1969 { 0x26, 0xa2 },
1970 { 0x27, 0xea },
1971 { 0x28, 0x00 },
1972 { 0x29, 0x00 },
1973 { 0x2a, 0x80 },
1974 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1975 { 0x2c, 0xac },
1976 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1977 { 0x2e, 0x80 },
1978 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1979 { 0x4c, 0x00 },
1980 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1981 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1982 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1983 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1984 { 0x63, 0xff },
1985 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1986 * maybe thats wrong */
1987 { 0x65, 0x00 },
1988 { 0x66, 0x55 },
1989 { 0x67, 0xb0 },
1990 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1991 { 0x69, 0x02 },
1992 { 0x6a, 0x22 },
1993 { 0x6b, 0x00 },
1994 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1995 * deleting bit7 colors the first images red */
1996 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
1997 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
1998 { 0x6f, 0x01 },
1999 { 0x70, 0x8b },
2000 { 0x71, 0x00 },
2001 { 0x72, 0x14 },
2002 { 0x73, 0x54 },
2003 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
2004 { 0x75, 0x0e },
2005 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
2006 { 0x77, 0xff },
2007 { 0x78, 0x80 },
2008 { 0x79, 0x80 },
2009 { 0x7a, 0x80 },
2010 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
2011 { 0x7c, 0x00 },
2012 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
2013 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
2014 { 0x7f, 0xfb },
2015 { 0x80, 0x28 },
2016 { 0x81, 0x00 },
2017 { 0x82, 0x23 },
2018 { 0x83, 0x0b },
2019 { 0x84, 0x00 },
2020 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
2021 { 0x86, 0xc9 },
2022 { 0x87, 0x00 },
2023 { 0x88, 0x00 },
2024 { 0x89, 0x01 },
2025 { 0x12, 0x20 },
2026 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
2027 };
2028
ov7670_abs_to_sm(unsigned char v)2029 static unsigned char ov7670_abs_to_sm(unsigned char v)
2030 {
2031 if (v > 127)
2032 return v & 0x7f;
2033 return (128 - v) | 0x80;
2034 }
2035
2036 /* Write a OV519 register */
reg_w(struct sd * sd,u16 index,u16 value)2037 static void reg_w(struct sd *sd, u16 index, u16 value)
2038 {
2039 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2040 int ret, req = 0;
2041
2042 if (sd->gspca_dev.usb_err < 0)
2043 return;
2044
2045 switch (sd->bridge) {
2046 case BRIDGE_OV511:
2047 case BRIDGE_OV511PLUS:
2048 req = 2;
2049 break;
2050 case BRIDGE_OVFX2:
2051 req = 0x0a;
2052 /* fall through */
2053 case BRIDGE_W9968CF:
2054 PDEBUG(D_USBO, "SET %02x %04x %04x",
2055 req, value, index);
2056 ret = usb_control_msg(sd->gspca_dev.dev,
2057 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2058 req,
2059 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2060 value, index, NULL, 0, 500);
2061 goto leave;
2062 default:
2063 req = 1;
2064 }
2065
2066 PDEBUG(D_USBO, "SET %02x 0000 %04x %02x",
2067 req, index, value);
2068 sd->gspca_dev.usb_buf[0] = value;
2069 ret = usb_control_msg(sd->gspca_dev.dev,
2070 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2071 req,
2072 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2073 0, index,
2074 sd->gspca_dev.usb_buf, 1, 500);
2075 leave:
2076 if (ret < 0) {
2077 PERR("reg_w %02x failed %d\n", index, ret);
2078 sd->gspca_dev.usb_err = ret;
2079 return;
2080 }
2081 }
2082
2083 /* Read from a OV519 register, note not valid for the w9968cf!! */
2084 /* returns: negative is error, pos or zero is data */
reg_r(struct sd * sd,u16 index)2085 static int reg_r(struct sd *sd, u16 index)
2086 {
2087 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2088 int ret;
2089 int req;
2090
2091 if (sd->gspca_dev.usb_err < 0)
2092 return -1;
2093
2094 switch (sd->bridge) {
2095 case BRIDGE_OV511:
2096 case BRIDGE_OV511PLUS:
2097 req = 3;
2098 break;
2099 case BRIDGE_OVFX2:
2100 req = 0x0b;
2101 break;
2102 default:
2103 req = 1;
2104 }
2105
2106 ret = usb_control_msg(sd->gspca_dev.dev,
2107 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2108 req,
2109 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2110 0, index, sd->gspca_dev.usb_buf, 1, 500);
2111
2112 if (ret >= 0) {
2113 ret = sd->gspca_dev.usb_buf[0];
2114 PDEBUG(D_USBI, "GET %02x 0000 %04x %02x",
2115 req, index, ret);
2116 } else {
2117 PERR("reg_r %02x failed %d\n", index, ret);
2118 sd->gspca_dev.usb_err = ret;
2119 /*
2120 * Make sure the result is zeroed to avoid uninitialized
2121 * values.
2122 */
2123 gspca_dev->usb_buf[0] = 0;
2124 }
2125
2126 return ret;
2127 }
2128
2129 /* Read 8 values from a OV519 register */
reg_r8(struct sd * sd,u16 index)2130 static int reg_r8(struct sd *sd,
2131 u16 index)
2132 {
2133 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2134 int ret;
2135
2136 if (sd->gspca_dev.usb_err < 0)
2137 return -1;
2138
2139 ret = usb_control_msg(sd->gspca_dev.dev,
2140 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2141 1, /* REQ_IO */
2142 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2143 0, index, sd->gspca_dev.usb_buf, 8, 500);
2144
2145 if (ret >= 0) {
2146 ret = sd->gspca_dev.usb_buf[0];
2147 } else {
2148 PERR("reg_r8 %02x failed %d\n", index, ret);
2149 sd->gspca_dev.usb_err = ret;
2150 /*
2151 * Make sure the buffer is zeroed to avoid uninitialized
2152 * values.
2153 */
2154 memset(gspca_dev->usb_buf, 0, 8);
2155 }
2156
2157 return ret;
2158 }
2159
2160 /*
2161 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
2162 * the same position as 1's in "mask" are cleared and set to "value". Bits
2163 * that are in the same position as 0's in "mask" are preserved, regardless
2164 * of their respective state in "value".
2165 */
reg_w_mask(struct sd * sd,u16 index,u8 value,u8 mask)2166 static void reg_w_mask(struct sd *sd,
2167 u16 index,
2168 u8 value,
2169 u8 mask)
2170 {
2171 int ret;
2172 u8 oldval;
2173
2174 if (mask != 0xff) {
2175 value &= mask; /* Enforce mask on value */
2176 ret = reg_r(sd, index);
2177 if (ret < 0)
2178 return;
2179
2180 oldval = ret & ~mask; /* Clear the masked bits */
2181 value |= oldval; /* Set the desired bits */
2182 }
2183 reg_w(sd, index, value);
2184 }
2185
2186 /*
2187 * Writes multiple (n) byte value to a single register. Only valid with certain
2188 * registers (0x30 and 0xc4 - 0xce).
2189 */
ov518_reg_w32(struct sd * sd,u16 index,u32 value,int n)2190 static void ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
2191 {
2192 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2193 int ret;
2194
2195 if (sd->gspca_dev.usb_err < 0)
2196 return;
2197
2198 *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
2199
2200 ret = usb_control_msg(sd->gspca_dev.dev,
2201 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2202 1 /* REG_IO */,
2203 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2204 0, index,
2205 sd->gspca_dev.usb_buf, n, 500);
2206 if (ret < 0) {
2207 PERR("reg_w32 %02x failed %d\n", index, ret);
2208 sd->gspca_dev.usb_err = ret;
2209 }
2210 }
2211
ov511_i2c_w(struct sd * sd,u8 reg,u8 value)2212 static void ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
2213 {
2214 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2215 int rc, retries;
2216
2217 PDEBUG(D_USBO, "ov511_i2c_w %02x %02x", reg, value);
2218
2219 /* Three byte write cycle */
2220 for (retries = 6; ; ) {
2221 /* Select camera register */
2222 reg_w(sd, R51x_I2C_SADDR_3, reg);
2223
2224 /* Write "value" to I2C data port of OV511 */
2225 reg_w(sd, R51x_I2C_DATA, value);
2226
2227 /* Initiate 3-byte write cycle */
2228 reg_w(sd, R511_I2C_CTL, 0x01);
2229
2230 do {
2231 rc = reg_r(sd, R511_I2C_CTL);
2232 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2233
2234 if (rc < 0)
2235 return;
2236
2237 if ((rc & 2) == 0) /* Ack? */
2238 break;
2239 if (--retries < 0) {
2240 PDEBUG(D_USBO, "i2c write retries exhausted");
2241 return;
2242 }
2243 }
2244 }
2245
ov511_i2c_r(struct sd * sd,u8 reg)2246 static int ov511_i2c_r(struct sd *sd, u8 reg)
2247 {
2248 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2249 int rc, value, retries;
2250
2251 /* Two byte write cycle */
2252 for (retries = 6; ; ) {
2253 /* Select camera register */
2254 reg_w(sd, R51x_I2C_SADDR_2, reg);
2255
2256 /* Initiate 2-byte write cycle */
2257 reg_w(sd, R511_I2C_CTL, 0x03);
2258
2259 do {
2260 rc = reg_r(sd, R511_I2C_CTL);
2261 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2262
2263 if (rc < 0)
2264 return rc;
2265
2266 if ((rc & 2) == 0) /* Ack? */
2267 break;
2268
2269 /* I2C abort */
2270 reg_w(sd, R511_I2C_CTL, 0x10);
2271
2272 if (--retries < 0) {
2273 PDEBUG(D_USBI, "i2c write retries exhausted");
2274 return -1;
2275 }
2276 }
2277
2278 /* Two byte read cycle */
2279 for (retries = 6; ; ) {
2280 /* Initiate 2-byte read cycle */
2281 reg_w(sd, R511_I2C_CTL, 0x05);
2282
2283 do {
2284 rc = reg_r(sd, R511_I2C_CTL);
2285 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2286
2287 if (rc < 0)
2288 return rc;
2289
2290 if ((rc & 2) == 0) /* Ack? */
2291 break;
2292
2293 /* I2C abort */
2294 reg_w(sd, R511_I2C_CTL, 0x10);
2295
2296 if (--retries < 0) {
2297 PDEBUG(D_USBI, "i2c read retries exhausted");
2298 return -1;
2299 }
2300 }
2301
2302 value = reg_r(sd, R51x_I2C_DATA);
2303
2304 PDEBUG(D_USBI, "ov511_i2c_r %02x %02x", reg, value);
2305
2306 /* This is needed to make i2c_w() work */
2307 reg_w(sd, R511_I2C_CTL, 0x05);
2308
2309 return value;
2310 }
2311
2312 /*
2313 * The OV518 I2C I/O procedure is different, hence, this function.
2314 * This is normally only called from i2c_w(). Note that this function
2315 * always succeeds regardless of whether the sensor is present and working.
2316 */
ov518_i2c_w(struct sd * sd,u8 reg,u8 value)2317 static void ov518_i2c_w(struct sd *sd,
2318 u8 reg,
2319 u8 value)
2320 {
2321 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2322
2323 PDEBUG(D_USBO, "ov518_i2c_w %02x %02x", reg, value);
2324
2325 /* Select camera register */
2326 reg_w(sd, R51x_I2C_SADDR_3, reg);
2327
2328 /* Write "value" to I2C data port of OV511 */
2329 reg_w(sd, R51x_I2C_DATA, value);
2330
2331 /* Initiate 3-byte write cycle */
2332 reg_w(sd, R518_I2C_CTL, 0x01);
2333
2334 /* wait for write complete */
2335 msleep(4);
2336 reg_r8(sd, R518_I2C_CTL);
2337 }
2338
2339 /*
2340 * returns: negative is error, pos or zero is data
2341 *
2342 * The OV518 I2C I/O procedure is different, hence, this function.
2343 * This is normally only called from i2c_r(). Note that this function
2344 * always succeeds regardless of whether the sensor is present and working.
2345 */
ov518_i2c_r(struct sd * sd,u8 reg)2346 static int ov518_i2c_r(struct sd *sd, u8 reg)
2347 {
2348 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2349 int value;
2350
2351 /* Select camera register */
2352 reg_w(sd, R51x_I2C_SADDR_2, reg);
2353
2354 /* Initiate 2-byte write cycle */
2355 reg_w(sd, R518_I2C_CTL, 0x03);
2356 reg_r8(sd, R518_I2C_CTL);
2357
2358 /* Initiate 2-byte read cycle */
2359 reg_w(sd, R518_I2C_CTL, 0x05);
2360 reg_r8(sd, R518_I2C_CTL);
2361
2362 value = reg_r(sd, R51x_I2C_DATA);
2363 PDEBUG(D_USBI, "ov518_i2c_r %02x %02x", reg, value);
2364 return value;
2365 }
2366
ovfx2_i2c_w(struct sd * sd,u8 reg,u8 value)2367 static void ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
2368 {
2369 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2370 int ret;
2371
2372 if (sd->gspca_dev.usb_err < 0)
2373 return;
2374
2375 ret = usb_control_msg(sd->gspca_dev.dev,
2376 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2377 0x02,
2378 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2379 (u16) value, (u16) reg, NULL, 0, 500);
2380
2381 if (ret < 0) {
2382 PERR("ovfx2_i2c_w %02x failed %d\n", reg, ret);
2383 sd->gspca_dev.usb_err = ret;
2384 }
2385
2386 PDEBUG(D_USBO, "ovfx2_i2c_w %02x %02x", reg, value);
2387 }
2388
ovfx2_i2c_r(struct sd * sd,u8 reg)2389 static int ovfx2_i2c_r(struct sd *sd, u8 reg)
2390 {
2391 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2392 int ret;
2393
2394 if (sd->gspca_dev.usb_err < 0)
2395 return -1;
2396
2397 ret = usb_control_msg(sd->gspca_dev.dev,
2398 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2399 0x03,
2400 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2401 0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
2402
2403 if (ret >= 0) {
2404 ret = sd->gspca_dev.usb_buf[0];
2405 PDEBUG(D_USBI, "ovfx2_i2c_r %02x %02x", reg, ret);
2406 } else {
2407 PERR("ovfx2_i2c_r %02x failed %d\n", reg, ret);
2408 sd->gspca_dev.usb_err = ret;
2409 }
2410
2411 return ret;
2412 }
2413
i2c_w(struct sd * sd,u8 reg,u8 value)2414 static void i2c_w(struct sd *sd, u8 reg, u8 value)
2415 {
2416 if (sd->sensor_reg_cache[reg] == value)
2417 return;
2418
2419 switch (sd->bridge) {
2420 case BRIDGE_OV511:
2421 case BRIDGE_OV511PLUS:
2422 ov511_i2c_w(sd, reg, value);
2423 break;
2424 case BRIDGE_OV518:
2425 case BRIDGE_OV518PLUS:
2426 case BRIDGE_OV519:
2427 ov518_i2c_w(sd, reg, value);
2428 break;
2429 case BRIDGE_OVFX2:
2430 ovfx2_i2c_w(sd, reg, value);
2431 break;
2432 case BRIDGE_W9968CF:
2433 w9968cf_i2c_w(sd, reg, value);
2434 break;
2435 }
2436
2437 if (sd->gspca_dev.usb_err >= 0) {
2438 /* Up on sensor reset empty the register cache */
2439 if (reg == 0x12 && (value & 0x80))
2440 memset(sd->sensor_reg_cache, -1,
2441 sizeof(sd->sensor_reg_cache));
2442 else
2443 sd->sensor_reg_cache[reg] = value;
2444 }
2445 }
2446
i2c_r(struct sd * sd,u8 reg)2447 static int i2c_r(struct sd *sd, u8 reg)
2448 {
2449 int ret = -1;
2450
2451 if (sd->sensor_reg_cache[reg] != -1)
2452 return sd->sensor_reg_cache[reg];
2453
2454 switch (sd->bridge) {
2455 case BRIDGE_OV511:
2456 case BRIDGE_OV511PLUS:
2457 ret = ov511_i2c_r(sd, reg);
2458 break;
2459 case BRIDGE_OV518:
2460 case BRIDGE_OV518PLUS:
2461 case BRIDGE_OV519:
2462 ret = ov518_i2c_r(sd, reg);
2463 break;
2464 case BRIDGE_OVFX2:
2465 ret = ovfx2_i2c_r(sd, reg);
2466 break;
2467 case BRIDGE_W9968CF:
2468 ret = w9968cf_i2c_r(sd, reg);
2469 break;
2470 }
2471
2472 if (ret >= 0)
2473 sd->sensor_reg_cache[reg] = ret;
2474
2475 return ret;
2476 }
2477
2478 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2479 * the same position as 1's in "mask" are cleared and set to "value". Bits
2480 * that are in the same position as 0's in "mask" are preserved, regardless
2481 * of their respective state in "value".
2482 */
i2c_w_mask(struct sd * sd,u8 reg,u8 value,u8 mask)2483 static void i2c_w_mask(struct sd *sd,
2484 u8 reg,
2485 u8 value,
2486 u8 mask)
2487 {
2488 int rc;
2489 u8 oldval;
2490
2491 value &= mask; /* Enforce mask on value */
2492 rc = i2c_r(sd, reg);
2493 if (rc < 0)
2494 return;
2495 oldval = rc & ~mask; /* Clear the masked bits */
2496 value |= oldval; /* Set the desired bits */
2497 i2c_w(sd, reg, value);
2498 }
2499
2500 /* Temporarily stops OV511 from functioning. Must do this before changing
2501 * registers while the camera is streaming */
ov51x_stop(struct sd * sd)2502 static inline void ov51x_stop(struct sd *sd)
2503 {
2504 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2505
2506 PDEBUG(D_STREAM, "stopping");
2507 sd->stopped = 1;
2508 switch (sd->bridge) {
2509 case BRIDGE_OV511:
2510 case BRIDGE_OV511PLUS:
2511 reg_w(sd, R51x_SYS_RESET, 0x3d);
2512 break;
2513 case BRIDGE_OV518:
2514 case BRIDGE_OV518PLUS:
2515 reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2516 break;
2517 case BRIDGE_OV519:
2518 reg_w(sd, OV519_R51_RESET1, 0x0f);
2519 reg_w(sd, OV519_R51_RESET1, 0x00);
2520 reg_w(sd, 0x22, 0x00); /* FRAR */
2521 break;
2522 case BRIDGE_OVFX2:
2523 reg_w_mask(sd, 0x0f, 0x00, 0x02);
2524 break;
2525 case BRIDGE_W9968CF:
2526 reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2527 break;
2528 }
2529 }
2530
2531 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2532 * actually stopped (for performance). */
ov51x_restart(struct sd * sd)2533 static inline void ov51x_restart(struct sd *sd)
2534 {
2535 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2536
2537 PDEBUG(D_STREAM, "restarting");
2538 if (!sd->stopped)
2539 return;
2540 sd->stopped = 0;
2541
2542 /* Reinitialize the stream */
2543 switch (sd->bridge) {
2544 case BRIDGE_OV511:
2545 case BRIDGE_OV511PLUS:
2546 reg_w(sd, R51x_SYS_RESET, 0x00);
2547 break;
2548 case BRIDGE_OV518:
2549 case BRIDGE_OV518PLUS:
2550 reg_w(sd, 0x2f, 0x80);
2551 reg_w(sd, R51x_SYS_RESET, 0x00);
2552 break;
2553 case BRIDGE_OV519:
2554 reg_w(sd, OV519_R51_RESET1, 0x0f);
2555 reg_w(sd, OV519_R51_RESET1, 0x00);
2556 reg_w(sd, 0x22, 0x1d); /* FRAR */
2557 break;
2558 case BRIDGE_OVFX2:
2559 reg_w_mask(sd, 0x0f, 0x02, 0x02);
2560 break;
2561 case BRIDGE_W9968CF:
2562 reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2563 break;
2564 }
2565 }
2566
2567 static void ov51x_set_slave_ids(struct sd *sd, u8 slave);
2568
2569 /* This does an initial reset of an OmniVision sensor and ensures that I2C
2570 * is synchronized. Returns <0 on failure.
2571 */
init_ov_sensor(struct sd * sd,u8 slave)2572 static int init_ov_sensor(struct sd *sd, u8 slave)
2573 {
2574 int i;
2575 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2576
2577 ov51x_set_slave_ids(sd, slave);
2578
2579 /* Reset the sensor */
2580 i2c_w(sd, 0x12, 0x80);
2581
2582 /* Wait for it to initialize */
2583 msleep(150);
2584
2585 for (i = 0; i < i2c_detect_tries; i++) {
2586 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2587 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2588 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2589 return 0;
2590 }
2591
2592 /* Reset the sensor */
2593 i2c_w(sd, 0x12, 0x80);
2594
2595 /* Wait for it to initialize */
2596 msleep(150);
2597
2598 /* Dummy read to sync I2C */
2599 if (i2c_r(sd, 0x00) < 0)
2600 return -1;
2601 }
2602 return -1;
2603 }
2604
2605 /* Set the read and write slave IDs. The "slave" argument is the write slave,
2606 * and the read slave will be set to (slave + 1).
2607 * This should not be called from outside the i2c I/O functions.
2608 * Sets I2C read and write slave IDs. Returns <0 for error
2609 */
ov51x_set_slave_ids(struct sd * sd,u8 slave)2610 static void ov51x_set_slave_ids(struct sd *sd,
2611 u8 slave)
2612 {
2613 switch (sd->bridge) {
2614 case BRIDGE_OVFX2:
2615 reg_w(sd, OVFX2_I2C_ADDR, slave);
2616 return;
2617 case BRIDGE_W9968CF:
2618 sd->sensor_addr = slave;
2619 return;
2620 }
2621
2622 reg_w(sd, R51x_I2C_W_SID, slave);
2623 reg_w(sd, R51x_I2C_R_SID, slave + 1);
2624 }
2625
write_regvals(struct sd * sd,const struct ov_regvals * regvals,int n)2626 static void write_regvals(struct sd *sd,
2627 const struct ov_regvals *regvals,
2628 int n)
2629 {
2630 while (--n >= 0) {
2631 reg_w(sd, regvals->reg, regvals->val);
2632 regvals++;
2633 }
2634 }
2635
write_i2c_regvals(struct sd * sd,const struct ov_i2c_regvals * regvals,int n)2636 static void write_i2c_regvals(struct sd *sd,
2637 const struct ov_i2c_regvals *regvals,
2638 int n)
2639 {
2640 while (--n >= 0) {
2641 i2c_w(sd, regvals->reg, regvals->val);
2642 regvals++;
2643 }
2644 }
2645
2646 /****************************************************************************
2647 *
2648 * OV511 and sensor configuration
2649 *
2650 ***************************************************************************/
2651
2652 /* This initializes the OV2x10 / OV3610 / OV3620 / OV9600 */
ov_hires_configure(struct sd * sd)2653 static void ov_hires_configure(struct sd *sd)
2654 {
2655 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2656 int high, low;
2657
2658 if (sd->bridge != BRIDGE_OVFX2) {
2659 PERR("error hires sensors only supported with ovfx2\n");
2660 return;
2661 }
2662
2663 PDEBUG(D_PROBE, "starting ov hires configuration");
2664
2665 /* Detect sensor (sub)type */
2666 high = i2c_r(sd, 0x0a);
2667 low = i2c_r(sd, 0x0b);
2668 /* info("%x, %x", high, low); */
2669 switch (high) {
2670 case 0x96:
2671 switch (low) {
2672 case 0x40:
2673 PDEBUG(D_PROBE, "Sensor is a OV2610");
2674 sd->sensor = SEN_OV2610;
2675 return;
2676 case 0x41:
2677 PDEBUG(D_PROBE, "Sensor is a OV2610AE");
2678 sd->sensor = SEN_OV2610AE;
2679 return;
2680 case 0xb1:
2681 PDEBUG(D_PROBE, "Sensor is a OV9600");
2682 sd->sensor = SEN_OV9600;
2683 return;
2684 }
2685 break;
2686 case 0x36:
2687 if ((low & 0x0f) == 0x00) {
2688 PDEBUG(D_PROBE, "Sensor is a OV3610");
2689 sd->sensor = SEN_OV3610;
2690 return;
2691 }
2692 break;
2693 }
2694 PERR("Error unknown sensor type: %02x%02x\n", high, low);
2695 }
2696
2697 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2698 * the same register settings as the OV8610, since they are very similar.
2699 */
ov8xx0_configure(struct sd * sd)2700 static void ov8xx0_configure(struct sd *sd)
2701 {
2702 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2703 int rc;
2704
2705 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2706
2707 /* Detect sensor (sub)type */
2708 rc = i2c_r(sd, OV7610_REG_COM_I);
2709 if (rc < 0) {
2710 PERR("Error detecting sensor type");
2711 return;
2712 }
2713 if ((rc & 3) == 1)
2714 sd->sensor = SEN_OV8610;
2715 else
2716 PERR("Unknown image sensor version: %d\n", rc & 3);
2717 }
2718
2719 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2720 * the same register settings as the OV7610, since they are very similar.
2721 */
ov7xx0_configure(struct sd * sd)2722 static void ov7xx0_configure(struct sd *sd)
2723 {
2724 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2725 int rc, high, low;
2726
2727 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2728
2729 /* Detect sensor (sub)type */
2730 rc = i2c_r(sd, OV7610_REG_COM_I);
2731
2732 /* add OV7670 here
2733 * it appears to be wrongly detected as a 7610 by default */
2734 if (rc < 0) {
2735 PERR("Error detecting sensor type\n");
2736 return;
2737 }
2738 if ((rc & 3) == 3) {
2739 /* quick hack to make OV7670s work */
2740 high = i2c_r(sd, 0x0a);
2741 low = i2c_r(sd, 0x0b);
2742 /* info("%x, %x", high, low); */
2743 if (high == 0x76 && (low & 0xf0) == 0x70) {
2744 PDEBUG(D_PROBE, "Sensor is an OV76%02x", low);
2745 sd->sensor = SEN_OV7670;
2746 } else {
2747 PDEBUG(D_PROBE, "Sensor is an OV7610");
2748 sd->sensor = SEN_OV7610;
2749 }
2750 } else if ((rc & 3) == 1) {
2751 /* I don't know what's different about the 76BE yet. */
2752 if (i2c_r(sd, 0x15) & 1) {
2753 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2754 sd->sensor = SEN_OV7620AE;
2755 } else {
2756 PDEBUG(D_PROBE, "Sensor is an OV76BE");
2757 sd->sensor = SEN_OV76BE;
2758 }
2759 } else if ((rc & 3) == 0) {
2760 /* try to read product id registers */
2761 high = i2c_r(sd, 0x0a);
2762 if (high < 0) {
2763 PERR("Error detecting camera chip PID\n");
2764 return;
2765 }
2766 low = i2c_r(sd, 0x0b);
2767 if (low < 0) {
2768 PERR("Error detecting camera chip VER\n");
2769 return;
2770 }
2771 if (high == 0x76) {
2772 switch (low) {
2773 case 0x30:
2774 PERR("Sensor is an OV7630/OV7635\n");
2775 PERR("7630 is not supported by this driver\n");
2776 return;
2777 case 0x40:
2778 PDEBUG(D_PROBE, "Sensor is an OV7645");
2779 sd->sensor = SEN_OV7640; /* FIXME */
2780 break;
2781 case 0x45:
2782 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2783 sd->sensor = SEN_OV7640; /* FIXME */
2784 break;
2785 case 0x48:
2786 PDEBUG(D_PROBE, "Sensor is an OV7648");
2787 sd->sensor = SEN_OV7648;
2788 break;
2789 case 0x60:
2790 PDEBUG(D_PROBE, "Sensor is a OV7660");
2791 sd->sensor = SEN_OV7660;
2792 break;
2793 default:
2794 PERR("Unknown sensor: 0x76%02x\n", low);
2795 return;
2796 }
2797 } else {
2798 PDEBUG(D_PROBE, "Sensor is an OV7620");
2799 sd->sensor = SEN_OV7620;
2800 }
2801 } else {
2802 PERR("Unknown image sensor version: %d\n", rc & 3);
2803 }
2804 }
2805
2806 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
ov6xx0_configure(struct sd * sd)2807 static void ov6xx0_configure(struct sd *sd)
2808 {
2809 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2810 int rc;
2811
2812 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2813
2814 /* Detect sensor (sub)type */
2815 rc = i2c_r(sd, OV7610_REG_COM_I);
2816 if (rc < 0) {
2817 PERR("Error detecting sensor type\n");
2818 return;
2819 }
2820
2821 /* Ugh. The first two bits are the version bits, but
2822 * the entire register value must be used. I guess OVT
2823 * underestimated how many variants they would make. */
2824 switch (rc) {
2825 case 0x00:
2826 sd->sensor = SEN_OV6630;
2827 pr_warn("WARNING: Sensor is an OV66308. Your camera may have been misdetected in previous driver versions.\n");
2828 break;
2829 case 0x01:
2830 sd->sensor = SEN_OV6620;
2831 PDEBUG(D_PROBE, "Sensor is an OV6620");
2832 break;
2833 case 0x02:
2834 sd->sensor = SEN_OV6630;
2835 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2836 break;
2837 case 0x03:
2838 sd->sensor = SEN_OV66308AF;
2839 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2840 break;
2841 case 0x90:
2842 sd->sensor = SEN_OV6630;
2843 pr_warn("WARNING: Sensor is an OV66307. Your camera may have been misdetected in previous driver versions.\n");
2844 break;
2845 default:
2846 PERR("FATAL: Unknown sensor version: 0x%02x\n", rc);
2847 return;
2848 }
2849
2850 /* Set sensor-specific vars */
2851 sd->sif = 1;
2852 }
2853
2854 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
ov51x_led_control(struct sd * sd,int on)2855 static void ov51x_led_control(struct sd *sd, int on)
2856 {
2857 if (sd->invert_led)
2858 on = !on;
2859
2860 switch (sd->bridge) {
2861 /* OV511 has no LED control */
2862 case BRIDGE_OV511PLUS:
2863 reg_w(sd, R511_SYS_LED_CTL, on);
2864 break;
2865 case BRIDGE_OV518:
2866 case BRIDGE_OV518PLUS:
2867 reg_w_mask(sd, R518_GPIO_OUT, 0x02 * on, 0x02);
2868 break;
2869 case BRIDGE_OV519:
2870 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, on, 1);
2871 break;
2872 }
2873 }
2874
sd_reset_snapshot(struct gspca_dev * gspca_dev)2875 static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
2876 {
2877 struct sd *sd = (struct sd *) gspca_dev;
2878
2879 if (!sd->snapshot_needs_reset)
2880 return;
2881
2882 /* Note it is important that we clear sd->snapshot_needs_reset,
2883 before actually clearing the snapshot state in the bridge
2884 otherwise we might race with the pkt_scan interrupt handler */
2885 sd->snapshot_needs_reset = 0;
2886
2887 switch (sd->bridge) {
2888 case BRIDGE_OV511:
2889 case BRIDGE_OV511PLUS:
2890 reg_w(sd, R51x_SYS_SNAP, 0x02);
2891 reg_w(sd, R51x_SYS_SNAP, 0x00);
2892 break;
2893 case BRIDGE_OV518:
2894 case BRIDGE_OV518PLUS:
2895 reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
2896 reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
2897 break;
2898 case BRIDGE_OV519:
2899 reg_w(sd, R51x_SYS_RESET, 0x40);
2900 reg_w(sd, R51x_SYS_RESET, 0x00);
2901 break;
2902 }
2903 }
2904
ov51x_upload_quan_tables(struct sd * sd)2905 static void ov51x_upload_quan_tables(struct sd *sd)
2906 {
2907 const unsigned char yQuanTable511[] = {
2908 0, 1, 1, 2, 2, 3, 3, 4,
2909 1, 1, 1, 2, 2, 3, 4, 4,
2910 1, 1, 2, 2, 3, 4, 4, 4,
2911 2, 2, 2, 3, 4, 4, 4, 4,
2912 2, 2, 3, 4, 4, 5, 5, 5,
2913 3, 3, 4, 4, 5, 5, 5, 5,
2914 3, 4, 4, 4, 5, 5, 5, 5,
2915 4, 4, 4, 4, 5, 5, 5, 5
2916 };
2917
2918 const unsigned char uvQuanTable511[] = {
2919 0, 2, 2, 3, 4, 4, 4, 4,
2920 2, 2, 2, 4, 4, 4, 4, 4,
2921 2, 2, 3, 4, 4, 4, 4, 4,
2922 3, 4, 4, 4, 4, 4, 4, 4,
2923 4, 4, 4, 4, 4, 4, 4, 4,
2924 4, 4, 4, 4, 4, 4, 4, 4,
2925 4, 4, 4, 4, 4, 4, 4, 4,
2926 4, 4, 4, 4, 4, 4, 4, 4
2927 };
2928
2929 /* OV518 quantization tables are 8x4 (instead of 8x8) */
2930 const unsigned char yQuanTable518[] = {
2931 5, 4, 5, 6, 6, 7, 7, 7,
2932 5, 5, 5, 5, 6, 7, 7, 7,
2933 6, 6, 6, 6, 7, 7, 7, 8,
2934 7, 7, 6, 7, 7, 7, 8, 8
2935 };
2936 const unsigned char uvQuanTable518[] = {
2937 6, 6, 6, 7, 7, 7, 7, 7,
2938 6, 6, 6, 7, 7, 7, 7, 7,
2939 6, 6, 6, 7, 7, 7, 7, 8,
2940 7, 7, 7, 7, 7, 7, 8, 8
2941 };
2942
2943 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2944 const unsigned char *pYTable, *pUVTable;
2945 unsigned char val0, val1;
2946 int i, size, reg = R51x_COMP_LUT_BEGIN;
2947
2948 PDEBUG(D_PROBE, "Uploading quantization tables");
2949
2950 if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2951 pYTable = yQuanTable511;
2952 pUVTable = uvQuanTable511;
2953 size = 32;
2954 } else {
2955 pYTable = yQuanTable518;
2956 pUVTable = uvQuanTable518;
2957 size = 16;
2958 }
2959
2960 for (i = 0; i < size; i++) {
2961 val0 = *pYTable++;
2962 val1 = *pYTable++;
2963 val0 &= 0x0f;
2964 val1 &= 0x0f;
2965 val0 |= val1 << 4;
2966 reg_w(sd, reg, val0);
2967
2968 val0 = *pUVTable++;
2969 val1 = *pUVTable++;
2970 val0 &= 0x0f;
2971 val1 &= 0x0f;
2972 val0 |= val1 << 4;
2973 reg_w(sd, reg + size, val0);
2974
2975 reg++;
2976 }
2977 }
2978
2979 /* This initializes the OV511/OV511+ and the sensor */
ov511_configure(struct gspca_dev * gspca_dev)2980 static void ov511_configure(struct gspca_dev *gspca_dev)
2981 {
2982 struct sd *sd = (struct sd *) gspca_dev;
2983
2984 /* For 511 and 511+ */
2985 const struct ov_regvals init_511[] = {
2986 { R51x_SYS_RESET, 0x7f },
2987 { R51x_SYS_INIT, 0x01 },
2988 { R51x_SYS_RESET, 0x7f },
2989 { R51x_SYS_INIT, 0x01 },
2990 { R51x_SYS_RESET, 0x3f },
2991 { R51x_SYS_INIT, 0x01 },
2992 { R51x_SYS_RESET, 0x3d },
2993 };
2994
2995 const struct ov_regvals norm_511[] = {
2996 { R511_DRAM_FLOW_CTL, 0x01 },
2997 { R51x_SYS_SNAP, 0x00 },
2998 { R51x_SYS_SNAP, 0x02 },
2999 { R51x_SYS_SNAP, 0x00 },
3000 { R511_FIFO_OPTS, 0x1f },
3001 { R511_COMP_EN, 0x00 },
3002 { R511_COMP_LUT_EN, 0x03 },
3003 };
3004
3005 const struct ov_regvals norm_511_p[] = {
3006 { R511_DRAM_FLOW_CTL, 0xff },
3007 { R51x_SYS_SNAP, 0x00 },
3008 { R51x_SYS_SNAP, 0x02 },
3009 { R51x_SYS_SNAP, 0x00 },
3010 { R511_FIFO_OPTS, 0xff },
3011 { R511_COMP_EN, 0x00 },
3012 { R511_COMP_LUT_EN, 0x03 },
3013 };
3014
3015 const struct ov_regvals compress_511[] = {
3016 { 0x70, 0x1f },
3017 { 0x71, 0x05 },
3018 { 0x72, 0x06 },
3019 { 0x73, 0x06 },
3020 { 0x74, 0x14 },
3021 { 0x75, 0x03 },
3022 { 0x76, 0x04 },
3023 { 0x77, 0x04 },
3024 };
3025
3026 PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
3027
3028 write_regvals(sd, init_511, ARRAY_SIZE(init_511));
3029
3030 switch (sd->bridge) {
3031 case BRIDGE_OV511:
3032 write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
3033 break;
3034 case BRIDGE_OV511PLUS:
3035 write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
3036 break;
3037 }
3038
3039 /* Init compression */
3040 write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
3041
3042 ov51x_upload_quan_tables(sd);
3043 }
3044
3045 /* This initializes the OV518/OV518+ and the sensor */
ov518_configure(struct gspca_dev * gspca_dev)3046 static void ov518_configure(struct gspca_dev *gspca_dev)
3047 {
3048 struct sd *sd = (struct sd *) gspca_dev;
3049
3050 /* For 518 and 518+ */
3051 const struct ov_regvals init_518[] = {
3052 { R51x_SYS_RESET, 0x40 },
3053 { R51x_SYS_INIT, 0xe1 },
3054 { R51x_SYS_RESET, 0x3e },
3055 { R51x_SYS_INIT, 0xe1 },
3056 { R51x_SYS_RESET, 0x00 },
3057 { R51x_SYS_INIT, 0xe1 },
3058 { 0x46, 0x00 },
3059 { 0x5d, 0x03 },
3060 };
3061
3062 const struct ov_regvals norm_518[] = {
3063 { R51x_SYS_SNAP, 0x02 }, /* Reset */
3064 { R51x_SYS_SNAP, 0x01 }, /* Enable */
3065 { 0x31, 0x0f },
3066 { 0x5d, 0x03 },
3067 { 0x24, 0x9f },
3068 { 0x25, 0x90 },
3069 { 0x20, 0x00 },
3070 { 0x51, 0x04 },
3071 { 0x71, 0x19 },
3072 { 0x2f, 0x80 },
3073 };
3074
3075 const struct ov_regvals norm_518_p[] = {
3076 { R51x_SYS_SNAP, 0x02 }, /* Reset */
3077 { R51x_SYS_SNAP, 0x01 }, /* Enable */
3078 { 0x31, 0x0f },
3079 { 0x5d, 0x03 },
3080 { 0x24, 0x9f },
3081 { 0x25, 0x90 },
3082 { 0x20, 0x60 },
3083 { 0x51, 0x02 },
3084 { 0x71, 0x19 },
3085 { 0x40, 0xff },
3086 { 0x41, 0x42 },
3087 { 0x46, 0x00 },
3088 { 0x33, 0x04 },
3089 { 0x21, 0x19 },
3090 { 0x3f, 0x10 },
3091 { 0x2f, 0x80 },
3092 };
3093
3094 /* First 5 bits of custom ID reg are a revision ID on OV518 */
3095 sd->revision = reg_r(sd, R51x_SYS_CUST_ID) & 0x1f;
3096 PDEBUG(D_PROBE, "Device revision %d", sd->revision);
3097
3098 write_regvals(sd, init_518, ARRAY_SIZE(init_518));
3099
3100 /* Set LED GPIO pin to output mode */
3101 reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
3102
3103 switch (sd->bridge) {
3104 case BRIDGE_OV518:
3105 write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
3106 break;
3107 case BRIDGE_OV518PLUS:
3108 write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
3109 break;
3110 }
3111
3112 ov51x_upload_quan_tables(sd);
3113
3114 reg_w(sd, 0x2f, 0x80);
3115 }
3116
ov519_configure(struct sd * sd)3117 static void ov519_configure(struct sd *sd)
3118 {
3119 static const struct ov_regvals init_519[] = {
3120 { 0x5a, 0x6d }, /* EnableSystem */
3121 { 0x53, 0x9b }, /* don't enable the microcontroller */
3122 { OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
3123 { 0x5d, 0x03 },
3124 { 0x49, 0x01 },
3125 { 0x48, 0x00 },
3126 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
3127 * detection will fail. This deserves further investigation. */
3128 { OV519_GPIO_IO_CTRL0, 0xee },
3129 { OV519_R51_RESET1, 0x0f },
3130 { OV519_R51_RESET1, 0x00 },
3131 { 0x22, 0x00 },
3132 /* windows reads 0x55 at this point*/
3133 };
3134
3135 write_regvals(sd, init_519, ARRAY_SIZE(init_519));
3136 }
3137
ovfx2_configure(struct sd * sd)3138 static void ovfx2_configure(struct sd *sd)
3139 {
3140 static const struct ov_regvals init_fx2[] = {
3141 { 0x00, 0x60 },
3142 { 0x02, 0x01 },
3143 { 0x0f, 0x1d },
3144 { 0xe9, 0x82 },
3145 { 0xea, 0xc7 },
3146 { 0xeb, 0x10 },
3147 { 0xec, 0xf6 },
3148 };
3149
3150 sd->stopped = 1;
3151
3152 write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
3153 }
3154
3155 /* set the mode */
3156 /* This function works for ov7660 only */
ov519_set_mode(struct sd * sd)3157 static void ov519_set_mode(struct sd *sd)
3158 {
3159 static const struct ov_regvals bridge_ov7660[2][10] = {
3160 {{0x10, 0x14}, {0x11, 0x1e}, {0x12, 0x00}, {0x13, 0x00},
3161 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3162 {0x25, 0x01}, {0x26, 0x00}},
3163 {{0x10, 0x28}, {0x11, 0x3c}, {0x12, 0x00}, {0x13, 0x00},
3164 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3165 {0x25, 0x03}, {0x26, 0x00}}
3166 };
3167 static const struct ov_i2c_regvals sensor_ov7660[2][3] = {
3168 {{0x12, 0x00}, {0x24, 0x00}, {0x0c, 0x0c}},
3169 {{0x12, 0x00}, {0x04, 0x00}, {0x0c, 0x00}}
3170 };
3171 static const struct ov_i2c_regvals sensor_ov7660_2[] = {
3172 {OV7670_R17_HSTART, 0x13},
3173 {OV7670_R18_HSTOP, 0x01},
3174 {OV7670_R32_HREF, 0x92},
3175 {OV7670_R19_VSTART, 0x02},
3176 {OV7670_R1A_VSTOP, 0x7a},
3177 {OV7670_R03_VREF, 0x00},
3178 /* {0x33, 0x00}, */
3179 /* {0x34, 0x07}, */
3180 /* {0x36, 0x00}, */
3181 /* {0x6b, 0x0a}, */
3182 };
3183
3184 write_regvals(sd, bridge_ov7660[sd->gspca_dev.curr_mode],
3185 ARRAY_SIZE(bridge_ov7660[0]));
3186 write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode],
3187 ARRAY_SIZE(sensor_ov7660[0]));
3188 write_i2c_regvals(sd, sensor_ov7660_2,
3189 ARRAY_SIZE(sensor_ov7660_2));
3190 }
3191
3192 /* set the frame rate */
3193 /* This function works for sensors ov7640, ov7648 ov7660 and ov7670 only */
ov519_set_fr(struct sd * sd)3194 static void ov519_set_fr(struct sd *sd)
3195 {
3196 int fr;
3197 u8 clock;
3198 /* frame rate table with indices:
3199 * - mode = 0: 320x240, 1: 640x480
3200 * - fr rate = 0: 30, 1: 25, 2: 20, 3: 15, 4: 10, 5: 5
3201 * - reg = 0: bridge a4, 1: bridge 23, 2: sensor 11 (clock)
3202 */
3203 static const u8 fr_tb[2][6][3] = {
3204 {{0x04, 0xff, 0x00},
3205 {0x04, 0x1f, 0x00},
3206 {0x04, 0x1b, 0x00},
3207 {0x04, 0x15, 0x00},
3208 {0x04, 0x09, 0x00},
3209 {0x04, 0x01, 0x00}},
3210 {{0x0c, 0xff, 0x00},
3211 {0x0c, 0x1f, 0x00},
3212 {0x0c, 0x1b, 0x00},
3213 {0x04, 0xff, 0x01},
3214 {0x04, 0x1f, 0x01},
3215 {0x04, 0x1b, 0x01}},
3216 };
3217
3218 if (frame_rate > 0)
3219 sd->frame_rate = frame_rate;
3220 if (sd->frame_rate >= 30)
3221 fr = 0;
3222 else if (sd->frame_rate >= 25)
3223 fr = 1;
3224 else if (sd->frame_rate >= 20)
3225 fr = 2;
3226 else if (sd->frame_rate >= 15)
3227 fr = 3;
3228 else if (sd->frame_rate >= 10)
3229 fr = 4;
3230 else
3231 fr = 5;
3232 reg_w(sd, 0xa4, fr_tb[sd->gspca_dev.curr_mode][fr][0]);
3233 reg_w(sd, 0x23, fr_tb[sd->gspca_dev.curr_mode][fr][1]);
3234 clock = fr_tb[sd->gspca_dev.curr_mode][fr][2];
3235 if (sd->sensor == SEN_OV7660)
3236 clock |= 0x80; /* enable double clock */
3237 ov518_i2c_w(sd, OV7670_R11_CLKRC, clock);
3238 }
3239
setautogain(struct gspca_dev * gspca_dev,s32 val)3240 static void setautogain(struct gspca_dev *gspca_dev, s32 val)
3241 {
3242 struct sd *sd = (struct sd *) gspca_dev;
3243
3244 i2c_w_mask(sd, 0x13, val ? 0x05 : 0x00, 0x05);
3245 }
3246
3247 /* this function is called at probe time */
sd_config(struct gspca_dev * gspca_dev,const struct usb_device_id * id)3248 static int sd_config(struct gspca_dev *gspca_dev,
3249 const struct usb_device_id *id)
3250 {
3251 struct sd *sd = (struct sd *) gspca_dev;
3252 struct cam *cam = &gspca_dev->cam;
3253
3254 sd->bridge = id->driver_info & BRIDGE_MASK;
3255 sd->invert_led = (id->driver_info & BRIDGE_INVERT_LED) != 0;
3256
3257 switch (sd->bridge) {
3258 case BRIDGE_OV511:
3259 case BRIDGE_OV511PLUS:
3260 cam->cam_mode = ov511_vga_mode;
3261 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3262 break;
3263 case BRIDGE_OV518:
3264 case BRIDGE_OV518PLUS:
3265 cam->cam_mode = ov518_vga_mode;
3266 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3267 break;
3268 case BRIDGE_OV519:
3269 cam->cam_mode = ov519_vga_mode;
3270 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3271 break;
3272 case BRIDGE_OVFX2:
3273 cam->cam_mode = ov519_vga_mode;
3274 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3275 cam->bulk_size = OVFX2_BULK_SIZE;
3276 cam->bulk_nurbs = MAX_NURBS;
3277 cam->bulk = 1;
3278 break;
3279 case BRIDGE_W9968CF:
3280 cam->cam_mode = w9968cf_vga_mode;
3281 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3282 break;
3283 }
3284
3285 sd->frame_rate = 15;
3286
3287 return 0;
3288 }
3289
3290 /* this function is called at probe and resume time */
sd_init(struct gspca_dev * gspca_dev)3291 static int sd_init(struct gspca_dev *gspca_dev)
3292 {
3293 struct sd *sd = (struct sd *) gspca_dev;
3294 struct cam *cam = &gspca_dev->cam;
3295
3296 switch (sd->bridge) {
3297 case BRIDGE_OV511:
3298 case BRIDGE_OV511PLUS:
3299 ov511_configure(gspca_dev);
3300 break;
3301 case BRIDGE_OV518:
3302 case BRIDGE_OV518PLUS:
3303 ov518_configure(gspca_dev);
3304 break;
3305 case BRIDGE_OV519:
3306 ov519_configure(sd);
3307 break;
3308 case BRIDGE_OVFX2:
3309 ovfx2_configure(sd);
3310 break;
3311 case BRIDGE_W9968CF:
3312 w9968cf_configure(sd);
3313 break;
3314 }
3315
3316 /* The OV519 must be more aggressive about sensor detection since
3317 * I2C write will never fail if the sensor is not present. We have
3318 * to try to initialize the sensor to detect its presence */
3319 sd->sensor = -1;
3320
3321 /* Test for 76xx */
3322 if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3323 ov7xx0_configure(sd);
3324
3325 /* Test for 6xx0 */
3326 } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3327 ov6xx0_configure(sd);
3328
3329 /* Test for 8xx0 */
3330 } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3331 ov8xx0_configure(sd);
3332
3333 /* Test for 3xxx / 2xxx */
3334 } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3335 ov_hires_configure(sd);
3336 } else {
3337 PERR("Can't determine sensor slave IDs\n");
3338 goto error;
3339 }
3340
3341 if (sd->sensor < 0)
3342 goto error;
3343
3344 ov51x_led_control(sd, 0); /* turn LED off */
3345
3346 switch (sd->bridge) {
3347 case BRIDGE_OV511:
3348 case BRIDGE_OV511PLUS:
3349 if (sd->sif) {
3350 cam->cam_mode = ov511_sif_mode;
3351 cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3352 }
3353 break;
3354 case BRIDGE_OV518:
3355 case BRIDGE_OV518PLUS:
3356 if (sd->sif) {
3357 cam->cam_mode = ov518_sif_mode;
3358 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3359 }
3360 break;
3361 case BRIDGE_OV519:
3362 if (sd->sif) {
3363 cam->cam_mode = ov519_sif_mode;
3364 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3365 }
3366 break;
3367 case BRIDGE_OVFX2:
3368 switch (sd->sensor) {
3369 case SEN_OV2610:
3370 case SEN_OV2610AE:
3371 cam->cam_mode = ovfx2_ov2610_mode;
3372 cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3373 break;
3374 case SEN_OV3610:
3375 cam->cam_mode = ovfx2_ov3610_mode;
3376 cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3377 break;
3378 case SEN_OV9600:
3379 cam->cam_mode = ovfx2_ov9600_mode;
3380 cam->nmodes = ARRAY_SIZE(ovfx2_ov9600_mode);
3381 break;
3382 default:
3383 if (sd->sif) {
3384 cam->cam_mode = ov519_sif_mode;
3385 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3386 }
3387 break;
3388 }
3389 break;
3390 case BRIDGE_W9968CF:
3391 if (sd->sif)
3392 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode) - 1;
3393
3394 /* w9968cf needs initialisation once the sensor is known */
3395 w9968cf_init(sd);
3396 break;
3397 }
3398
3399 /* initialize the sensor */
3400 switch (sd->sensor) {
3401 case SEN_OV2610:
3402 write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610));
3403
3404 /* Enable autogain, autoexpo, awb, bandfilter */
3405 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3406 break;
3407 case SEN_OV2610AE:
3408 write_i2c_regvals(sd, norm_2610ae, ARRAY_SIZE(norm_2610ae));
3409
3410 /* enable autoexpo */
3411 i2c_w_mask(sd, 0x13, 0x05, 0x05);
3412 break;
3413 case SEN_OV3610:
3414 write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b));
3415
3416 /* Enable autogain, autoexpo, awb, bandfilter */
3417 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3418 break;
3419 case SEN_OV6620:
3420 write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20));
3421 break;
3422 case SEN_OV6630:
3423 case SEN_OV66308AF:
3424 write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30));
3425 break;
3426 default:
3427 /* case SEN_OV7610: */
3428 /* case SEN_OV76BE: */
3429 write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610));
3430 i2c_w_mask(sd, 0x0e, 0x00, 0x40);
3431 break;
3432 case SEN_OV7620:
3433 case SEN_OV7620AE:
3434 write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620));
3435 break;
3436 case SEN_OV7640:
3437 case SEN_OV7648:
3438 write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640));
3439 break;
3440 case SEN_OV7660:
3441 i2c_w(sd, OV7670_R12_COM7, OV7670_COM7_RESET);
3442 msleep(14);
3443 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
3444 write_regvals(sd, init_519_ov7660,
3445 ARRAY_SIZE(init_519_ov7660));
3446 write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660));
3447 sd->gspca_dev.curr_mode = 1; /* 640x480 */
3448 ov519_set_mode(sd);
3449 ov519_set_fr(sd);
3450 sd_reset_snapshot(gspca_dev);
3451 ov51x_restart(sd);
3452 ov51x_stop(sd); /* not in win traces */
3453 ov51x_led_control(sd, 0);
3454 break;
3455 case SEN_OV7670:
3456 write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670));
3457 break;
3458 case SEN_OV8610:
3459 write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610));
3460 break;
3461 case SEN_OV9600:
3462 write_i2c_regvals(sd, norm_9600, ARRAY_SIZE(norm_9600));
3463
3464 /* enable autoexpo */
3465 /* i2c_w_mask(sd, 0x13, 0x05, 0x05); */
3466 break;
3467 }
3468 return gspca_dev->usb_err;
3469 error:
3470 PERR("OV519 Config failed");
3471 return -EINVAL;
3472 }
3473
3474 /* function called at start time before URB creation */
sd_isoc_init(struct gspca_dev * gspca_dev)3475 static int sd_isoc_init(struct gspca_dev *gspca_dev)
3476 {
3477 struct sd *sd = (struct sd *) gspca_dev;
3478
3479 switch (sd->bridge) {
3480 case BRIDGE_OVFX2:
3481 if (gspca_dev->pixfmt.width != 800)
3482 gspca_dev->cam.bulk_size = OVFX2_BULK_SIZE;
3483 else
3484 gspca_dev->cam.bulk_size = 7 * 4096;
3485 break;
3486 }
3487 return 0;
3488 }
3489
3490 /* Set up the OV511/OV511+ with the given image parameters.
3491 *
3492 * Do not put any sensor-specific code in here (including I2C I/O functions)
3493 */
ov511_mode_init_regs(struct sd * sd)3494 static void ov511_mode_init_regs(struct sd *sd)
3495 {
3496 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3497 int hsegs, vsegs, packet_size, fps, needed;
3498 int interlaced = 0;
3499 struct usb_host_interface *alt;
3500 struct usb_interface *intf;
3501
3502 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3503 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3504 if (!alt) {
3505 PERR("Couldn't get altsetting\n");
3506 sd->gspca_dev.usb_err = -EIO;
3507 return;
3508 }
3509
3510 if (alt->desc.bNumEndpoints < 1) {
3511 sd->gspca_dev.usb_err = -ENODEV;
3512 return;
3513 }
3514
3515 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3516 reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3517
3518 reg_w(sd, R511_CAM_UV_EN, 0x01);
3519 reg_w(sd, R511_SNAP_UV_EN, 0x01);
3520 reg_w(sd, R511_SNAP_OPTS, 0x03);
3521
3522 /* Here I'm assuming that snapshot size == image size.
3523 * I hope that's always true. --claudio
3524 */
3525 hsegs = (sd->gspca_dev.pixfmt.width >> 3) - 1;
3526 vsegs = (sd->gspca_dev.pixfmt.height >> 3) - 1;
3527
3528 reg_w(sd, R511_CAM_PXCNT, hsegs);
3529 reg_w(sd, R511_CAM_LNCNT, vsegs);
3530 reg_w(sd, R511_CAM_PXDIV, 0x00);
3531 reg_w(sd, R511_CAM_LNDIV, 0x00);
3532
3533 /* YUV420, low pass filter on */
3534 reg_w(sd, R511_CAM_OPTS, 0x03);
3535
3536 /* Snapshot additions */
3537 reg_w(sd, R511_SNAP_PXCNT, hsegs);
3538 reg_w(sd, R511_SNAP_LNCNT, vsegs);
3539 reg_w(sd, R511_SNAP_PXDIV, 0x00);
3540 reg_w(sd, R511_SNAP_LNDIV, 0x00);
3541
3542 /******** Set the framerate ********/
3543 if (frame_rate > 0)
3544 sd->frame_rate = frame_rate;
3545
3546 switch (sd->sensor) {
3547 case SEN_OV6620:
3548 /* No framerate control, doesn't like higher rates yet */
3549 sd->clockdiv = 3;
3550 break;
3551
3552 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3553 for more sensors we need to do this for them too */
3554 case SEN_OV7620:
3555 case SEN_OV7620AE:
3556 case SEN_OV7640:
3557 case SEN_OV7648:
3558 case SEN_OV76BE:
3559 if (sd->gspca_dev.pixfmt.width == 320)
3560 interlaced = 1;
3561 /* Fall through */
3562 case SEN_OV6630:
3563 case SEN_OV7610:
3564 case SEN_OV7670:
3565 switch (sd->frame_rate) {
3566 case 30:
3567 case 25:
3568 /* Not enough bandwidth to do 640x480 @ 30 fps */
3569 if (sd->gspca_dev.pixfmt.width != 640) {
3570 sd->clockdiv = 0;
3571 break;
3572 }
3573 /* Fall through for 640x480 case */
3574 default:
3575 /* case 20: */
3576 /* case 15: */
3577 sd->clockdiv = 1;
3578 break;
3579 case 10:
3580 sd->clockdiv = 2;
3581 break;
3582 case 5:
3583 sd->clockdiv = 5;
3584 break;
3585 }
3586 if (interlaced) {
3587 sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3588 /* Higher then 10 does not work */
3589 if (sd->clockdiv > 10)
3590 sd->clockdiv = 10;
3591 }
3592 break;
3593
3594 case SEN_OV8610:
3595 /* No framerate control ?? */
3596 sd->clockdiv = 0;
3597 break;
3598 }
3599
3600 /* Check if we have enough bandwidth to disable compression */
3601 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3602 needed = fps * sd->gspca_dev.pixfmt.width *
3603 sd->gspca_dev.pixfmt.height * 3 / 2;
3604 /* 1000 isoc packets/sec */
3605 if (needed > 1000 * packet_size) {
3606 /* Enable Y and UV quantization and compression */
3607 reg_w(sd, R511_COMP_EN, 0x07);
3608 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3609 } else {
3610 reg_w(sd, R511_COMP_EN, 0x06);
3611 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3612 }
3613
3614 reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3615 reg_w(sd, R51x_SYS_RESET, 0);
3616 }
3617
3618 /* Sets up the OV518/OV518+ with the given image parameters
3619 *
3620 * OV518 needs a completely different approach, until we can figure out what
3621 * the individual registers do. Also, only 15 FPS is supported now.
3622 *
3623 * Do not put any sensor-specific code in here (including I2C I/O functions)
3624 */
ov518_mode_init_regs(struct sd * sd)3625 static void ov518_mode_init_regs(struct sd *sd)
3626 {
3627 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3628 int hsegs, vsegs, packet_size;
3629 struct usb_host_interface *alt;
3630 struct usb_interface *intf;
3631
3632 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3633 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3634 if (!alt) {
3635 PERR("Couldn't get altsetting\n");
3636 sd->gspca_dev.usb_err = -EIO;
3637 return;
3638 }
3639
3640 if (alt->desc.bNumEndpoints < 1) {
3641 sd->gspca_dev.usb_err = -ENODEV;
3642 return;
3643 }
3644
3645 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3646 ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3647
3648 /******** Set the mode ********/
3649 reg_w(sd, 0x2b, 0);
3650 reg_w(sd, 0x2c, 0);
3651 reg_w(sd, 0x2d, 0);
3652 reg_w(sd, 0x2e, 0);
3653 reg_w(sd, 0x3b, 0);
3654 reg_w(sd, 0x3c, 0);
3655 reg_w(sd, 0x3d, 0);
3656 reg_w(sd, 0x3e, 0);
3657
3658 if (sd->bridge == BRIDGE_OV518) {
3659 /* Set 8-bit (YVYU) input format */
3660 reg_w_mask(sd, 0x20, 0x08, 0x08);
3661
3662 /* Set 12-bit (4:2:0) output format */
3663 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3664 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3665 } else {
3666 reg_w(sd, 0x28, 0x80);
3667 reg_w(sd, 0x38, 0x80);
3668 }
3669
3670 hsegs = sd->gspca_dev.pixfmt.width / 16;
3671 vsegs = sd->gspca_dev.pixfmt.height / 4;
3672
3673 reg_w(sd, 0x29, hsegs);
3674 reg_w(sd, 0x2a, vsegs);
3675
3676 reg_w(sd, 0x39, hsegs);
3677 reg_w(sd, 0x3a, vsegs);
3678
3679 /* Windows driver does this here; who knows why */
3680 reg_w(sd, 0x2f, 0x80);
3681
3682 /******** Set the framerate ********/
3683 if (sd->bridge == BRIDGE_OV518PLUS && sd->revision == 0 &&
3684 sd->sensor == SEN_OV7620AE)
3685 sd->clockdiv = 0;
3686 else
3687 sd->clockdiv = 1;
3688
3689 /* Mode independent, but framerate dependent, regs */
3690 /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3691 reg_w(sd, 0x51, 0x04);
3692 reg_w(sd, 0x22, 0x18);
3693 reg_w(sd, 0x23, 0xff);
3694
3695 if (sd->bridge == BRIDGE_OV518PLUS) {
3696 switch (sd->sensor) {
3697 case SEN_OV7620AE:
3698 /*
3699 * HdG: 640x480 needs special handling on device
3700 * revision 2, we check for device revison > 0 to
3701 * avoid regressions, as we don't know the correct
3702 * thing todo for revision 1.
3703 *
3704 * Also this likely means we don't need to
3705 * differentiate between the OV7620 and OV7620AE,
3706 * earlier testing hitting this same problem likely
3707 * happened to be with revision < 2 cams using an
3708 * OV7620 and revision 2 cams using an OV7620AE.
3709 */
3710 if (sd->revision > 0 &&
3711 sd->gspca_dev.pixfmt.width == 640) {
3712 reg_w(sd, 0x20, 0x60);
3713 reg_w(sd, 0x21, 0x1f);
3714 } else {
3715 reg_w(sd, 0x20, 0x00);
3716 reg_w(sd, 0x21, 0x19);
3717 }
3718 break;
3719 case SEN_OV7620:
3720 reg_w(sd, 0x20, 0x00);
3721 reg_w(sd, 0x21, 0x19);
3722 break;
3723 default:
3724 reg_w(sd, 0x21, 0x19);
3725 }
3726 } else
3727 reg_w(sd, 0x71, 0x17); /* Compression-related? */
3728
3729 /* FIXME: Sensor-specific */
3730 /* Bit 5 is what matters here. Of course, it is "reserved" */
3731 i2c_w(sd, 0x54, 0x23);
3732
3733 reg_w(sd, 0x2f, 0x80);
3734
3735 if (sd->bridge == BRIDGE_OV518PLUS) {
3736 reg_w(sd, 0x24, 0x94);
3737 reg_w(sd, 0x25, 0x90);
3738 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3739 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
3740 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
3741 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
3742 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
3743 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
3744 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
3745 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
3746 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
3747 } else {
3748 reg_w(sd, 0x24, 0x9f);
3749 reg_w(sd, 0x25, 0x90);
3750 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3751 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
3752 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
3753 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
3754 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
3755 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
3756 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
3757 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
3758 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
3759 }
3760
3761 reg_w(sd, 0x2f, 0x80);
3762 }
3763
3764 /* Sets up the OV519 with the given image parameters
3765 *
3766 * OV519 needs a completely different approach, until we can figure out what
3767 * the individual registers do.
3768 *
3769 * Do not put any sensor-specific code in here (including I2C I/O functions)
3770 */
ov519_mode_init_regs(struct sd * sd)3771 static void ov519_mode_init_regs(struct sd *sd)
3772 {
3773 static const struct ov_regvals mode_init_519_ov7670[] = {
3774 { 0x5d, 0x03 }, /* Turn off suspend mode */
3775 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3776 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3777 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3778 { 0xa3, 0x18 },
3779 { 0xa4, 0x04 },
3780 { 0xa5, 0x28 },
3781 { 0x37, 0x00 }, /* SetUsbInit */
3782 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3783 /* Enable both fields, YUV Input, disable defect comp (why?) */
3784 { 0x20, 0x0c },
3785 { 0x21, 0x38 },
3786 { 0x22, 0x1d },
3787 { 0x17, 0x50 }, /* undocumented */
3788 { 0x37, 0x00 }, /* undocumented */
3789 { 0x40, 0xff }, /* I2C timeout counter */
3790 { 0x46, 0x00 }, /* I2C clock prescaler */
3791 { 0x59, 0x04 }, /* new from windrv 090403 */
3792 { 0xff, 0x00 }, /* undocumented */
3793 /* windows reads 0x55 at this point, why? */
3794 };
3795
3796 static const struct ov_regvals mode_init_519[] = {
3797 { 0x5d, 0x03 }, /* Turn off suspend mode */
3798 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3799 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3800 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3801 { 0xa3, 0x18 },
3802 { 0xa4, 0x04 },
3803 { 0xa5, 0x28 },
3804 { 0x37, 0x00 }, /* SetUsbInit */
3805 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3806 /* Enable both fields, YUV Input, disable defect comp (why?) */
3807 { 0x22, 0x1d },
3808 { 0x17, 0x50 }, /* undocumented */
3809 { 0x37, 0x00 }, /* undocumented */
3810 { 0x40, 0xff }, /* I2C timeout counter */
3811 { 0x46, 0x00 }, /* I2C clock prescaler */
3812 { 0x59, 0x04 }, /* new from windrv 090403 */
3813 { 0xff, 0x00 }, /* undocumented */
3814 /* windows reads 0x55 at this point, why? */
3815 };
3816
3817 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3818
3819 /******** Set the mode ********/
3820 switch (sd->sensor) {
3821 default:
3822 write_regvals(sd, mode_init_519, ARRAY_SIZE(mode_init_519));
3823 if (sd->sensor == SEN_OV7640 ||
3824 sd->sensor == SEN_OV7648) {
3825 /* Select 8-bit input mode */
3826 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3827 }
3828 break;
3829 case SEN_OV7660:
3830 return; /* done by ov519_set_mode/fr() */
3831 case SEN_OV7670:
3832 write_regvals(sd, mode_init_519_ov7670,
3833 ARRAY_SIZE(mode_init_519_ov7670));
3834 break;
3835 }
3836
3837 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.pixfmt.width >> 4);
3838 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.pixfmt.height >> 3);
3839 if (sd->sensor == SEN_OV7670 &&
3840 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3841 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3842 else if (sd->sensor == SEN_OV7648 &&
3843 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3844 reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3845 else
3846 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3847 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
3848 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
3849 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
3850 reg_w(sd, OV519_R16_DIVIDER, 0x00);
3851 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
3852 reg_w(sd, 0x26, 0x00); /* Undocumented */
3853
3854 /******** Set the framerate ********/
3855 if (frame_rate > 0)
3856 sd->frame_rate = frame_rate;
3857
3858 /* FIXME: These are only valid at the max resolution. */
3859 sd->clockdiv = 0;
3860 switch (sd->sensor) {
3861 case SEN_OV7640:
3862 case SEN_OV7648:
3863 switch (sd->frame_rate) {
3864 default:
3865 /* case 30: */
3866 reg_w(sd, 0xa4, 0x0c);
3867 reg_w(sd, 0x23, 0xff);
3868 break;
3869 case 25:
3870 reg_w(sd, 0xa4, 0x0c);
3871 reg_w(sd, 0x23, 0x1f);
3872 break;
3873 case 20:
3874 reg_w(sd, 0xa4, 0x0c);
3875 reg_w(sd, 0x23, 0x1b);
3876 break;
3877 case 15:
3878 reg_w(sd, 0xa4, 0x04);
3879 reg_w(sd, 0x23, 0xff);
3880 sd->clockdiv = 1;
3881 break;
3882 case 10:
3883 reg_w(sd, 0xa4, 0x04);
3884 reg_w(sd, 0x23, 0x1f);
3885 sd->clockdiv = 1;
3886 break;
3887 case 5:
3888 reg_w(sd, 0xa4, 0x04);
3889 reg_w(sd, 0x23, 0x1b);
3890 sd->clockdiv = 1;
3891 break;
3892 }
3893 break;
3894 case SEN_OV8610:
3895 switch (sd->frame_rate) {
3896 default: /* 15 fps */
3897 /* case 15: */
3898 reg_w(sd, 0xa4, 0x06);
3899 reg_w(sd, 0x23, 0xff);
3900 break;
3901 case 10:
3902 reg_w(sd, 0xa4, 0x06);
3903 reg_w(sd, 0x23, 0x1f);
3904 break;
3905 case 5:
3906 reg_w(sd, 0xa4, 0x06);
3907 reg_w(sd, 0x23, 0x1b);
3908 break;
3909 }
3910 break;
3911 case SEN_OV7670: /* guesses, based on 7640 */
3912 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3913 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3914 reg_w(sd, 0xa4, 0x10);
3915 switch (sd->frame_rate) {
3916 case 30:
3917 reg_w(sd, 0x23, 0xff);
3918 break;
3919 case 20:
3920 reg_w(sd, 0x23, 0x1b);
3921 break;
3922 default:
3923 /* case 15: */
3924 reg_w(sd, 0x23, 0xff);
3925 sd->clockdiv = 1;
3926 break;
3927 }
3928 break;
3929 }
3930 }
3931
mode_init_ov_sensor_regs(struct sd * sd)3932 static void mode_init_ov_sensor_regs(struct sd *sd)
3933 {
3934 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3935 int qvga, xstart, xend, ystart, yend;
3936 u8 v;
3937
3938 qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
3939
3940 /******** Mode (VGA/QVGA) and sensor specific regs ********/
3941 switch (sd->sensor) {
3942 case SEN_OV2610:
3943 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3944 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3945 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3946 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3947 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3948 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3949 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3950 return;
3951 case SEN_OV2610AE: {
3952 u8 v;
3953
3954 /* frame rates:
3955 * 10fps / 5 fps for 1600x1200
3956 * 40fps / 20fps for 800x600
3957 */
3958 v = 80;
3959 if (qvga) {
3960 if (sd->frame_rate < 25)
3961 v = 0x81;
3962 } else {
3963 if (sd->frame_rate < 10)
3964 v = 0x81;
3965 }
3966 i2c_w(sd, 0x11, v);
3967 i2c_w(sd, 0x12, qvga ? 0x60 : 0x20);
3968 return;
3969 }
3970 case SEN_OV3610:
3971 if (qvga) {
3972 xstart = (1040 - gspca_dev->pixfmt.width) / 2 +
3973 (0x1f << 4);
3974 ystart = (776 - gspca_dev->pixfmt.height) / 2;
3975 } else {
3976 xstart = (2076 - gspca_dev->pixfmt.width) / 2 +
3977 (0x10 << 4);
3978 ystart = (1544 - gspca_dev->pixfmt.height) / 2;
3979 }
3980 xend = xstart + gspca_dev->pixfmt.width;
3981 yend = ystart + gspca_dev->pixfmt.height;
3982 /* Writing to the COMH register resets the other windowing regs
3983 to their default values, so we must do this first. */
3984 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3985 i2c_w_mask(sd, 0x32,
3986 (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3987 0x3f);
3988 i2c_w_mask(sd, 0x03,
3989 (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3990 0x0f);
3991 i2c_w(sd, 0x17, xstart >> 4);
3992 i2c_w(sd, 0x18, xend >> 4);
3993 i2c_w(sd, 0x19, ystart >> 3);
3994 i2c_w(sd, 0x1a, yend >> 3);
3995 return;
3996 case SEN_OV8610:
3997 /* For OV8610 qvga means qsvga */
3998 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3999 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4000 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4001 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
4002 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
4003 break;
4004 case SEN_OV7610:
4005 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4006 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
4007 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4008 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4009 break;
4010 case SEN_OV7620:
4011 case SEN_OV7620AE:
4012 case SEN_OV76BE:
4013 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4014 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
4015 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
4016 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
4017 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
4018 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
4019 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
4020 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4021 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4022 if (sd->sensor == SEN_OV76BE)
4023 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
4024 break;
4025 case SEN_OV7640:
4026 case SEN_OV7648:
4027 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4028 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
4029 /* Setting this undocumented bit in qvga mode removes a very
4030 annoying vertical shaking of the image */
4031 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
4032 /* Unknown */
4033 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
4034 /* Allow higher automatic gain (to allow higher framerates) */
4035 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
4036 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
4037 break;
4038 case SEN_OV7670:
4039 /* set COM7_FMT_VGA or COM7_FMT_QVGA
4040 * do we need to set anything else?
4041 * HSTART etc are set in set_ov_sensor_window itself */
4042 i2c_w_mask(sd, OV7670_R12_COM7,
4043 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
4044 OV7670_COM7_FMT_MASK);
4045 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4046 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
4047 OV7670_COM8_AWB);
4048 if (qvga) { /* QVGA from ov7670.c by
4049 * Jonathan Corbet */
4050 xstart = 164;
4051 xend = 28;
4052 ystart = 14;
4053 yend = 494;
4054 } else { /* VGA */
4055 xstart = 158;
4056 xend = 14;
4057 ystart = 10;
4058 yend = 490;
4059 }
4060 /* OV7670 hardware window registers are split across
4061 * multiple locations */
4062 i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
4063 i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
4064 v = i2c_r(sd, OV7670_R32_HREF);
4065 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
4066 msleep(10); /* need to sleep between read and write to
4067 * same reg! */
4068 i2c_w(sd, OV7670_R32_HREF, v);
4069
4070 i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
4071 i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
4072 v = i2c_r(sd, OV7670_R03_VREF);
4073 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
4074 msleep(10); /* need to sleep between read and write to
4075 * same reg! */
4076 i2c_w(sd, OV7670_R03_VREF, v);
4077 break;
4078 case SEN_OV6620:
4079 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4080 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4081 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4082 break;
4083 case SEN_OV6630:
4084 case SEN_OV66308AF:
4085 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4086 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4087 break;
4088 case SEN_OV9600: {
4089 const struct ov_i2c_regvals *vals;
4090 static const struct ov_i2c_regvals sxga_15[] = {
4091 {0x11, 0x80}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4092 };
4093 static const struct ov_i2c_regvals sxga_7_5[] = {
4094 {0x11, 0x81}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4095 };
4096 static const struct ov_i2c_regvals vga_30[] = {
4097 {0x11, 0x81}, {0x14, 0x7e}, {0x24, 0x70}, {0x25, 0x60}
4098 };
4099 static const struct ov_i2c_regvals vga_15[] = {
4100 {0x11, 0x83}, {0x14, 0x3e}, {0x24, 0x80}, {0x25, 0x70}
4101 };
4102
4103 /* frame rates:
4104 * 15fps / 7.5 fps for 1280x1024
4105 * 30fps / 15fps for 640x480
4106 */
4107 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0x40);
4108 if (qvga)
4109 vals = sd->frame_rate < 30 ? vga_15 : vga_30;
4110 else
4111 vals = sd->frame_rate < 15 ? sxga_7_5 : sxga_15;
4112 write_i2c_regvals(sd, vals, ARRAY_SIZE(sxga_15));
4113 return;
4114 }
4115 default:
4116 return;
4117 }
4118
4119 /******** Clock programming ********/
4120 i2c_w(sd, 0x11, sd->clockdiv);
4121 }
4122
4123 /* this function works for bridge ov519 and sensors ov7660 and ov7670 only */
sethvflip(struct gspca_dev * gspca_dev,s32 hflip,s32 vflip)4124 static void sethvflip(struct gspca_dev *gspca_dev, s32 hflip, s32 vflip)
4125 {
4126 struct sd *sd = (struct sd *) gspca_dev;
4127
4128 if (sd->gspca_dev.streaming)
4129 reg_w(sd, OV519_R51_RESET1, 0x0f); /* block stream */
4130 i2c_w_mask(sd, OV7670_R1E_MVFP,
4131 OV7670_MVFP_MIRROR * hflip | OV7670_MVFP_VFLIP * vflip,
4132 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
4133 if (sd->gspca_dev.streaming)
4134 reg_w(sd, OV519_R51_RESET1, 0x00); /* restart stream */
4135 }
4136
set_ov_sensor_window(struct sd * sd)4137 static void set_ov_sensor_window(struct sd *sd)
4138 {
4139 struct gspca_dev *gspca_dev;
4140 int qvga, crop;
4141 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
4142
4143 /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
4144 switch (sd->sensor) {
4145 case SEN_OV2610:
4146 case SEN_OV2610AE:
4147 case SEN_OV3610:
4148 case SEN_OV7670:
4149 case SEN_OV9600:
4150 mode_init_ov_sensor_regs(sd);
4151 return;
4152 case SEN_OV7660:
4153 ov519_set_mode(sd);
4154 ov519_set_fr(sd);
4155 return;
4156 }
4157
4158 gspca_dev = &sd->gspca_dev;
4159 qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
4160 crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2;
4161
4162 /* The different sensor ICs handle setting up of window differently.
4163 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
4164 switch (sd->sensor) {
4165 case SEN_OV8610:
4166 hwsbase = 0x1e;
4167 hwebase = 0x1e;
4168 vwsbase = 0x02;
4169 vwebase = 0x02;
4170 break;
4171 case SEN_OV7610:
4172 case SEN_OV76BE:
4173 hwsbase = 0x38;
4174 hwebase = 0x3a;
4175 vwsbase = vwebase = 0x05;
4176 break;
4177 case SEN_OV6620:
4178 case SEN_OV6630:
4179 case SEN_OV66308AF:
4180 hwsbase = 0x38;
4181 hwebase = 0x3a;
4182 vwsbase = 0x05;
4183 vwebase = 0x06;
4184 if (sd->sensor == SEN_OV66308AF && qvga)
4185 /* HDG: this fixes U and V getting swapped */
4186 hwsbase++;
4187 if (crop) {
4188 hwsbase += 8;
4189 hwebase += 8;
4190 vwsbase += 11;
4191 vwebase += 11;
4192 }
4193 break;
4194 case SEN_OV7620:
4195 case SEN_OV7620AE:
4196 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
4197 hwebase = 0x2f;
4198 vwsbase = vwebase = 0x05;
4199 break;
4200 case SEN_OV7640:
4201 case SEN_OV7648:
4202 hwsbase = 0x1a;
4203 hwebase = 0x1a;
4204 vwsbase = vwebase = 0x03;
4205 break;
4206 default:
4207 return;
4208 }
4209
4210 switch (sd->sensor) {
4211 case SEN_OV6620:
4212 case SEN_OV6630:
4213 case SEN_OV66308AF:
4214 if (qvga) { /* QCIF */
4215 hwscale = 0;
4216 vwscale = 0;
4217 } else { /* CIF */
4218 hwscale = 1;
4219 vwscale = 1; /* The datasheet says 0;
4220 * it's wrong */
4221 }
4222 break;
4223 case SEN_OV8610:
4224 if (qvga) { /* QSVGA */
4225 hwscale = 1;
4226 vwscale = 1;
4227 } else { /* SVGA */
4228 hwscale = 2;
4229 vwscale = 2;
4230 }
4231 break;
4232 default: /* SEN_OV7xx0 */
4233 if (qvga) { /* QVGA */
4234 hwscale = 1;
4235 vwscale = 0;
4236 } else { /* VGA */
4237 hwscale = 2;
4238 vwscale = 1;
4239 }
4240 }
4241
4242 mode_init_ov_sensor_regs(sd);
4243
4244 i2c_w(sd, 0x17, hwsbase);
4245 i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
4246 i2c_w(sd, 0x19, vwsbase);
4247 i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
4248 }
4249
4250 /* -- start the camera -- */
sd_start(struct gspca_dev * gspca_dev)4251 static int sd_start(struct gspca_dev *gspca_dev)
4252 {
4253 struct sd *sd = (struct sd *) gspca_dev;
4254
4255 /* Default for most bridges, allow bridge_mode_init_regs to override */
4256 sd->sensor_width = sd->gspca_dev.pixfmt.width;
4257 sd->sensor_height = sd->gspca_dev.pixfmt.height;
4258
4259 switch (sd->bridge) {
4260 case BRIDGE_OV511:
4261 case BRIDGE_OV511PLUS:
4262 ov511_mode_init_regs(sd);
4263 break;
4264 case BRIDGE_OV518:
4265 case BRIDGE_OV518PLUS:
4266 ov518_mode_init_regs(sd);
4267 break;
4268 case BRIDGE_OV519:
4269 ov519_mode_init_regs(sd);
4270 break;
4271 /* case BRIDGE_OVFX2: nothing to do */
4272 case BRIDGE_W9968CF:
4273 w9968cf_mode_init_regs(sd);
4274 break;
4275 }
4276
4277 set_ov_sensor_window(sd);
4278
4279 /* Force clear snapshot state in case the snapshot button was
4280 pressed while we weren't streaming */
4281 sd->snapshot_needs_reset = 1;
4282 sd_reset_snapshot(gspca_dev);
4283
4284 sd->first_frame = 3;
4285
4286 ov51x_restart(sd);
4287 ov51x_led_control(sd, 1);
4288 return gspca_dev->usb_err;
4289 }
4290
sd_stopN(struct gspca_dev * gspca_dev)4291 static void sd_stopN(struct gspca_dev *gspca_dev)
4292 {
4293 struct sd *sd = (struct sd *) gspca_dev;
4294
4295 ov51x_stop(sd);
4296 ov51x_led_control(sd, 0);
4297 }
4298
sd_stop0(struct gspca_dev * gspca_dev)4299 static void sd_stop0(struct gspca_dev *gspca_dev)
4300 {
4301 struct sd *sd = (struct sd *) gspca_dev;
4302
4303 if (!sd->gspca_dev.present)
4304 return;
4305 if (sd->bridge == BRIDGE_W9968CF)
4306 w9968cf_stop0(sd);
4307
4308 #if IS_ENABLED(CONFIG_INPUT)
4309 /* If the last button state is pressed, release it now! */
4310 if (sd->snapshot_pressed) {
4311 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
4312 input_sync(gspca_dev->input_dev);
4313 sd->snapshot_pressed = 0;
4314 }
4315 #endif
4316 if (sd->bridge == BRIDGE_OV519)
4317 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
4318 }
4319
ov51x_handle_button(struct gspca_dev * gspca_dev,u8 state)4320 static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
4321 {
4322 struct sd *sd = (struct sd *) gspca_dev;
4323
4324 if (sd->snapshot_pressed != state) {
4325 #if IS_ENABLED(CONFIG_INPUT)
4326 input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
4327 input_sync(gspca_dev->input_dev);
4328 #endif
4329 if (state)
4330 sd->snapshot_needs_reset = 1;
4331
4332 sd->snapshot_pressed = state;
4333 } else {
4334 /* On the ov511 / ov519 we need to reset the button state
4335 multiple times, as resetting does not work as long as the
4336 button stays pressed */
4337 switch (sd->bridge) {
4338 case BRIDGE_OV511:
4339 case BRIDGE_OV511PLUS:
4340 case BRIDGE_OV519:
4341 if (state)
4342 sd->snapshot_needs_reset = 1;
4343 break;
4344 }
4345 }
4346 }
4347
ov511_pkt_scan(struct gspca_dev * gspca_dev,u8 * in,int len)4348 static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
4349 u8 *in, /* isoc packet */
4350 int len) /* iso packet length */
4351 {
4352 struct sd *sd = (struct sd *) gspca_dev;
4353
4354 /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
4355 * byte non-zero. The EOF packet has image width/height in the
4356 * 10th and 11th bytes. The 9th byte is given as follows:
4357 *
4358 * bit 7: EOF
4359 * 6: compression enabled
4360 * 5: 422/420/400 modes
4361 * 4: 422/420/400 modes
4362 * 3: 1
4363 * 2: snapshot button on
4364 * 1: snapshot frame
4365 * 0: even/odd field
4366 */
4367 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
4368 (in[8] & 0x08)) {
4369 ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
4370 if (in[8] & 0x80) {
4371 /* Frame end */
4372 if ((in[9] + 1) * 8 != gspca_dev->pixfmt.width ||
4373 (in[10] + 1) * 8 != gspca_dev->pixfmt.height) {
4374 PERR("Invalid frame size, got: %dx%d,"
4375 " requested: %dx%d\n",
4376 (in[9] + 1) * 8, (in[10] + 1) * 8,
4377 gspca_dev->pixfmt.width,
4378 gspca_dev->pixfmt.height);
4379 gspca_dev->last_packet_type = DISCARD_PACKET;
4380 return;
4381 }
4382 /* Add 11 byte footer to frame, might be useful */
4383 gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
4384 return;
4385 } else {
4386 /* Frame start */
4387 gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
4388 sd->packet_nr = 0;
4389 }
4390 }
4391
4392 /* Ignore the packet number */
4393 len--;
4394
4395 /* intermediate packet */
4396 gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
4397 }
4398
ov518_pkt_scan(struct gspca_dev * gspca_dev,u8 * data,int len)4399 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
4400 u8 *data, /* isoc packet */
4401 int len) /* iso packet length */
4402 {
4403 struct sd *sd = (struct sd *) gspca_dev;
4404
4405 /* A false positive here is likely, until OVT gives me
4406 * the definitive SOF/EOF format */
4407 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4408 ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
4409 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4410 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4411 sd->packet_nr = 0;
4412 }
4413
4414 if (gspca_dev->last_packet_type == DISCARD_PACKET)
4415 return;
4416
4417 /* Does this device use packet numbers ? */
4418 if (len & 7) {
4419 len--;
4420 if (sd->packet_nr == data[len])
4421 sd->packet_nr++;
4422 /* The last few packets of the frame (which are all 0's
4423 except that they may contain part of the footer), are
4424 numbered 0 */
4425 else if (sd->packet_nr == 0 || data[len]) {
4426 PERR("Invalid packet nr: %d (expect: %d)",
4427 (int)data[len], (int)sd->packet_nr);
4428 gspca_dev->last_packet_type = DISCARD_PACKET;
4429 return;
4430 }
4431 }
4432
4433 /* intermediate packet */
4434 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4435 }
4436
ov519_pkt_scan(struct gspca_dev * gspca_dev,u8 * data,int len)4437 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4438 u8 *data, /* isoc packet */
4439 int len) /* iso packet length */
4440 {
4441 /* Header of ov519 is 16 bytes:
4442 * Byte Value Description
4443 * 0 0xff magic
4444 * 1 0xff magic
4445 * 2 0xff magic
4446 * 3 0xXX 0x50 = SOF, 0x51 = EOF
4447 * 9 0xXX 0x01 initial frame without data,
4448 * 0x00 standard frame with image
4449 * 14 Lo in EOF: length of image data / 8
4450 * 15 Hi
4451 */
4452
4453 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4454 switch (data[3]) {
4455 case 0x50: /* start of frame */
4456 /* Don't check the button state here, as the state
4457 usually (always ?) changes at EOF and checking it
4458 here leads to unnecessary snapshot state resets. */
4459 #define HDRSZ 16
4460 data += HDRSZ;
4461 len -= HDRSZ;
4462 #undef HDRSZ
4463 if (data[0] == 0xff || data[1] == 0xd8)
4464 gspca_frame_add(gspca_dev, FIRST_PACKET,
4465 data, len);
4466 else
4467 gspca_dev->last_packet_type = DISCARD_PACKET;
4468 return;
4469 case 0x51: /* end of frame */
4470 ov51x_handle_button(gspca_dev, data[11] & 1);
4471 if (data[9] != 0)
4472 gspca_dev->last_packet_type = DISCARD_PACKET;
4473 gspca_frame_add(gspca_dev, LAST_PACKET,
4474 NULL, 0);
4475 return;
4476 }
4477 }
4478
4479 /* intermediate packet */
4480 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4481 }
4482
ovfx2_pkt_scan(struct gspca_dev * gspca_dev,u8 * data,int len)4483 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4484 u8 *data, /* isoc packet */
4485 int len) /* iso packet length */
4486 {
4487 struct sd *sd = (struct sd *) gspca_dev;
4488
4489 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4490
4491 /* A short read signals EOF */
4492 if (len < gspca_dev->cam.bulk_size) {
4493 /* If the frame is short, and it is one of the first ones
4494 the sensor and bridge are still syncing, so drop it. */
4495 if (sd->first_frame) {
4496 sd->first_frame--;
4497 if (gspca_dev->image_len <
4498 sd->gspca_dev.pixfmt.width *
4499 sd->gspca_dev.pixfmt.height)
4500 gspca_dev->last_packet_type = DISCARD_PACKET;
4501 }
4502 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4503 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4504 }
4505 }
4506
sd_pkt_scan(struct gspca_dev * gspca_dev,u8 * data,int len)4507 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4508 u8 *data, /* isoc packet */
4509 int len) /* iso packet length */
4510 {
4511 struct sd *sd = (struct sd *) gspca_dev;
4512
4513 switch (sd->bridge) {
4514 case BRIDGE_OV511:
4515 case BRIDGE_OV511PLUS:
4516 ov511_pkt_scan(gspca_dev, data, len);
4517 break;
4518 case BRIDGE_OV518:
4519 case BRIDGE_OV518PLUS:
4520 ov518_pkt_scan(gspca_dev, data, len);
4521 break;
4522 case BRIDGE_OV519:
4523 ov519_pkt_scan(gspca_dev, data, len);
4524 break;
4525 case BRIDGE_OVFX2:
4526 ovfx2_pkt_scan(gspca_dev, data, len);
4527 break;
4528 case BRIDGE_W9968CF:
4529 w9968cf_pkt_scan(gspca_dev, data, len);
4530 break;
4531 }
4532 }
4533
4534 /* -- management routines -- */
4535
setbrightness(struct gspca_dev * gspca_dev,s32 val)4536 static void setbrightness(struct gspca_dev *gspca_dev, s32 val)
4537 {
4538 struct sd *sd = (struct sd *) gspca_dev;
4539 static const struct ov_i2c_regvals brit_7660[][7] = {
4540 {{0x0f, 0x6a}, {0x24, 0x40}, {0x25, 0x2b}, {0x26, 0x90},
4541 {0x27, 0xe0}, {0x28, 0xe0}, {0x2c, 0xe0}},
4542 {{0x0f, 0x6a}, {0x24, 0x50}, {0x25, 0x40}, {0x26, 0xa1},
4543 {0x27, 0xc0}, {0x28, 0xc0}, {0x2c, 0xc0}},
4544 {{0x0f, 0x6a}, {0x24, 0x68}, {0x25, 0x58}, {0x26, 0xc2},
4545 {0x27, 0xa0}, {0x28, 0xa0}, {0x2c, 0xa0}},
4546 {{0x0f, 0x6a}, {0x24, 0x70}, {0x25, 0x68}, {0x26, 0xd3},
4547 {0x27, 0x80}, {0x28, 0x80}, {0x2c, 0x80}},
4548 {{0x0f, 0x6a}, {0x24, 0x80}, {0x25, 0x70}, {0x26, 0xd3},
4549 {0x27, 0x20}, {0x28, 0x20}, {0x2c, 0x20}},
4550 {{0x0f, 0x6a}, {0x24, 0x88}, {0x25, 0x78}, {0x26, 0xd3},
4551 {0x27, 0x40}, {0x28, 0x40}, {0x2c, 0x40}},
4552 {{0x0f, 0x6a}, {0x24, 0x90}, {0x25, 0x80}, {0x26, 0xd4},
4553 {0x27, 0x60}, {0x28, 0x60}, {0x2c, 0x60}}
4554 };
4555
4556 switch (sd->sensor) {
4557 case SEN_OV8610:
4558 case SEN_OV7610:
4559 case SEN_OV76BE:
4560 case SEN_OV6620:
4561 case SEN_OV6630:
4562 case SEN_OV66308AF:
4563 case SEN_OV7640:
4564 case SEN_OV7648:
4565 i2c_w(sd, OV7610_REG_BRT, val);
4566 break;
4567 case SEN_OV7620:
4568 case SEN_OV7620AE:
4569 i2c_w(sd, OV7610_REG_BRT, val);
4570 break;
4571 case SEN_OV7660:
4572 write_i2c_regvals(sd, brit_7660[val],
4573 ARRAY_SIZE(brit_7660[0]));
4574 break;
4575 case SEN_OV7670:
4576 /*win trace
4577 * i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */
4578 i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val));
4579 break;
4580 }
4581 }
4582
setcontrast(struct gspca_dev * gspca_dev,s32 val)4583 static void setcontrast(struct gspca_dev *gspca_dev, s32 val)
4584 {
4585 struct sd *sd = (struct sd *) gspca_dev;
4586 static const struct ov_i2c_regvals contrast_7660[][31] = {
4587 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0xa0},
4588 {0x70, 0x58}, {0x71, 0x38}, {0x72, 0x30}, {0x73, 0x30},
4589 {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x24}, {0x77, 0x24},
4590 {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x34},
4591 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x65},
4592 {0x80, 0x70}, {0x81, 0x77}, {0x82, 0x7d}, {0x83, 0x83},
4593 {0x84, 0x88}, {0x85, 0x8d}, {0x86, 0x96}, {0x87, 0x9f},
4594 {0x88, 0xb0}, {0x89, 0xc4}, {0x8a, 0xd9}},
4595 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0x94},
4596 {0x70, 0x58}, {0x71, 0x40}, {0x72, 0x30}, {0x73, 0x30},
4597 {0x74, 0x30}, {0x75, 0x30}, {0x76, 0x2c}, {0x77, 0x24},
4598 {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x31},
4599 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x62},
4600 {0x80, 0x6d}, {0x81, 0x75}, {0x82, 0x7b}, {0x83, 0x81},
4601 {0x84, 0x87}, {0x85, 0x8d}, {0x86, 0x98}, {0x87, 0xa1},
4602 {0x88, 0xb2}, {0x89, 0xc6}, {0x8a, 0xdb}},
4603 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x84},
4604 {0x70, 0x58}, {0x71, 0x48}, {0x72, 0x40}, {0x73, 0x40},
4605 {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x28}, {0x77, 0x24},
4606 {0x78, 0x26}, {0x79, 0x28}, {0x7a, 0x28}, {0x7b, 0x34},
4607 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x5d},
4608 {0x80, 0x68}, {0x81, 0x71}, {0x82, 0x79}, {0x83, 0x81},
4609 {0x84, 0x86}, {0x85, 0x8b}, {0x86, 0x95}, {0x87, 0x9e},
4610 {0x88, 0xb1}, {0x89, 0xc5}, {0x8a, 0xd9}},
4611 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x70},
4612 {0x70, 0x58}, {0x71, 0x58}, {0x72, 0x48}, {0x73, 0x48},
4613 {0x74, 0x38}, {0x75, 0x40}, {0x76, 0x34}, {0x77, 0x34},
4614 {0x78, 0x2e}, {0x79, 0x28}, {0x7a, 0x24}, {0x7b, 0x22},
4615 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x58},
4616 {0x80, 0x63}, {0x81, 0x6e}, {0x82, 0x77}, {0x83, 0x80},
4617 {0x84, 0x87}, {0x85, 0x8f}, {0x86, 0x9c}, {0x87, 0xa9},
4618 {0x88, 0xc0}, {0x89, 0xd4}, {0x8a, 0xe6}},
4619 {{0x6c, 0xa0}, {0x6d, 0xf0}, {0x6e, 0x90}, {0x6f, 0x80},
4620 {0x70, 0x70}, {0x71, 0x80}, {0x72, 0x60}, {0x73, 0x60},
4621 {0x74, 0x58}, {0x75, 0x60}, {0x76, 0x4c}, {0x77, 0x38},
4622 {0x78, 0x38}, {0x79, 0x2a}, {0x7a, 0x20}, {0x7b, 0x0e},
4623 {0x7c, 0x0a}, {0x7d, 0x14}, {0x7e, 0x26}, {0x7f, 0x46},
4624 {0x80, 0x54}, {0x81, 0x64}, {0x82, 0x70}, {0x83, 0x7c},
4625 {0x84, 0x87}, {0x85, 0x93}, {0x86, 0xa6}, {0x87, 0xb4},
4626 {0x88, 0xd0}, {0x89, 0xe5}, {0x8a, 0xf5}},
4627 {{0x6c, 0x60}, {0x6d, 0x80}, {0x6e, 0x60}, {0x6f, 0x80},
4628 {0x70, 0x80}, {0x71, 0x80}, {0x72, 0x88}, {0x73, 0x30},
4629 {0x74, 0x70}, {0x75, 0x68}, {0x76, 0x64}, {0x77, 0x50},
4630 {0x78, 0x3c}, {0x79, 0x22}, {0x7a, 0x10}, {0x7b, 0x08},
4631 {0x7c, 0x06}, {0x7d, 0x0e}, {0x7e, 0x1a}, {0x7f, 0x3a},
4632 {0x80, 0x4a}, {0x81, 0x5a}, {0x82, 0x6b}, {0x83, 0x7b},
4633 {0x84, 0x89}, {0x85, 0x96}, {0x86, 0xaf}, {0x87, 0xc3},
4634 {0x88, 0xe1}, {0x89, 0xf2}, {0x8a, 0xfa}},
4635 {{0x6c, 0x20}, {0x6d, 0x40}, {0x6e, 0x20}, {0x6f, 0x60},
4636 {0x70, 0x88}, {0x71, 0xc8}, {0x72, 0xc0}, {0x73, 0xb8},
4637 {0x74, 0xa8}, {0x75, 0xb8}, {0x76, 0x80}, {0x77, 0x5c},
4638 {0x78, 0x26}, {0x79, 0x10}, {0x7a, 0x08}, {0x7b, 0x04},
4639 {0x7c, 0x02}, {0x7d, 0x06}, {0x7e, 0x0a}, {0x7f, 0x22},
4640 {0x80, 0x33}, {0x81, 0x4c}, {0x82, 0x64}, {0x83, 0x7b},
4641 {0x84, 0x90}, {0x85, 0xa7}, {0x86, 0xc7}, {0x87, 0xde},
4642 {0x88, 0xf1}, {0x89, 0xf9}, {0x8a, 0xfd}},
4643 };
4644
4645 switch (sd->sensor) {
4646 case SEN_OV7610:
4647 case SEN_OV6620:
4648 i2c_w(sd, OV7610_REG_CNT, val);
4649 break;
4650 case SEN_OV6630:
4651 case SEN_OV66308AF:
4652 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4653 break;
4654 case SEN_OV8610: {
4655 static const u8 ctab[] = {
4656 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4657 };
4658
4659 /* Use Y gamma control instead. Bit 0 enables it. */
4660 i2c_w(sd, 0x64, ctab[val >> 5]);
4661 break;
4662 }
4663 case SEN_OV7620:
4664 case SEN_OV7620AE: {
4665 static const u8 ctab[] = {
4666 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4667 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4668 };
4669
4670 /* Use Y gamma control instead. Bit 0 enables it. */
4671 i2c_w(sd, 0x64, ctab[val >> 4]);
4672 break;
4673 }
4674 case SEN_OV7660:
4675 write_i2c_regvals(sd, contrast_7660[val],
4676 ARRAY_SIZE(contrast_7660[0]));
4677 break;
4678 case SEN_OV7670:
4679 /* check that this isn't just the same as ov7610 */
4680 i2c_w(sd, OV7670_R56_CONTRAS, val >> 1);
4681 break;
4682 }
4683 }
4684
setexposure(struct gspca_dev * gspca_dev,s32 val)4685 static void setexposure(struct gspca_dev *gspca_dev, s32 val)
4686 {
4687 struct sd *sd = (struct sd *) gspca_dev;
4688
4689 i2c_w(sd, 0x10, val);
4690 }
4691
setcolors(struct gspca_dev * gspca_dev,s32 val)4692 static void setcolors(struct gspca_dev *gspca_dev, s32 val)
4693 {
4694 struct sd *sd = (struct sd *) gspca_dev;
4695 static const struct ov_i2c_regvals colors_7660[][6] = {
4696 {{0x4f, 0x28}, {0x50, 0x2a}, {0x51, 0x02}, {0x52, 0x0a},
4697 {0x53, 0x19}, {0x54, 0x23}},
4698 {{0x4f, 0x47}, {0x50, 0x4a}, {0x51, 0x03}, {0x52, 0x11},
4699 {0x53, 0x2c}, {0x54, 0x3e}},
4700 {{0x4f, 0x66}, {0x50, 0x6b}, {0x51, 0x05}, {0x52, 0x19},
4701 {0x53, 0x40}, {0x54, 0x59}},
4702 {{0x4f, 0x84}, {0x50, 0x8b}, {0x51, 0x06}, {0x52, 0x20},
4703 {0x53, 0x53}, {0x54, 0x73}},
4704 {{0x4f, 0xa3}, {0x50, 0xab}, {0x51, 0x08}, {0x52, 0x28},
4705 {0x53, 0x66}, {0x54, 0x8e}},
4706 };
4707
4708 switch (sd->sensor) {
4709 case SEN_OV8610:
4710 case SEN_OV7610:
4711 case SEN_OV76BE:
4712 case SEN_OV6620:
4713 case SEN_OV6630:
4714 case SEN_OV66308AF:
4715 i2c_w(sd, OV7610_REG_SAT, val);
4716 break;
4717 case SEN_OV7620:
4718 case SEN_OV7620AE:
4719 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4720 /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4721 if (rc < 0)
4722 goto out; */
4723 i2c_w(sd, OV7610_REG_SAT, val);
4724 break;
4725 case SEN_OV7640:
4726 case SEN_OV7648:
4727 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4728 break;
4729 case SEN_OV7660:
4730 write_i2c_regvals(sd, colors_7660[val],
4731 ARRAY_SIZE(colors_7660[0]));
4732 break;
4733 case SEN_OV7670:
4734 /* supported later once I work out how to do it
4735 * transparently fail now! */
4736 /* set REG_COM13 values for UV sat auto mode */
4737 break;
4738 }
4739 }
4740
setautobright(struct gspca_dev * gspca_dev,s32 val)4741 static void setautobright(struct gspca_dev *gspca_dev, s32 val)
4742 {
4743 struct sd *sd = (struct sd *) gspca_dev;
4744
4745 i2c_w_mask(sd, 0x2d, val ? 0x10 : 0x00, 0x10);
4746 }
4747
setfreq_i(struct sd * sd,s32 val)4748 static void setfreq_i(struct sd *sd, s32 val)
4749 {
4750 if (sd->sensor == SEN_OV7660
4751 || sd->sensor == SEN_OV7670) {
4752 switch (val) {
4753 case 0: /* Banding filter disabled */
4754 i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT);
4755 break;
4756 case 1: /* 50 hz */
4757 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4758 OV7670_COM8_BFILT);
4759 i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18);
4760 break;
4761 case 2: /* 60 hz */
4762 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4763 OV7670_COM8_BFILT);
4764 i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18);
4765 break;
4766 case 3: /* Auto hz - ov7670 only */
4767 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4768 OV7670_COM8_BFILT);
4769 i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO,
4770 0x18);
4771 break;
4772 }
4773 } else {
4774 switch (val) {
4775 case 0: /* Banding filter disabled */
4776 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4777 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4778 break;
4779 case 1: /* 50 hz (filter on and framerate adj) */
4780 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4781 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4782 /* 20 fps -> 16.667 fps */
4783 if (sd->sensor == SEN_OV6620 ||
4784 sd->sensor == SEN_OV6630 ||
4785 sd->sensor == SEN_OV66308AF)
4786 i2c_w(sd, 0x2b, 0x5e);
4787 else
4788 i2c_w(sd, 0x2b, 0xac);
4789 break;
4790 case 2: /* 60 hz (filter on, ...) */
4791 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4792 if (sd->sensor == SEN_OV6620 ||
4793 sd->sensor == SEN_OV6630 ||
4794 sd->sensor == SEN_OV66308AF) {
4795 /* 20 fps -> 15 fps */
4796 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4797 i2c_w(sd, 0x2b, 0xa8);
4798 } else {
4799 /* no framerate adj. */
4800 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4801 }
4802 break;
4803 }
4804 }
4805 }
4806
setfreq(struct gspca_dev * gspca_dev,s32 val)4807 static void setfreq(struct gspca_dev *gspca_dev, s32 val)
4808 {
4809 struct sd *sd = (struct sd *) gspca_dev;
4810
4811 setfreq_i(sd, val);
4812
4813 /* Ugly but necessary */
4814 if (sd->bridge == BRIDGE_W9968CF)
4815 w9968cf_set_crop_window(sd);
4816 }
4817
sd_get_jcomp(struct gspca_dev * gspca_dev,struct v4l2_jpegcompression * jcomp)4818 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4819 struct v4l2_jpegcompression *jcomp)
4820 {
4821 struct sd *sd = (struct sd *) gspca_dev;
4822
4823 if (sd->bridge != BRIDGE_W9968CF)
4824 return -ENOTTY;
4825
4826 memset(jcomp, 0, sizeof *jcomp);
4827 jcomp->quality = v4l2_ctrl_g_ctrl(sd->jpegqual);
4828 jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
4829 V4L2_JPEG_MARKER_DRI;
4830 return 0;
4831 }
4832
sd_set_jcomp(struct gspca_dev * gspca_dev,const struct v4l2_jpegcompression * jcomp)4833 static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4834 const struct v4l2_jpegcompression *jcomp)
4835 {
4836 struct sd *sd = (struct sd *) gspca_dev;
4837
4838 if (sd->bridge != BRIDGE_W9968CF)
4839 return -ENOTTY;
4840
4841 v4l2_ctrl_s_ctrl(sd->jpegqual, jcomp->quality);
4842 return 0;
4843 }
4844
sd_g_volatile_ctrl(struct v4l2_ctrl * ctrl)4845 static int sd_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
4846 {
4847 struct gspca_dev *gspca_dev =
4848 container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
4849 struct sd *sd = (struct sd *)gspca_dev;
4850
4851 gspca_dev->usb_err = 0;
4852
4853 switch (ctrl->id) {
4854 case V4L2_CID_AUTOGAIN:
4855 gspca_dev->exposure->val = i2c_r(sd, 0x10);
4856 break;
4857 }
4858 return 0;
4859 }
4860
sd_s_ctrl(struct v4l2_ctrl * ctrl)4861 static int sd_s_ctrl(struct v4l2_ctrl *ctrl)
4862 {
4863 struct gspca_dev *gspca_dev =
4864 container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
4865 struct sd *sd = (struct sd *)gspca_dev;
4866
4867 gspca_dev->usb_err = 0;
4868
4869 if (!gspca_dev->streaming)
4870 return 0;
4871
4872 switch (ctrl->id) {
4873 case V4L2_CID_BRIGHTNESS:
4874 setbrightness(gspca_dev, ctrl->val);
4875 break;
4876 case V4L2_CID_CONTRAST:
4877 setcontrast(gspca_dev, ctrl->val);
4878 break;
4879 case V4L2_CID_POWER_LINE_FREQUENCY:
4880 setfreq(gspca_dev, ctrl->val);
4881 break;
4882 case V4L2_CID_AUTOBRIGHTNESS:
4883 if (ctrl->is_new)
4884 setautobright(gspca_dev, ctrl->val);
4885 if (!ctrl->val && sd->brightness->is_new)
4886 setbrightness(gspca_dev, sd->brightness->val);
4887 break;
4888 case V4L2_CID_SATURATION:
4889 setcolors(gspca_dev, ctrl->val);
4890 break;
4891 case V4L2_CID_HFLIP:
4892 sethvflip(gspca_dev, ctrl->val, sd->vflip->val);
4893 break;
4894 case V4L2_CID_AUTOGAIN:
4895 if (ctrl->is_new)
4896 setautogain(gspca_dev, ctrl->val);
4897 if (!ctrl->val && gspca_dev->exposure->is_new)
4898 setexposure(gspca_dev, gspca_dev->exposure->val);
4899 break;
4900 case V4L2_CID_JPEG_COMPRESSION_QUALITY:
4901 return -EBUSY; /* Should never happen, as we grab the ctrl */
4902 }
4903 return gspca_dev->usb_err;
4904 }
4905
4906 static const struct v4l2_ctrl_ops sd_ctrl_ops = {
4907 .g_volatile_ctrl = sd_g_volatile_ctrl,
4908 .s_ctrl = sd_s_ctrl,
4909 };
4910
sd_init_controls(struct gspca_dev * gspca_dev)4911 static int sd_init_controls(struct gspca_dev *gspca_dev)
4912 {
4913 struct sd *sd = (struct sd *)gspca_dev;
4914 struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler;
4915
4916 gspca_dev->vdev.ctrl_handler = hdl;
4917 v4l2_ctrl_handler_init(hdl, 10);
4918 if (valid_controls[sd->sensor].has_brightness)
4919 sd->brightness = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4920 V4L2_CID_BRIGHTNESS, 0,
4921 sd->sensor == SEN_OV7660 ? 6 : 255, 1,
4922 sd->sensor == SEN_OV7660 ? 3 : 127);
4923 if (valid_controls[sd->sensor].has_contrast) {
4924 if (sd->sensor == SEN_OV7660)
4925 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4926 V4L2_CID_CONTRAST, 0, 6, 1, 3);
4927 else
4928 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4929 V4L2_CID_CONTRAST, 0, 255, 1,
4930 (sd->sensor == SEN_OV6630 ||
4931 sd->sensor == SEN_OV66308AF) ? 200 : 127);
4932 }
4933 if (valid_controls[sd->sensor].has_sat)
4934 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4935 V4L2_CID_SATURATION, 0,
4936 sd->sensor == SEN_OV7660 ? 4 : 255, 1,
4937 sd->sensor == SEN_OV7660 ? 2 : 127);
4938 if (valid_controls[sd->sensor].has_exposure)
4939 gspca_dev->exposure = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4940 V4L2_CID_EXPOSURE, 0, 255, 1, 127);
4941 if (valid_controls[sd->sensor].has_hvflip) {
4942 sd->hflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4943 V4L2_CID_HFLIP, 0, 1, 1, 0);
4944 sd->vflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4945 V4L2_CID_VFLIP, 0, 1, 1, 0);
4946 }
4947 if (valid_controls[sd->sensor].has_autobright)
4948 sd->autobright = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4949 V4L2_CID_AUTOBRIGHTNESS, 0, 1, 1, 1);
4950 if (valid_controls[sd->sensor].has_autogain)
4951 gspca_dev->autogain = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4952 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
4953 if (valid_controls[sd->sensor].has_freq) {
4954 if (sd->sensor == SEN_OV7670)
4955 sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops,
4956 V4L2_CID_POWER_LINE_FREQUENCY,
4957 V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
4958 V4L2_CID_POWER_LINE_FREQUENCY_AUTO);
4959 else
4960 sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops,
4961 V4L2_CID_POWER_LINE_FREQUENCY,
4962 V4L2_CID_POWER_LINE_FREQUENCY_60HZ, 0, 0);
4963 }
4964 if (sd->bridge == BRIDGE_W9968CF)
4965 sd->jpegqual = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4966 V4L2_CID_JPEG_COMPRESSION_QUALITY,
4967 QUALITY_MIN, QUALITY_MAX, 1, QUALITY_DEF);
4968
4969 if (hdl->error) {
4970 PERR("Could not initialize controls\n");
4971 return hdl->error;
4972 }
4973 if (gspca_dev->autogain)
4974 v4l2_ctrl_auto_cluster(3, &gspca_dev->autogain, 0, true);
4975 if (sd->autobright)
4976 v4l2_ctrl_auto_cluster(2, &sd->autobright, 0, false);
4977 if (sd->hflip)
4978 v4l2_ctrl_cluster(2, &sd->hflip);
4979 return 0;
4980 }
4981
4982 /* sub-driver description */
4983 static const struct sd_desc sd_desc = {
4984 .name = MODULE_NAME,
4985 .config = sd_config,
4986 .init = sd_init,
4987 .init_controls = sd_init_controls,
4988 .isoc_init = sd_isoc_init,
4989 .start = sd_start,
4990 .stopN = sd_stopN,
4991 .stop0 = sd_stop0,
4992 .pkt_scan = sd_pkt_scan,
4993 .dq_callback = sd_reset_snapshot,
4994 .get_jcomp = sd_get_jcomp,
4995 .set_jcomp = sd_set_jcomp,
4996 #if IS_ENABLED(CONFIG_INPUT)
4997 .other_input = 1,
4998 #endif
4999 };
5000
5001 /* -- module initialisation -- */
5002 static const struct usb_device_id device_table[] = {
5003 {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
5004 {USB_DEVICE(0x041e, 0x4052),
5005 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5006 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
5007 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
5008 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
5009 {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 },
5010 {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
5011 {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 },
5012 {USB_DEVICE(0x045e, 0x028c),
5013 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5014 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
5015 {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
5016 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
5017 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
5018 {USB_DEVICE(0x05a9, 0x0519),
5019 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5020 {USB_DEVICE(0x05a9, 0x0530),
5021 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5022 {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
5023 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
5024 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
5025 {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
5026 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
5027 {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
5028 {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
5029 {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
5030 {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
5031 {USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 },
5032 {}
5033 };
5034
5035 MODULE_DEVICE_TABLE(usb, device_table);
5036
5037 /* -- device connect -- */
sd_probe(struct usb_interface * intf,const struct usb_device_id * id)5038 static int sd_probe(struct usb_interface *intf,
5039 const struct usb_device_id *id)
5040 {
5041 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
5042 THIS_MODULE);
5043 }
5044
5045 static struct usb_driver sd_driver = {
5046 .name = MODULE_NAME,
5047 .id_table = device_table,
5048 .probe = sd_probe,
5049 .disconnect = gspca_disconnect,
5050 #ifdef CONFIG_PM
5051 .suspend = gspca_suspend,
5052 .resume = gspca_resume,
5053 .reset_resume = gspca_resume,
5054 #endif
5055 };
5056
5057 module_usb_driver(sd_driver);
5058
5059 module_param(frame_rate, int, 0644);
5060 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");
5061