1 /**
2 *
3 * GSPCA sub driver for W996[78]CF JPEG USB Dual Mode Camera Chip.
4 *
5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
6 *
7 * This module is adapted from the in kernel v4l1 w9968cf driver:
8 *
9 * Copyright (C) 2002-2004 by Luca Risolia <luca.risolia@studio.unibo.it>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 */
26
27 /* Note this is not a stand alone driver, it gets included in ov519.c, this
28 is a bit of a hack, but it needs the driver code for a lot of different
29 ov sensors which is already present in ov519.c (the old v4l1 driver used
30 the ovchipcam framework). When we have the time we really should move
31 the sensor drivers to v4l2 sub drivers, and properly split of this
32 driver from ov519.c */
33
34 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
35
36 #define W9968CF_I2C_BUS_DELAY 4 /* delay in us for I2C bit r/w operations */
37
38 #define Y_QUANTABLE (&sd->jpeg_hdr[JPEG_QT0_OFFSET])
39 #define UV_QUANTABLE (&sd->jpeg_hdr[JPEG_QT1_OFFSET])
40
41 static const struct v4l2_pix_format w9968cf_vga_mode[] = {
42 {160, 120, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE,
43 .bytesperline = 160 * 2,
44 .sizeimage = 160 * 120 * 2,
45 .colorspace = V4L2_COLORSPACE_JPEG},
46 {176, 144, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE,
47 .bytesperline = 176 * 2,
48 .sizeimage = 176 * 144 * 2,
49 .colorspace = V4L2_COLORSPACE_JPEG},
50 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
51 .bytesperline = 320 * 2,
52 .sizeimage = 320 * 240 * 2,
53 .colorspace = V4L2_COLORSPACE_JPEG},
54 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
55 .bytesperline = 352 * 2,
56 .sizeimage = 352 * 288 * 2,
57 .colorspace = V4L2_COLORSPACE_JPEG},
58 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
59 .bytesperline = 640 * 2,
60 .sizeimage = 640 * 480 * 2,
61 .colorspace = V4L2_COLORSPACE_JPEG},
62 };
63
64 static void reg_w(struct sd *sd, u16 index, u16 value);
65
66 /*--------------------------------------------------------------------------
67 Write 64-bit data to the fast serial bus registers.
68 Return 0 on success, -1 otherwise.
69 --------------------------------------------------------------------------*/
w9968cf_write_fsb(struct sd * sd,u16 * data)70 static void w9968cf_write_fsb(struct sd *sd, u16* data)
71 {
72 struct usb_device *udev = sd->gspca_dev.dev;
73 u16 value;
74 int ret;
75
76 if (sd->gspca_dev.usb_err < 0)
77 return;
78
79 value = *data++;
80 memcpy(sd->gspca_dev.usb_buf, data, 6);
81
82 ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0,
83 USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE,
84 value, 0x06, sd->gspca_dev.usb_buf, 6, 500);
85 if (ret < 0) {
86 pr_err("Write FSB registers failed (%d)\n", ret);
87 sd->gspca_dev.usb_err = ret;
88 }
89 }
90
91 /*--------------------------------------------------------------------------
92 Write data to the serial bus control register.
93 Return 0 on success, a negative number otherwise.
94 --------------------------------------------------------------------------*/
w9968cf_write_sb(struct sd * sd,u16 value)95 static void w9968cf_write_sb(struct sd *sd, u16 value)
96 {
97 int ret;
98
99 if (sd->gspca_dev.usb_err < 0)
100 return;
101
102 /* We don't use reg_w here, as that would cause all writes when
103 bitbanging i2c to be logged, making the logs impossible to read */
104 ret = usb_control_msg(sd->gspca_dev.dev,
105 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
106 0,
107 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
108 value, 0x01, NULL, 0, 500);
109
110 udelay(W9968CF_I2C_BUS_DELAY);
111
112 if (ret < 0) {
113 pr_err("Write SB reg [01] %04x failed\n", value);
114 sd->gspca_dev.usb_err = ret;
115 }
116 }
117
118 /*--------------------------------------------------------------------------
119 Read data from the serial bus control register.
120 Return 0 on success, a negative number otherwise.
121 --------------------------------------------------------------------------*/
w9968cf_read_sb(struct sd * sd)122 static int w9968cf_read_sb(struct sd *sd)
123 {
124 int ret;
125
126 if (sd->gspca_dev.usb_err < 0)
127 return -1;
128
129 /* We don't use reg_r here, as the w9968cf is special and has 16
130 bit registers instead of 8 bit */
131 ret = usb_control_msg(sd->gspca_dev.dev,
132 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
133 1,
134 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
135 0, 0x01, sd->gspca_dev.usb_buf, 2, 500);
136 if (ret >= 0) {
137 ret = sd->gspca_dev.usb_buf[0] |
138 (sd->gspca_dev.usb_buf[1] << 8);
139 } else {
140 pr_err("Read SB reg [01] failed\n");
141 sd->gspca_dev.usb_err = ret;
142 /*
143 * Make sure the buffer is zeroed to avoid uninitialized
144 * values.
145 */
146 memset(sd->gspca_dev.usb_buf, 0, 2);
147 }
148
149 udelay(W9968CF_I2C_BUS_DELAY);
150
151 return ret;
152 }
153
154 /*--------------------------------------------------------------------------
155 Upload quantization tables for the JPEG compression.
156 This function is called by w9968cf_start_transfer().
157 Return 0 on success, a negative number otherwise.
158 --------------------------------------------------------------------------*/
w9968cf_upload_quantizationtables(struct sd * sd)159 static void w9968cf_upload_quantizationtables(struct sd *sd)
160 {
161 u16 a, b;
162 int i, j;
163
164 reg_w(sd, 0x39, 0x0010); /* JPEG clock enable */
165
166 for (i = 0, j = 0; i < 32; i++, j += 2) {
167 a = Y_QUANTABLE[j] | ((unsigned)(Y_QUANTABLE[j + 1]) << 8);
168 b = UV_QUANTABLE[j] | ((unsigned)(UV_QUANTABLE[j + 1]) << 8);
169 reg_w(sd, 0x40 + i, a);
170 reg_w(sd, 0x60 + i, b);
171 }
172 reg_w(sd, 0x39, 0x0012); /* JPEG encoder enable */
173 }
174
175 /****************************************************************************
176 * Low-level I2C I/O functions. *
177 * The adapter supports the following I2C transfer functions: *
178 * i2c_adap_fastwrite_byte_data() (at 400 kHz bit frequency only) *
179 * i2c_adap_read_byte_data() *
180 * i2c_adap_read_byte() *
181 ****************************************************************************/
182
w9968cf_smbus_start(struct sd * sd)183 static void w9968cf_smbus_start(struct sd *sd)
184 {
185 w9968cf_write_sb(sd, 0x0011); /* SDE=1, SDA=0, SCL=1 */
186 w9968cf_write_sb(sd, 0x0010); /* SDE=1, SDA=0, SCL=0 */
187 }
188
w9968cf_smbus_stop(struct sd * sd)189 static void w9968cf_smbus_stop(struct sd *sd)
190 {
191 w9968cf_write_sb(sd, 0x0010); /* SDE=1, SDA=0, SCL=0 */
192 w9968cf_write_sb(sd, 0x0011); /* SDE=1, SDA=0, SCL=1 */
193 w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
194 }
195
w9968cf_smbus_write_byte(struct sd * sd,u8 v)196 static void w9968cf_smbus_write_byte(struct sd *sd, u8 v)
197 {
198 u8 bit;
199 int sda;
200
201 for (bit = 0 ; bit < 8 ; bit++) {
202 sda = (v & 0x80) ? 2 : 0;
203 v <<= 1;
204 /* SDE=1, SDA=sda, SCL=0 */
205 w9968cf_write_sb(sd, 0x10 | sda);
206 /* SDE=1, SDA=sda, SCL=1 */
207 w9968cf_write_sb(sd, 0x11 | sda);
208 /* SDE=1, SDA=sda, SCL=0 */
209 w9968cf_write_sb(sd, 0x10 | sda);
210 }
211 }
212
w9968cf_smbus_read_byte(struct sd * sd,u8 * v)213 static void w9968cf_smbus_read_byte(struct sd *sd, u8 *v)
214 {
215 u8 bit;
216
217 /* No need to ensure SDA is high as we are always called after
218 read_ack which ends with SDA high */
219 *v = 0;
220 for (bit = 0 ; bit < 8 ; bit++) {
221 *v <<= 1;
222 /* SDE=1, SDA=1, SCL=1 */
223 w9968cf_write_sb(sd, 0x0013);
224 *v |= (w9968cf_read_sb(sd) & 0x0008) ? 1 : 0;
225 /* SDE=1, SDA=1, SCL=0 */
226 w9968cf_write_sb(sd, 0x0012);
227 }
228 }
229
w9968cf_smbus_write_nack(struct sd * sd)230 static void w9968cf_smbus_write_nack(struct sd *sd)
231 {
232 /* No need to ensure SDA is high as we are always called after
233 read_byte which ends with SDA high */
234 w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
235 w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
236 }
237
w9968cf_smbus_read_ack(struct sd * sd)238 static void w9968cf_smbus_read_ack(struct sd *sd)
239 {
240 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
241 int sda;
242
243 /* Ensure SDA is high before raising clock to avoid a spurious stop */
244 w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
245 w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
246 sda = w9968cf_read_sb(sd);
247 w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
248 if (sda >= 0 && (sda & 0x08)) {
249 PDEBUG(D_USBI, "Did not receive i2c ACK");
250 sd->gspca_dev.usb_err = -EIO;
251 }
252 }
253
254 /* SMBus protocol: S Addr Wr [A] Subaddr [A] Value [A] P */
w9968cf_i2c_w(struct sd * sd,u8 reg,u8 value)255 static void w9968cf_i2c_w(struct sd *sd, u8 reg, u8 value)
256 {
257 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
258 u16* data = (u16 *)sd->gspca_dev.usb_buf;
259
260 data[0] = 0x082f | ((sd->sensor_addr & 0x80) ? 0x1500 : 0x0);
261 data[0] |= (sd->sensor_addr & 0x40) ? 0x4000 : 0x0;
262 data[1] = 0x2082 | ((sd->sensor_addr & 0x40) ? 0x0005 : 0x0);
263 data[1] |= (sd->sensor_addr & 0x20) ? 0x0150 : 0x0;
264 data[1] |= (sd->sensor_addr & 0x10) ? 0x5400 : 0x0;
265 data[2] = 0x8208 | ((sd->sensor_addr & 0x08) ? 0x0015 : 0x0);
266 data[2] |= (sd->sensor_addr & 0x04) ? 0x0540 : 0x0;
267 data[2] |= (sd->sensor_addr & 0x02) ? 0x5000 : 0x0;
268 data[3] = 0x1d20 | ((sd->sensor_addr & 0x02) ? 0x0001 : 0x0);
269 data[3] |= (sd->sensor_addr & 0x01) ? 0x0054 : 0x0;
270
271 w9968cf_write_fsb(sd, data);
272
273 data[0] = 0x8208 | ((reg & 0x80) ? 0x0015 : 0x0);
274 data[0] |= (reg & 0x40) ? 0x0540 : 0x0;
275 data[0] |= (reg & 0x20) ? 0x5000 : 0x0;
276 data[1] = 0x0820 | ((reg & 0x20) ? 0x0001 : 0x0);
277 data[1] |= (reg & 0x10) ? 0x0054 : 0x0;
278 data[1] |= (reg & 0x08) ? 0x1500 : 0x0;
279 data[1] |= (reg & 0x04) ? 0x4000 : 0x0;
280 data[2] = 0x2082 | ((reg & 0x04) ? 0x0005 : 0x0);
281 data[2] |= (reg & 0x02) ? 0x0150 : 0x0;
282 data[2] |= (reg & 0x01) ? 0x5400 : 0x0;
283 data[3] = 0x001d;
284
285 w9968cf_write_fsb(sd, data);
286
287 data[0] = 0x8208 | ((value & 0x80) ? 0x0015 : 0x0);
288 data[0] |= (value & 0x40) ? 0x0540 : 0x0;
289 data[0] |= (value & 0x20) ? 0x5000 : 0x0;
290 data[1] = 0x0820 | ((value & 0x20) ? 0x0001 : 0x0);
291 data[1] |= (value & 0x10) ? 0x0054 : 0x0;
292 data[1] |= (value & 0x08) ? 0x1500 : 0x0;
293 data[1] |= (value & 0x04) ? 0x4000 : 0x0;
294 data[2] = 0x2082 | ((value & 0x04) ? 0x0005 : 0x0);
295 data[2] |= (value & 0x02) ? 0x0150 : 0x0;
296 data[2] |= (value & 0x01) ? 0x5400 : 0x0;
297 data[3] = 0xfe1d;
298
299 w9968cf_write_fsb(sd, data);
300
301 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
302 }
303
304 /* SMBus protocol: S Addr Wr [A] Subaddr [A] P S Addr+1 Rd [A] [Value] NA P */
w9968cf_i2c_r(struct sd * sd,u8 reg)305 static int w9968cf_i2c_r(struct sd *sd, u8 reg)
306 {
307 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
308 int ret = 0;
309 u8 value;
310
311 /* Fast serial bus data control disable */
312 w9968cf_write_sb(sd, 0x0013); /* don't change ! */
313
314 w9968cf_smbus_start(sd);
315 w9968cf_smbus_write_byte(sd, sd->sensor_addr);
316 w9968cf_smbus_read_ack(sd);
317 w9968cf_smbus_write_byte(sd, reg);
318 w9968cf_smbus_read_ack(sd);
319 w9968cf_smbus_stop(sd);
320 w9968cf_smbus_start(sd);
321 w9968cf_smbus_write_byte(sd, sd->sensor_addr + 1);
322 w9968cf_smbus_read_ack(sd);
323 w9968cf_smbus_read_byte(sd, &value);
324 /* signal we don't want to read anymore, the v4l1 driver used to
325 send an ack here which is very wrong! (and then fixed
326 the issues this gave by retrying reads) */
327 w9968cf_smbus_write_nack(sd);
328 w9968cf_smbus_stop(sd);
329
330 /* Fast serial bus data control re-enable */
331 w9968cf_write_sb(sd, 0x0030);
332
333 if (sd->gspca_dev.usb_err >= 0) {
334 ret = value;
335 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
336 } else
337 PERR("i2c read [0x%02x] failed", reg);
338
339 return ret;
340 }
341
342 /*--------------------------------------------------------------------------
343 Turn on the LED on some webcams. A beep should be heard too.
344 Return 0 on success, a negative number otherwise.
345 --------------------------------------------------------------------------*/
w9968cf_configure(struct sd * sd)346 static void w9968cf_configure(struct sd *sd)
347 {
348 reg_w(sd, 0x00, 0xff00); /* power-down */
349 reg_w(sd, 0x00, 0xbf17); /* reset everything */
350 reg_w(sd, 0x00, 0xbf10); /* normal operation */
351 reg_w(sd, 0x01, 0x0010); /* serial bus, SDS high */
352 reg_w(sd, 0x01, 0x0000); /* serial bus, SDS low */
353 reg_w(sd, 0x01, 0x0010); /* ..high 'beep-beep' */
354 reg_w(sd, 0x01, 0x0030); /* Set sda scl to FSB mode */
355
356 sd->stopped = 1;
357 }
358
w9968cf_init(struct sd * sd)359 static void w9968cf_init(struct sd *sd)
360 {
361 unsigned long hw_bufsize = sd->sif ? (352 * 288 * 2) : (640 * 480 * 2),
362 y0 = 0x0000,
363 u0 = y0 + hw_bufsize / 2,
364 v0 = u0 + hw_bufsize / 4,
365 y1 = v0 + hw_bufsize / 4,
366 u1 = y1 + hw_bufsize / 2,
367 v1 = u1 + hw_bufsize / 4;
368
369 reg_w(sd, 0x00, 0xff00); /* power off */
370 reg_w(sd, 0x00, 0xbf10); /* power on */
371
372 reg_w(sd, 0x03, 0x405d); /* DRAM timings */
373 reg_w(sd, 0x04, 0x0030); /* SDRAM timings */
374
375 reg_w(sd, 0x20, y0 & 0xffff); /* Y buf.0, low */
376 reg_w(sd, 0x21, y0 >> 16); /* Y buf.0, high */
377 reg_w(sd, 0x24, u0 & 0xffff); /* U buf.0, low */
378 reg_w(sd, 0x25, u0 >> 16); /* U buf.0, high */
379 reg_w(sd, 0x28, v0 & 0xffff); /* V buf.0, low */
380 reg_w(sd, 0x29, v0 >> 16); /* V buf.0, high */
381
382 reg_w(sd, 0x22, y1 & 0xffff); /* Y buf.1, low */
383 reg_w(sd, 0x23, y1 >> 16); /* Y buf.1, high */
384 reg_w(sd, 0x26, u1 & 0xffff); /* U buf.1, low */
385 reg_w(sd, 0x27, u1 >> 16); /* U buf.1, high */
386 reg_w(sd, 0x2a, v1 & 0xffff); /* V buf.1, low */
387 reg_w(sd, 0x2b, v1 >> 16); /* V buf.1, high */
388
389 reg_w(sd, 0x32, y1 & 0xffff); /* JPEG buf 0 low */
390 reg_w(sd, 0x33, y1 >> 16); /* JPEG buf 0 high */
391
392 reg_w(sd, 0x34, y1 & 0xffff); /* JPEG buf 1 low */
393 reg_w(sd, 0x35, y1 >> 16); /* JPEG bug 1 high */
394
395 reg_w(sd, 0x36, 0x0000);/* JPEG restart interval */
396 reg_w(sd, 0x37, 0x0804);/*JPEG VLE FIFO threshold*/
397 reg_w(sd, 0x38, 0x0000);/* disable hw up-scaling */
398 reg_w(sd, 0x3f, 0x0000); /* JPEG/MCTL test data */
399 }
400
w9968cf_set_crop_window(struct sd * sd)401 static void w9968cf_set_crop_window(struct sd *sd)
402 {
403 int start_cropx, start_cropy, x, y, fw, fh, cw, ch,
404 max_width, max_height;
405
406 if (sd->sif) {
407 max_width = 352;
408 max_height = 288;
409 } else {
410 max_width = 640;
411 max_height = 480;
412 }
413
414 if (sd->sensor == SEN_OV7620) {
415 /*
416 * Sigh, this is dependend on the clock / framerate changes
417 * made by the frequency control, sick.
418 *
419 * Note we cannot use v4l2_ctrl_g_ctrl here, as we get called
420 * from ov519.c:setfreq() with the ctrl lock held!
421 */
422 if (sd->freq->val == 1) {
423 start_cropx = 277;
424 start_cropy = 37;
425 } else {
426 start_cropx = 105;
427 start_cropy = 37;
428 }
429 } else {
430 start_cropx = 320;
431 start_cropy = 35;
432 }
433
434 /* Work around to avoid FP arithmetics */
435 #define SC(x) ((x) << 10)
436
437 /* Scaling factors */
438 fw = SC(sd->gspca_dev.pixfmt.width) / max_width;
439 fh = SC(sd->gspca_dev.pixfmt.height) / max_height;
440
441 cw = (fw >= fh) ? max_width : SC(sd->gspca_dev.pixfmt.width) / fh;
442 ch = (fw >= fh) ? SC(sd->gspca_dev.pixfmt.height) / fw : max_height;
443
444 sd->sensor_width = max_width;
445 sd->sensor_height = max_height;
446
447 x = (max_width - cw) / 2;
448 y = (max_height - ch) / 2;
449
450 reg_w(sd, 0x10, start_cropx + x);
451 reg_w(sd, 0x11, start_cropy + y);
452 reg_w(sd, 0x12, start_cropx + x + cw);
453 reg_w(sd, 0x13, start_cropy + y + ch);
454 }
455
w9968cf_mode_init_regs(struct sd * sd)456 static void w9968cf_mode_init_regs(struct sd *sd)
457 {
458 int val, vs_polarity, hs_polarity;
459
460 w9968cf_set_crop_window(sd);
461
462 reg_w(sd, 0x14, sd->gspca_dev.pixfmt.width);
463 reg_w(sd, 0x15, sd->gspca_dev.pixfmt.height);
464
465 /* JPEG width & height */
466 reg_w(sd, 0x30, sd->gspca_dev.pixfmt.width);
467 reg_w(sd, 0x31, sd->gspca_dev.pixfmt.height);
468
469 /* Y & UV frame buffer strides (in WORD) */
470 if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat ==
471 V4L2_PIX_FMT_JPEG) {
472 reg_w(sd, 0x2c, sd->gspca_dev.pixfmt.width / 2);
473 reg_w(sd, 0x2d, sd->gspca_dev.pixfmt.width / 4);
474 } else
475 reg_w(sd, 0x2c, sd->gspca_dev.pixfmt.width);
476
477 reg_w(sd, 0x00, 0xbf17); /* reset everything */
478 reg_w(sd, 0x00, 0xbf10); /* normal operation */
479
480 /* Transfer size in WORDS (for UYVY format only) */
481 val = sd->gspca_dev.pixfmt.width * sd->gspca_dev.pixfmt.height;
482 reg_w(sd, 0x3d, val & 0xffff); /* low bits */
483 reg_w(sd, 0x3e, val >> 16); /* high bits */
484
485 if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat ==
486 V4L2_PIX_FMT_JPEG) {
487 /* We may get called multiple times (usb isoc bw negotiat.) */
488 jpeg_define(sd->jpeg_hdr, sd->gspca_dev.pixfmt.height,
489 sd->gspca_dev.pixfmt.width, 0x22); /* JPEG 420 */
490 jpeg_set_qual(sd->jpeg_hdr, v4l2_ctrl_g_ctrl(sd->jpegqual));
491 w9968cf_upload_quantizationtables(sd);
492 v4l2_ctrl_grab(sd->jpegqual, true);
493 }
494
495 /* Video Capture Control Register */
496 if (sd->sensor == SEN_OV7620) {
497 /* Seems to work around a bug in the image sensor */
498 vs_polarity = 1;
499 hs_polarity = 1;
500 } else {
501 vs_polarity = 1;
502 hs_polarity = 0;
503 }
504
505 val = (vs_polarity << 12) | (hs_polarity << 11);
506
507 /* NOTE: We may not have enough memory to do double buffering while
508 doing compression (amount of memory differs per model cam).
509 So we use the second image buffer also as jpeg stream buffer
510 (see w9968cf_init), and disable double buffering. */
511 if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat ==
512 V4L2_PIX_FMT_JPEG) {
513 /* val |= 0x0002; YUV422P */
514 val |= 0x0003; /* YUV420P */
515 } else
516 val |= 0x0080; /* Enable HW double buffering */
517
518 /* val |= 0x0020; enable clamping */
519 /* val |= 0x0008; enable (1-2-1) filter */
520 /* val |= 0x000c; enable (2-3-6-3-2) filter */
521
522 val |= 0x8000; /* capt. enable */
523
524 reg_w(sd, 0x16, val);
525
526 sd->gspca_dev.empty_packet = 0;
527 }
528
w9968cf_stop0(struct sd * sd)529 static void w9968cf_stop0(struct sd *sd)
530 {
531 v4l2_ctrl_grab(sd->jpegqual, false);
532 reg_w(sd, 0x39, 0x0000); /* disable JPEG encoder */
533 reg_w(sd, 0x16, 0x0000); /* stop video capture */
534 }
535
536 /* The w9968cf docs say that a 0 sized packet means EOF (and also SOF
537 for the next frame). This seems to simply not be true when operating
538 in JPEG mode, in this case there may be empty packets within the
539 frame. So in JPEG mode use the JPEG SOI marker to detect SOF.
540
541 Note to make things even more interesting the w9968cf sends *PLANAR* jpeg,
542 to be precise it sends: SOI, SOF, DRI, SOS, Y-data, SOS, U-data, SOS,
543 V-data, EOI. */
w9968cf_pkt_scan(struct gspca_dev * gspca_dev,u8 * data,int len)544 static void w9968cf_pkt_scan(struct gspca_dev *gspca_dev,
545 u8 *data, /* isoc packet */
546 int len) /* iso packet length */
547 {
548 struct sd *sd = (struct sd *) gspca_dev;
549
550 if (w9968cf_vga_mode[gspca_dev->curr_mode].pixelformat ==
551 V4L2_PIX_FMT_JPEG) {
552 if (len >= 2 &&
553 data[0] == 0xff &&
554 data[1] == 0xd8) {
555 gspca_frame_add(gspca_dev, LAST_PACKET,
556 NULL, 0);
557 gspca_frame_add(gspca_dev, FIRST_PACKET,
558 sd->jpeg_hdr, JPEG_HDR_SZ);
559 /* Strip the ff d8, our own header (which adds
560 huffman and quantization tables) already has this */
561 len -= 2;
562 data += 2;
563 }
564 } else {
565 /* In UYVY mode an empty packet signals EOF */
566 if (gspca_dev->empty_packet) {
567 gspca_frame_add(gspca_dev, LAST_PACKET,
568 NULL, 0);
569 gspca_frame_add(gspca_dev, FIRST_PACKET,
570 NULL, 0);
571 gspca_dev->empty_packet = 0;
572 }
573 }
574 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
575 }
576