1 /*
2 * Intel MIC Platform Software Stack (MPSS)
3 *
4 * Copyright(c) 2013 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License, version 2, as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * The full GNU General Public License is included in this distribution in
16 * the file called "COPYING".
17 *
18 * Intel MIC Host driver.
19 *
20 */
21 #ifndef _MIC_DEVICE_H_
22 #define _MIC_DEVICE_H_
23
24 #include <linux/cdev.h>
25 #include <linux/idr.h>
26 #include <linux/notifier.h>
27 #include <linux/irqreturn.h>
28 #include <linux/dmaengine.h>
29 #include <linux/miscdevice.h>
30 #include <linux/mic_bus.h>
31 #include "../bus/scif_bus.h"
32 #include "../bus/cosm_bus.h"
33 #include "mic_intr.h"
34
35 /**
36 * enum mic_stepping - MIC stepping ids.
37 */
38 enum mic_stepping {
39 MIC_A0_STEP = 0x0,
40 MIC_B0_STEP = 0x10,
41 MIC_B1_STEP = 0x11,
42 MIC_C0_STEP = 0x20,
43 };
44
45 extern struct cosm_hw_ops cosm_hw_ops;
46
47 /**
48 * struct mic_device - MIC device information for each card.
49 *
50 * @mmio: MMIO bar information.
51 * @aper: Aperture bar information.
52 * @family: The MIC family to which this device belongs.
53 * @ops: MIC HW specific operations.
54 * @id: The unique device id for this MIC device.
55 * @stepping: Stepping ID.
56 * @pdev: Underlying PCI device.
57 * @mic_mutex: Mutex for synchronizing access to mic_device.
58 * @intr_ops: HW specific interrupt operations.
59 * @smpt_ops: Hardware specific SMPT operations.
60 * @smpt: MIC SMPT information.
61 * @intr_info: H/W specific interrupt information.
62 * @irq_info: The OS specific irq information
63 * @dbg_dir: debugfs directory of this MIC device.
64 * @bootaddr: MIC boot address.
65 * @dp: virtio device page
66 * @dp_dma_addr: virtio device page DMA address.
67 * @name: name for the misc char device
68 * @miscdev: registered misc char device
69 * @vdev_list: list of virtio devices.
70 * @dma_mbdev: MIC BUS DMA device.
71 * @dma_ch - Array of DMA channels
72 * @num_dma_ch - Number of DMA channels available
73 * @scdev: SCIF device on the SCIF virtual bus.
74 * @cosm_dev: COSM device
75 */
76 struct mic_device {
77 struct mic_mw mmio;
78 struct mic_mw aper;
79 enum mic_hw_family family;
80 struct mic_hw_ops *ops;
81 int id;
82 enum mic_stepping stepping;
83 struct pci_dev *pdev;
84 struct mutex mic_mutex;
85 struct mic_hw_intr_ops *intr_ops;
86 struct mic_smpt_ops *smpt_ops;
87 struct mic_smpt_info *smpt;
88 struct mic_intr_info *intr_info;
89 struct mic_irq_info irq_info;
90 struct dentry *dbg_dir;
91 u32 bootaddr;
92 void *dp;
93 dma_addr_t dp_dma_addr;
94 char name[16];
95 struct miscdevice miscdev;
96 struct list_head vdev_list;
97 struct mbus_device *dma_mbdev;
98 struct dma_chan *dma_ch[MIC_MAX_DMA_CHAN];
99 int num_dma_ch;
100 struct scif_hw_dev *scdev;
101 struct cosm_device *cosm_dev;
102 };
103
104 /**
105 * struct mic_hw_ops - MIC HW specific operations.
106 * @aper_bar: Aperture bar resource number.
107 * @mmio_bar: MMIO bar resource number.
108 * @read_spad: Read from scratch pad register.
109 * @write_spad: Write to scratch pad register.
110 * @send_intr: Send an interrupt for a particular doorbell on the card.
111 * @ack_interrupt: Hardware specific operations to ack the h/w on
112 * receipt of an interrupt.
113 * @intr_workarounds: Hardware specific workarounds needed after
114 * handling an interrupt.
115 * @reset: Reset the remote processor.
116 * @reset_fw_ready: Reset firmware ready field.
117 * @is_fw_ready: Check if firmware is ready for OS download.
118 * @send_firmware_intr: Send an interrupt to the card firmware.
119 * @load_mic_fw: Load firmware segments required to boot the card
120 * into card memory. This includes the kernel, command line, ramdisk etc.
121 * @get_postcode: Get post code status from firmware.
122 * @dma_filter: DMA filter function to be used.
123 */
124 struct mic_hw_ops {
125 u8 aper_bar;
126 u8 mmio_bar;
127 u32 (*read_spad)(struct mic_device *mdev, unsigned int idx);
128 void (*write_spad)(struct mic_device *mdev, unsigned int idx, u32 val);
129 void (*send_intr)(struct mic_device *mdev, int doorbell);
130 u32 (*ack_interrupt)(struct mic_device *mdev);
131 void (*intr_workarounds)(struct mic_device *mdev);
132 void (*reset)(struct mic_device *mdev);
133 void (*reset_fw_ready)(struct mic_device *mdev);
134 bool (*is_fw_ready)(struct mic_device *mdev);
135 void (*send_firmware_intr)(struct mic_device *mdev);
136 int (*load_mic_fw)(struct mic_device *mdev, const char *buf);
137 u32 (*get_postcode)(struct mic_device *mdev);
138 bool (*dma_filter)(struct dma_chan *chan, void *param);
139 };
140
141 /**
142 * mic_mmio_read - read from an MMIO register.
143 * @mw: MMIO register base virtual address.
144 * @offset: register offset.
145 *
146 * RETURNS: register value.
147 */
mic_mmio_read(struct mic_mw * mw,u32 offset)148 static inline u32 mic_mmio_read(struct mic_mw *mw, u32 offset)
149 {
150 return ioread32(mw->va + offset);
151 }
152
153 /**
154 * mic_mmio_write - write to an MMIO register.
155 * @mw: MMIO register base virtual address.
156 * @val: the data value to put into the register
157 * @offset: register offset.
158 *
159 * RETURNS: none.
160 */
161 static inline void
mic_mmio_write(struct mic_mw * mw,u32 val,u32 offset)162 mic_mmio_write(struct mic_mw *mw, u32 val, u32 offset)
163 {
164 iowrite32(val, mw->va + offset);
165 }
166
167 void mic_bootparam_init(struct mic_device *mdev);
168 void mic_create_debug_dir(struct mic_device *dev);
169 void mic_delete_debug_dir(struct mic_device *dev);
170 void __init mic_init_debugfs(void);
171 void mic_exit_debugfs(void);
172 #endif
173