1 /* bnx2x_sriov.c: QLogic Everest network driver.
2 *
3 * Copyright 2009-2013 Broadcom Corporation
4 * Copyright 2014 QLogic Corporation
5 * All rights reserved
6 *
7 * Unless you and QLogic execute a separate written software license
8 * agreement governing use of this software, this software is licensed to you
9 * under the terms of the GNU General Public License version 2, available
10 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
11 *
12 * Notwithstanding the above, under no circumstances may you combine this
13 * software in any way with any other QLogic software provided under a
14 * license other than the GPL, without QLogic's express prior written
15 * consent.
16 *
17 * Maintained by: Ariel Elior <ariel.elior@qlogic.com>
18 * Written by: Shmulik Ravid
19 * Ariel Elior <ariel.elior@qlogic.com>
20 *
21 */
22 #include "bnx2x.h"
23 #include "bnx2x_init.h"
24 #include "bnx2x_cmn.h"
25 #include "bnx2x_sp.h"
26 #include <linux/crc32.h>
27 #include <linux/if_vlan.h>
28
29 static int bnx2x_vf_op_prep(struct bnx2x *bp, int vfidx,
30 struct bnx2x_virtf **vf,
31 struct pf_vf_bulletin_content **bulletin,
32 bool test_queue);
33
34 /* General service functions */
storm_memset_vf_to_pf(struct bnx2x * bp,u16 abs_fid,u16 pf_id)35 static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,
36 u16 pf_id)
37 {
38 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid),
39 pf_id);
40 REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_VF_TO_PF_OFFSET(abs_fid),
41 pf_id);
42 REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_VF_TO_PF_OFFSET(abs_fid),
43 pf_id);
44 REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_VF_TO_PF_OFFSET(abs_fid),
45 pf_id);
46 }
47
storm_memset_func_en(struct bnx2x * bp,u16 abs_fid,u8 enable)48 static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,
49 u8 enable)
50 {
51 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid),
52 enable);
53 REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_FUNC_EN_OFFSET(abs_fid),
54 enable);
55 REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_FUNC_EN_OFFSET(abs_fid),
56 enable);
57 REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_FUNC_EN_OFFSET(abs_fid),
58 enable);
59 }
60
bnx2x_vf_idx_by_abs_fid(struct bnx2x * bp,u16 abs_vfid)61 int bnx2x_vf_idx_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
62 {
63 int idx;
64
65 for_each_vf(bp, idx)
66 if (bnx2x_vf(bp, idx, abs_vfid) == abs_vfid)
67 break;
68 return idx;
69 }
70
71 static
bnx2x_vf_by_abs_fid(struct bnx2x * bp,u16 abs_vfid)72 struct bnx2x_virtf *bnx2x_vf_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
73 {
74 u16 idx = (u16)bnx2x_vf_idx_by_abs_fid(bp, abs_vfid);
75 return (idx < BNX2X_NR_VIRTFN(bp)) ? BP_VF(bp, idx) : NULL;
76 }
77
bnx2x_vf_igu_ack_sb(struct bnx2x * bp,struct bnx2x_virtf * vf,u8 igu_sb_id,u8 segment,u16 index,u8 op,u8 update)78 static void bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf,
79 u8 igu_sb_id, u8 segment, u16 index, u8 op,
80 u8 update)
81 {
82 /* acking a VF sb through the PF - use the GRC */
83 u32 ctl;
84 u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA;
85 u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;
86 u32 func_encode = vf->abs_vfid;
87 u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + igu_sb_id;
88 struct igu_regular cmd_data = {0};
89
90 cmd_data.sb_id_and_flags =
91 ((index << IGU_REGULAR_SB_INDEX_SHIFT) |
92 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
93 (update << IGU_REGULAR_BUPDATE_SHIFT) |
94 (op << IGU_REGULAR_ENABLE_INT_SHIFT));
95
96 ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT |
97 func_encode << IGU_CTRL_REG_FID_SHIFT |
98 IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT;
99
100 DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
101 cmd_data.sb_id_and_flags, igu_addr_data);
102 REG_WR(bp, igu_addr_data, cmd_data.sb_id_and_flags);
103 mmiowb();
104 barrier();
105
106 DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
107 ctl, igu_addr_ctl);
108 REG_WR(bp, igu_addr_ctl, ctl);
109 mmiowb();
110 barrier();
111 }
112
bnx2x_validate_vf_sp_objs(struct bnx2x * bp,struct bnx2x_virtf * vf,bool print_err)113 static bool bnx2x_validate_vf_sp_objs(struct bnx2x *bp,
114 struct bnx2x_virtf *vf,
115 bool print_err)
116 {
117 if (!bnx2x_leading_vfq(vf, sp_initialized)) {
118 if (print_err)
119 BNX2X_ERR("Slowpath objects not yet initialized!\n");
120 else
121 DP(BNX2X_MSG_IOV, "Slowpath objects not yet initialized!\n");
122 return false;
123 }
124 return true;
125 }
126
127 /* VFOP operations states */
bnx2x_vfop_qctor_dump_tx(struct bnx2x * bp,struct bnx2x_virtf * vf,struct bnx2x_queue_init_params * init_params,struct bnx2x_queue_setup_params * setup_params,u16 q_idx,u16 sb_idx)128 void bnx2x_vfop_qctor_dump_tx(struct bnx2x *bp, struct bnx2x_virtf *vf,
129 struct bnx2x_queue_init_params *init_params,
130 struct bnx2x_queue_setup_params *setup_params,
131 u16 q_idx, u16 sb_idx)
132 {
133 DP(BNX2X_MSG_IOV,
134 "VF[%d] Q_SETUP: txq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, flags=0x%lx, traffic-type=%d",
135 vf->abs_vfid,
136 q_idx,
137 sb_idx,
138 init_params->tx.sb_cq_index,
139 init_params->tx.hc_rate,
140 setup_params->flags,
141 setup_params->txq_params.traffic_type);
142 }
143
bnx2x_vfop_qctor_dump_rx(struct bnx2x * bp,struct bnx2x_virtf * vf,struct bnx2x_queue_init_params * init_params,struct bnx2x_queue_setup_params * setup_params,u16 q_idx,u16 sb_idx)144 void bnx2x_vfop_qctor_dump_rx(struct bnx2x *bp, struct bnx2x_virtf *vf,
145 struct bnx2x_queue_init_params *init_params,
146 struct bnx2x_queue_setup_params *setup_params,
147 u16 q_idx, u16 sb_idx)
148 {
149 struct bnx2x_rxq_setup_params *rxq_params = &setup_params->rxq_params;
150
151 DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: rxq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, mtu=%d, buf-size=%d\n"
152 "sge-size=%d, max_sge_pkt=%d, tpa-agg-size=%d, flags=0x%lx, drop-flags=0x%x, cache-log=%d\n",
153 vf->abs_vfid,
154 q_idx,
155 sb_idx,
156 init_params->rx.sb_cq_index,
157 init_params->rx.hc_rate,
158 setup_params->gen_params.mtu,
159 rxq_params->buf_sz,
160 rxq_params->sge_buf_sz,
161 rxq_params->max_sges_pkt,
162 rxq_params->tpa_agg_sz,
163 setup_params->flags,
164 rxq_params->drop_flags,
165 rxq_params->cache_line_log);
166 }
167
bnx2x_vfop_qctor_prep(struct bnx2x * bp,struct bnx2x_virtf * vf,struct bnx2x_vf_queue * q,struct bnx2x_vf_queue_construct_params * p,unsigned long q_type)168 void bnx2x_vfop_qctor_prep(struct bnx2x *bp,
169 struct bnx2x_virtf *vf,
170 struct bnx2x_vf_queue *q,
171 struct bnx2x_vf_queue_construct_params *p,
172 unsigned long q_type)
173 {
174 struct bnx2x_queue_init_params *init_p = &p->qstate.params.init;
175 struct bnx2x_queue_setup_params *setup_p = &p->prep_qsetup;
176
177 /* INIT */
178
179 /* Enable host coalescing in the transition to INIT state */
180 if (test_bit(BNX2X_Q_FLG_HC, &init_p->rx.flags))
181 __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->rx.flags);
182
183 if (test_bit(BNX2X_Q_FLG_HC, &init_p->tx.flags))
184 __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->tx.flags);
185
186 /* FW SB ID */
187 init_p->rx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
188 init_p->tx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
189
190 /* context */
191 init_p->cxts[0] = q->cxt;
192
193 /* SETUP */
194
195 /* Setup-op general parameters */
196 setup_p->gen_params.spcl_id = vf->sp_cl_id;
197 setup_p->gen_params.stat_id = vfq_stat_id(vf, q);
198 setup_p->gen_params.fp_hsi = vf->fp_hsi;
199
200 /* Setup-op flags:
201 * collect statistics, zero statistics, local-switching, security,
202 * OV for Flex10, RSS and MCAST for leading
203 */
204 if (test_bit(BNX2X_Q_FLG_STATS, &setup_p->flags))
205 __set_bit(BNX2X_Q_FLG_ZERO_STATS, &setup_p->flags);
206
207 /* for VFs, enable tx switching, bd coherency, and mac address
208 * anti-spoofing
209 */
210 __set_bit(BNX2X_Q_FLG_TX_SWITCH, &setup_p->flags);
211 __set_bit(BNX2X_Q_FLG_TX_SEC, &setup_p->flags);
212 __set_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
213
214 /* Setup-op rx parameters */
215 if (test_bit(BNX2X_Q_TYPE_HAS_RX, &q_type)) {
216 struct bnx2x_rxq_setup_params *rxq_p = &setup_p->rxq_params;
217
218 rxq_p->cl_qzone_id = vfq_qzone_id(vf, q);
219 rxq_p->fw_sb_id = vf_igu_sb(vf, q->sb_idx);
220 rxq_p->rss_engine_id = FW_VF_HANDLE(vf->abs_vfid);
221
222 if (test_bit(BNX2X_Q_FLG_TPA, &setup_p->flags))
223 rxq_p->max_tpa_queues = BNX2X_VF_MAX_TPA_AGG_QUEUES;
224 }
225
226 /* Setup-op tx parameters */
227 if (test_bit(BNX2X_Q_TYPE_HAS_TX, &q_type)) {
228 setup_p->txq_params.tss_leading_cl_id = vf->leading_rss;
229 setup_p->txq_params.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
230 }
231 }
232
bnx2x_vf_queue_create(struct bnx2x * bp,struct bnx2x_virtf * vf,int qid,struct bnx2x_vf_queue_construct_params * qctor)233 static int bnx2x_vf_queue_create(struct bnx2x *bp,
234 struct bnx2x_virtf *vf, int qid,
235 struct bnx2x_vf_queue_construct_params *qctor)
236 {
237 struct bnx2x_queue_state_params *q_params;
238 int rc = 0;
239
240 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
241
242 /* Prepare ramrod information */
243 q_params = &qctor->qstate;
244 q_params->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
245 set_bit(RAMROD_COMP_WAIT, &q_params->ramrod_flags);
246
247 if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
248 BNX2X_Q_LOGICAL_STATE_ACTIVE) {
249 DP(BNX2X_MSG_IOV, "queue was already up. Aborting gracefully\n");
250 goto out;
251 }
252
253 /* Run Queue 'construction' ramrods */
254 q_params->cmd = BNX2X_Q_CMD_INIT;
255 rc = bnx2x_queue_state_change(bp, q_params);
256 if (rc)
257 goto out;
258
259 memcpy(&q_params->params.setup, &qctor->prep_qsetup,
260 sizeof(struct bnx2x_queue_setup_params));
261 q_params->cmd = BNX2X_Q_CMD_SETUP;
262 rc = bnx2x_queue_state_change(bp, q_params);
263 if (rc)
264 goto out;
265
266 /* enable interrupts */
267 bnx2x_vf_igu_ack_sb(bp, vf, vf_igu_sb(vf, bnx2x_vfq(vf, qid, sb_idx)),
268 USTORM_ID, 0, IGU_INT_ENABLE, 0);
269 out:
270 return rc;
271 }
272
bnx2x_vf_queue_destroy(struct bnx2x * bp,struct bnx2x_virtf * vf,int qid)273 static int bnx2x_vf_queue_destroy(struct bnx2x *bp, struct bnx2x_virtf *vf,
274 int qid)
275 {
276 enum bnx2x_queue_cmd cmds[] = {BNX2X_Q_CMD_HALT,
277 BNX2X_Q_CMD_TERMINATE,
278 BNX2X_Q_CMD_CFC_DEL};
279 struct bnx2x_queue_state_params q_params;
280 int rc, i;
281
282 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
283
284 /* Prepare ramrod information */
285 memset(&q_params, 0, sizeof(struct bnx2x_queue_state_params));
286 q_params.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
287 set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
288
289 if (bnx2x_get_q_logical_state(bp, q_params.q_obj) ==
290 BNX2X_Q_LOGICAL_STATE_STOPPED) {
291 DP(BNX2X_MSG_IOV, "queue was already stopped. Aborting gracefully\n");
292 goto out;
293 }
294
295 /* Run Queue 'destruction' ramrods */
296 for (i = 0; i < ARRAY_SIZE(cmds); i++) {
297 q_params.cmd = cmds[i];
298 rc = bnx2x_queue_state_change(bp, &q_params);
299 if (rc) {
300 BNX2X_ERR("Failed to run Queue command %d\n", cmds[i]);
301 return rc;
302 }
303 }
304 out:
305 /* Clean Context */
306 if (bnx2x_vfq(vf, qid, cxt)) {
307 bnx2x_vfq(vf, qid, cxt)->ustorm_ag_context.cdu_usage = 0;
308 bnx2x_vfq(vf, qid, cxt)->xstorm_ag_context.cdu_reserved = 0;
309 }
310
311 return 0;
312 }
313
314 static void
bnx2x_vf_set_igu_info(struct bnx2x * bp,u8 igu_sb_id,u8 abs_vfid)315 bnx2x_vf_set_igu_info(struct bnx2x *bp, u8 igu_sb_id, u8 abs_vfid)
316 {
317 struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
318 if (vf) {
319 /* the first igu entry belonging to VFs of this PF */
320 if (!BP_VFDB(bp)->first_vf_igu_entry)
321 BP_VFDB(bp)->first_vf_igu_entry = igu_sb_id;
322
323 /* the first igu entry belonging to this VF */
324 if (!vf_sb_count(vf))
325 vf->igu_base_id = igu_sb_id;
326
327 ++vf_sb_count(vf);
328 ++vf->sb_count;
329 }
330 BP_VFDB(bp)->vf_sbs_pool++;
331 }
332
bnx2x_vf_vlan_credit(struct bnx2x * bp,struct bnx2x_vlan_mac_obj * obj,atomic_t * counter)333 static inline void bnx2x_vf_vlan_credit(struct bnx2x *bp,
334 struct bnx2x_vlan_mac_obj *obj,
335 atomic_t *counter)
336 {
337 struct list_head *pos;
338 int read_lock;
339 int cnt = 0;
340
341 read_lock = bnx2x_vlan_mac_h_read_lock(bp, obj);
342 if (read_lock)
343 DP(BNX2X_MSG_SP, "Failed to take vlan mac read head; continuing anyway\n");
344
345 list_for_each(pos, &obj->head)
346 cnt++;
347
348 if (!read_lock)
349 bnx2x_vlan_mac_h_read_unlock(bp, obj);
350
351 atomic_set(counter, cnt);
352 }
353
bnx2x_vf_vlan_mac_clear(struct bnx2x * bp,struct bnx2x_virtf * vf,int qid,bool drv_only,int type)354 static int bnx2x_vf_vlan_mac_clear(struct bnx2x *bp, struct bnx2x_virtf *vf,
355 int qid, bool drv_only, int type)
356 {
357 struct bnx2x_vlan_mac_ramrod_params ramrod;
358 int rc;
359
360 DP(BNX2X_MSG_IOV, "vf[%d] - deleting all %s\n", vf->abs_vfid,
361 (type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MACs" :
362 (type == BNX2X_VF_FILTER_MAC) ? "MACs" : "VLANs");
363
364 /* Prepare ramrod params */
365 memset(&ramrod, 0, sizeof(struct bnx2x_vlan_mac_ramrod_params));
366 if (type == BNX2X_VF_FILTER_VLAN_MAC) {
367 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
368 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_mac_obj);
369 } else if (type == BNX2X_VF_FILTER_MAC) {
370 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
371 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
372 } else {
373 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
374 }
375 ramrod.user_req.cmd = BNX2X_VLAN_MAC_DEL;
376
377 set_bit(RAMROD_EXEC, &ramrod.ramrod_flags);
378 if (drv_only)
379 set_bit(RAMROD_DRV_CLR_ONLY, &ramrod.ramrod_flags);
380 else
381 set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
382
383 /* Start deleting */
384 rc = ramrod.vlan_mac_obj->delete_all(bp,
385 ramrod.vlan_mac_obj,
386 &ramrod.user_req.vlan_mac_flags,
387 &ramrod.ramrod_flags);
388 if (rc) {
389 BNX2X_ERR("Failed to delete all %s\n",
390 (type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MACs" :
391 (type == BNX2X_VF_FILTER_MAC) ? "MACs" : "VLANs");
392 return rc;
393 }
394
395 return 0;
396 }
397
bnx2x_vf_mac_vlan_config(struct bnx2x * bp,struct bnx2x_virtf * vf,int qid,struct bnx2x_vf_mac_vlan_filter * filter,bool drv_only)398 static int bnx2x_vf_mac_vlan_config(struct bnx2x *bp,
399 struct bnx2x_virtf *vf, int qid,
400 struct bnx2x_vf_mac_vlan_filter *filter,
401 bool drv_only)
402 {
403 struct bnx2x_vlan_mac_ramrod_params ramrod;
404 int rc;
405
406 DP(BNX2X_MSG_IOV, "vf[%d] - %s a %s filter\n",
407 vf->abs_vfid, filter->add ? "Adding" : "Deleting",
408 (filter->type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MAC" :
409 (filter->type == BNX2X_VF_FILTER_MAC) ? "MAC" : "VLAN");
410
411 /* Prepare ramrod params */
412 memset(&ramrod, 0, sizeof(struct bnx2x_vlan_mac_ramrod_params));
413 if (filter->type == BNX2X_VF_FILTER_VLAN_MAC) {
414 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_mac_obj);
415 ramrod.user_req.u.vlan.vlan = filter->vid;
416 memcpy(&ramrod.user_req.u.mac.mac, filter->mac, ETH_ALEN);
417 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
418 } else if (filter->type == BNX2X_VF_FILTER_VLAN) {
419 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
420 ramrod.user_req.u.vlan.vlan = filter->vid;
421 } else {
422 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
423 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
424 memcpy(&ramrod.user_req.u.mac.mac, filter->mac, ETH_ALEN);
425 }
426 ramrod.user_req.cmd = filter->add ? BNX2X_VLAN_MAC_ADD :
427 BNX2X_VLAN_MAC_DEL;
428
429 set_bit(RAMROD_EXEC, &ramrod.ramrod_flags);
430 if (drv_only)
431 set_bit(RAMROD_DRV_CLR_ONLY, &ramrod.ramrod_flags);
432 else
433 set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
434
435 /* Add/Remove the filter */
436 rc = bnx2x_config_vlan_mac(bp, &ramrod);
437 if (rc == -EEXIST)
438 return 0;
439 if (rc) {
440 BNX2X_ERR("Failed to %s %s\n",
441 filter->add ? "add" : "delete",
442 (filter->type == BNX2X_VF_FILTER_VLAN_MAC) ?
443 "VLAN-MAC" :
444 (filter->type == BNX2X_VF_FILTER_MAC) ?
445 "MAC" : "VLAN");
446 return rc;
447 }
448
449 filter->applied = true;
450
451 return 0;
452 }
453
bnx2x_vf_mac_vlan_config_list(struct bnx2x * bp,struct bnx2x_virtf * vf,struct bnx2x_vf_mac_vlan_filters * filters,int qid,bool drv_only)454 int bnx2x_vf_mac_vlan_config_list(struct bnx2x *bp, struct bnx2x_virtf *vf,
455 struct bnx2x_vf_mac_vlan_filters *filters,
456 int qid, bool drv_only)
457 {
458 int rc = 0, i;
459
460 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
461
462 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
463 return -EINVAL;
464
465 /* Prepare ramrod params */
466 for (i = 0; i < filters->count; i++) {
467 rc = bnx2x_vf_mac_vlan_config(bp, vf, qid,
468 &filters->filters[i], drv_only);
469 if (rc)
470 break;
471 }
472
473 /* Rollback if needed */
474 if (i != filters->count) {
475 BNX2X_ERR("Managed only %d/%d filters - rolling back\n",
476 i, filters->count + 1);
477 while (--i >= 0) {
478 if (!filters->filters[i].applied)
479 continue;
480 filters->filters[i].add = !filters->filters[i].add;
481 bnx2x_vf_mac_vlan_config(bp, vf, qid,
482 &filters->filters[i],
483 drv_only);
484 }
485 }
486
487 /* It's our responsibility to free the filters */
488 kfree(filters);
489
490 return rc;
491 }
492
bnx2x_vf_queue_setup(struct bnx2x * bp,struct bnx2x_virtf * vf,int qid,struct bnx2x_vf_queue_construct_params * qctor)493 int bnx2x_vf_queue_setup(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid,
494 struct bnx2x_vf_queue_construct_params *qctor)
495 {
496 int rc;
497
498 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
499
500 rc = bnx2x_vf_queue_create(bp, vf, qid, qctor);
501 if (rc)
502 goto op_err;
503
504 /* Schedule the configuration of any pending vlan filters */
505 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_HYPERVISOR_VLAN,
506 BNX2X_MSG_IOV);
507 return 0;
508 op_err:
509 BNX2X_ERR("QSETUP[%d:%d] error: rc %d\n", vf->abs_vfid, qid, rc);
510 return rc;
511 }
512
bnx2x_vf_queue_flr(struct bnx2x * bp,struct bnx2x_virtf * vf,int qid)513 static int bnx2x_vf_queue_flr(struct bnx2x *bp, struct bnx2x_virtf *vf,
514 int qid)
515 {
516 int rc;
517
518 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
519
520 /* If needed, clean the filtering data base */
521 if ((qid == LEADING_IDX) &&
522 bnx2x_validate_vf_sp_objs(bp, vf, false)) {
523 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,
524 BNX2X_VF_FILTER_VLAN_MAC);
525 if (rc)
526 goto op_err;
527 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,
528 BNX2X_VF_FILTER_VLAN);
529 if (rc)
530 goto op_err;
531 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,
532 BNX2X_VF_FILTER_MAC);
533 if (rc)
534 goto op_err;
535 }
536
537 /* Terminate queue */
538 if (bnx2x_vfq(vf, qid, sp_obj).state != BNX2X_Q_STATE_RESET) {
539 struct bnx2x_queue_state_params qstate;
540
541 memset(&qstate, 0, sizeof(struct bnx2x_queue_state_params));
542 qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
543 qstate.q_obj->state = BNX2X_Q_STATE_STOPPED;
544 qstate.cmd = BNX2X_Q_CMD_TERMINATE;
545 set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags);
546 rc = bnx2x_queue_state_change(bp, &qstate);
547 if (rc)
548 goto op_err;
549 }
550
551 return 0;
552 op_err:
553 BNX2X_ERR("vf[%d:%d] error: rc %d\n", vf->abs_vfid, qid, rc);
554 return rc;
555 }
556
bnx2x_vf_mcast(struct bnx2x * bp,struct bnx2x_virtf * vf,bnx2x_mac_addr_t * mcasts,int mc_num,bool drv_only)557 int bnx2x_vf_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf,
558 bnx2x_mac_addr_t *mcasts, int mc_num, bool drv_only)
559 {
560 struct bnx2x_mcast_list_elem *mc = NULL;
561 struct bnx2x_mcast_ramrod_params mcast;
562 int rc, i;
563
564 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
565
566 /* Prepare Multicast command */
567 memset(&mcast, 0, sizeof(struct bnx2x_mcast_ramrod_params));
568 mcast.mcast_obj = &vf->mcast_obj;
569 if (drv_only)
570 set_bit(RAMROD_DRV_CLR_ONLY, &mcast.ramrod_flags);
571 else
572 set_bit(RAMROD_COMP_WAIT, &mcast.ramrod_flags);
573 if (mc_num) {
574 mc = kzalloc(mc_num * sizeof(struct bnx2x_mcast_list_elem),
575 GFP_KERNEL);
576 if (!mc) {
577 BNX2X_ERR("Cannot Configure multicasts due to lack of memory\n");
578 return -ENOMEM;
579 }
580 }
581
582 /* clear existing mcasts */
583 mcast.mcast_list_len = vf->mcast_list_len;
584 vf->mcast_list_len = mc_num;
585 rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_DEL);
586 if (rc) {
587 BNX2X_ERR("Failed to remove multicasts\n");
588 kfree(mc);
589 return rc;
590 }
591
592 /* update mcast list on the ramrod params */
593 if (mc_num) {
594 INIT_LIST_HEAD(&mcast.mcast_list);
595 for (i = 0; i < mc_num; i++) {
596 mc[i].mac = mcasts[i];
597 list_add_tail(&mc[i].link,
598 &mcast.mcast_list);
599 }
600
601 /* add new mcasts */
602 mcast.mcast_list_len = mc_num;
603 rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_ADD);
604 if (rc)
605 BNX2X_ERR("Faled to add multicasts\n");
606 kfree(mc);
607 }
608
609 return rc;
610 }
611
bnx2x_vf_prep_rx_mode(struct bnx2x * bp,u8 qid,struct bnx2x_rx_mode_ramrod_params * ramrod,struct bnx2x_virtf * vf,unsigned long accept_flags)612 static void bnx2x_vf_prep_rx_mode(struct bnx2x *bp, u8 qid,
613 struct bnx2x_rx_mode_ramrod_params *ramrod,
614 struct bnx2x_virtf *vf,
615 unsigned long accept_flags)
616 {
617 struct bnx2x_vf_queue *vfq = vfq_get(vf, qid);
618
619 memset(ramrod, 0, sizeof(*ramrod));
620 ramrod->cid = vfq->cid;
621 ramrod->cl_id = vfq_cl_id(vf, vfq);
622 ramrod->rx_mode_obj = &bp->rx_mode_obj;
623 ramrod->func_id = FW_VF_HANDLE(vf->abs_vfid);
624 ramrod->rx_accept_flags = accept_flags;
625 ramrod->tx_accept_flags = accept_flags;
626 ramrod->pstate = &vf->filter_state;
627 ramrod->state = BNX2X_FILTER_RX_MODE_PENDING;
628
629 set_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
630 set_bit(RAMROD_RX, &ramrod->ramrod_flags);
631 set_bit(RAMROD_TX, &ramrod->ramrod_flags);
632
633 ramrod->rdata = bnx2x_vf_sp(bp, vf, rx_mode_rdata.e2);
634 ramrod->rdata_mapping = bnx2x_vf_sp_map(bp, vf, rx_mode_rdata.e2);
635 }
636
bnx2x_vf_rxmode(struct bnx2x * bp,struct bnx2x_virtf * vf,int qid,unsigned long accept_flags)637 int bnx2x_vf_rxmode(struct bnx2x *bp, struct bnx2x_virtf *vf,
638 int qid, unsigned long accept_flags)
639 {
640 struct bnx2x_rx_mode_ramrod_params ramrod;
641
642 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
643
644 bnx2x_vf_prep_rx_mode(bp, qid, &ramrod, vf, accept_flags);
645 set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
646 vfq_get(vf, qid)->accept_flags = ramrod.rx_accept_flags;
647 return bnx2x_config_rx_mode(bp, &ramrod);
648 }
649
bnx2x_vf_queue_teardown(struct bnx2x * bp,struct bnx2x_virtf * vf,int qid)650 int bnx2x_vf_queue_teardown(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid)
651 {
652 int rc;
653
654 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
655
656 /* Remove all classification configuration for leading queue */
657 if (qid == LEADING_IDX) {
658 rc = bnx2x_vf_rxmode(bp, vf, qid, 0);
659 if (rc)
660 goto op_err;
661
662 /* Remove filtering if feasible */
663 if (bnx2x_validate_vf_sp_objs(bp, vf, true)) {
664 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
665 false,
666 BNX2X_VF_FILTER_VLAN_MAC);
667 if (rc)
668 goto op_err;
669 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
670 false,
671 BNX2X_VF_FILTER_VLAN);
672 if (rc)
673 goto op_err;
674 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
675 false,
676 BNX2X_VF_FILTER_MAC);
677 if (rc)
678 goto op_err;
679 rc = bnx2x_vf_mcast(bp, vf, NULL, 0, false);
680 if (rc)
681 goto op_err;
682 }
683 }
684
685 /* Destroy queue */
686 rc = bnx2x_vf_queue_destroy(bp, vf, qid);
687 if (rc)
688 goto op_err;
689 return rc;
690 op_err:
691 BNX2X_ERR("vf[%d:%d] error: rc %d\n",
692 vf->abs_vfid, qid, rc);
693 return rc;
694 }
695
696 /* VF enable primitives
697 * when pretend is required the caller is responsible
698 * for calling pretend prior to calling these routines
699 */
700
701 /* internal vf enable - until vf is enabled internally all transactions
702 * are blocked. This routine should always be called last with pretend.
703 */
bnx2x_vf_enable_internal(struct bnx2x * bp,u8 enable)704 static void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable)
705 {
706 REG_WR(bp, PGLUE_B_REG_INTERNAL_VFID_ENABLE, enable ? 1 : 0);
707 }
708
709 /* clears vf error in all semi blocks */
bnx2x_vf_semi_clear_err(struct bnx2x * bp,u8 abs_vfid)710 static void bnx2x_vf_semi_clear_err(struct bnx2x *bp, u8 abs_vfid)
711 {
712 REG_WR(bp, TSEM_REG_VFPF_ERR_NUM, abs_vfid);
713 REG_WR(bp, USEM_REG_VFPF_ERR_NUM, abs_vfid);
714 REG_WR(bp, CSEM_REG_VFPF_ERR_NUM, abs_vfid);
715 REG_WR(bp, XSEM_REG_VFPF_ERR_NUM, abs_vfid);
716 }
717
bnx2x_vf_pglue_clear_err(struct bnx2x * bp,u8 abs_vfid)718 static void bnx2x_vf_pglue_clear_err(struct bnx2x *bp, u8 abs_vfid)
719 {
720 u32 was_err_group = (2 * BP_PATH(bp) + abs_vfid) >> 5;
721 u32 was_err_reg = 0;
722
723 switch (was_err_group) {
724 case 0:
725 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR;
726 break;
727 case 1:
728 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR;
729 break;
730 case 2:
731 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR;
732 break;
733 case 3:
734 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR;
735 break;
736 }
737 REG_WR(bp, was_err_reg, 1 << (abs_vfid & 0x1f));
738 }
739
bnx2x_vf_igu_reset(struct bnx2x * bp,struct bnx2x_virtf * vf)740 static void bnx2x_vf_igu_reset(struct bnx2x *bp, struct bnx2x_virtf *vf)
741 {
742 int i;
743 u32 val;
744
745 /* Set VF masks and configuration - pretend */
746 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
747
748 REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0);
749 REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0);
750 REG_WR(bp, IGU_REG_SB_MASK_LSB, 0);
751 REG_WR(bp, IGU_REG_SB_MASK_MSB, 0);
752 REG_WR(bp, IGU_REG_PBA_STATUS_LSB, 0);
753 REG_WR(bp, IGU_REG_PBA_STATUS_MSB, 0);
754
755 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
756 val |= (IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_MSI_MSIX_EN);
757 val &= ~IGU_VF_CONF_PARENT_MASK;
758 val |= (BP_ABS_FUNC(bp) >> 1) << IGU_VF_CONF_PARENT_SHIFT;
759 REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
760
761 DP(BNX2X_MSG_IOV,
762 "value in IGU_REG_VF_CONFIGURATION of vf %d after write is 0x%08x\n",
763 vf->abs_vfid, val);
764
765 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
766
767 /* iterate over all queues, clear sb consumer */
768 for (i = 0; i < vf_sb_count(vf); i++) {
769 u8 igu_sb_id = vf_igu_sb(vf, i);
770
771 /* zero prod memory */
772 REG_WR(bp, IGU_REG_PROD_CONS_MEMORY + igu_sb_id * 4, 0);
773
774 /* clear sb state machine */
775 bnx2x_igu_clear_sb_gen(bp, vf->abs_vfid, igu_sb_id,
776 false /* VF */);
777
778 /* disable + update */
779 bnx2x_vf_igu_ack_sb(bp, vf, igu_sb_id, USTORM_ID, 0,
780 IGU_INT_DISABLE, 1);
781 }
782 }
783
bnx2x_vf_enable_access(struct bnx2x * bp,u8 abs_vfid)784 void bnx2x_vf_enable_access(struct bnx2x *bp, u8 abs_vfid)
785 {
786 /* set the VF-PF association in the FW */
787 storm_memset_vf_to_pf(bp, FW_VF_HANDLE(abs_vfid), BP_FUNC(bp));
788 storm_memset_func_en(bp, FW_VF_HANDLE(abs_vfid), 1);
789
790 /* clear vf errors*/
791 bnx2x_vf_semi_clear_err(bp, abs_vfid);
792 bnx2x_vf_pglue_clear_err(bp, abs_vfid);
793
794 /* internal vf-enable - pretend */
795 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid));
796 DP(BNX2X_MSG_IOV, "enabling internal access for vf %x\n", abs_vfid);
797 bnx2x_vf_enable_internal(bp, true);
798 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
799 }
800
bnx2x_vf_enable_traffic(struct bnx2x * bp,struct bnx2x_virtf * vf)801 static void bnx2x_vf_enable_traffic(struct bnx2x *bp, struct bnx2x_virtf *vf)
802 {
803 /* Reset vf in IGU interrupts are still disabled */
804 bnx2x_vf_igu_reset(bp, vf);
805
806 /* pretend to enable the vf with the PBF */
807 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
808 REG_WR(bp, PBF_REG_DISABLE_VF, 0);
809 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
810 }
811
bnx2x_vf_is_pcie_pending(struct bnx2x * bp,u8 abs_vfid)812 static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid)
813 {
814 struct pci_dev *dev;
815 struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
816
817 if (!vf)
818 return false;
819
820 dev = pci_get_bus_and_slot(vf->bus, vf->devfn);
821 if (dev)
822 return bnx2x_is_pcie_pending(dev);
823 return false;
824 }
825
bnx2x_vf_flr_clnup_epilog(struct bnx2x * bp,u8 abs_vfid)826 int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid)
827 {
828 /* Verify no pending pci transactions */
829 if (bnx2x_vf_is_pcie_pending(bp, abs_vfid))
830 BNX2X_ERR("PCIE Transactions still pending\n");
831
832 return 0;
833 }
834
835 /* must be called after the number of PF queues and the number of VFs are
836 * both known
837 */
838 static void
bnx2x_iov_static_resc(struct bnx2x * bp,struct bnx2x_virtf * vf)839 bnx2x_iov_static_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
840 {
841 struct vf_pf_resc_request *resc = &vf->alloc_resc;
842
843 /* will be set only during VF-ACQUIRE */
844 resc->num_rxqs = 0;
845 resc->num_txqs = 0;
846
847 resc->num_mac_filters = VF_MAC_CREDIT_CNT;
848 resc->num_vlan_filters = VF_VLAN_CREDIT_CNT;
849
850 /* no real limitation */
851 resc->num_mc_filters = 0;
852
853 /* num_sbs already set */
854 resc->num_sbs = vf->sb_count;
855 }
856
857 /* FLR routines: */
bnx2x_vf_free_resc(struct bnx2x * bp,struct bnx2x_virtf * vf)858 static void bnx2x_vf_free_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
859 {
860 /* reset the state variables */
861 bnx2x_iov_static_resc(bp, vf);
862 vf->state = VF_FREE;
863 }
864
bnx2x_vf_flr_clnup_hw(struct bnx2x * bp,struct bnx2x_virtf * vf)865 static void bnx2x_vf_flr_clnup_hw(struct bnx2x *bp, struct bnx2x_virtf *vf)
866 {
867 u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp);
868
869 /* DQ usage counter */
870 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
871 bnx2x_flr_clnup_poll_hw_counter(bp, DORQ_REG_VF_USAGE_CNT,
872 "DQ VF usage counter timed out",
873 poll_cnt);
874 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
875
876 /* FW cleanup command - poll for the results */
877 if (bnx2x_send_final_clnup(bp, (u8)FW_VF_HANDLE(vf->abs_vfid),
878 poll_cnt))
879 BNX2X_ERR("VF[%d] Final cleanup timed-out\n", vf->abs_vfid);
880
881 /* verify TX hw is flushed */
882 bnx2x_tx_hw_flushed(bp, poll_cnt);
883 }
884
bnx2x_vf_flr(struct bnx2x * bp,struct bnx2x_virtf * vf)885 static void bnx2x_vf_flr(struct bnx2x *bp, struct bnx2x_virtf *vf)
886 {
887 int rc, i;
888
889 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
890
891 /* the cleanup operations are valid if and only if the VF
892 * was first acquired.
893 */
894 for (i = 0; i < vf_rxq_count(vf); i++) {
895 rc = bnx2x_vf_queue_flr(bp, vf, i);
896 if (rc)
897 goto out;
898 }
899
900 /* remove multicasts */
901 bnx2x_vf_mcast(bp, vf, NULL, 0, true);
902
903 /* dispatch final cleanup and wait for HW queues to flush */
904 bnx2x_vf_flr_clnup_hw(bp, vf);
905
906 /* release VF resources */
907 bnx2x_vf_free_resc(bp, vf);
908
909 /* re-open the mailbox */
910 bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
911 return;
912 out:
913 BNX2X_ERR("vf[%d:%d] failed flr: rc %d\n",
914 vf->abs_vfid, i, rc);
915 }
916
bnx2x_vf_flr_clnup(struct bnx2x * bp)917 static void bnx2x_vf_flr_clnup(struct bnx2x *bp)
918 {
919 struct bnx2x_virtf *vf;
920 int i;
921
922 for (i = 0; i < BNX2X_NR_VIRTFN(bp); i++) {
923 /* VF should be RESET & in FLR cleanup states */
924 if (bnx2x_vf(bp, i, state) != VF_RESET ||
925 !bnx2x_vf(bp, i, flr_clnup_stage))
926 continue;
927
928 DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. Num of vfs: %d\n",
929 i, BNX2X_NR_VIRTFN(bp));
930
931 vf = BP_VF(bp, i);
932
933 /* lock the vf pf channel */
934 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
935
936 /* invoke the VF FLR SM */
937 bnx2x_vf_flr(bp, vf);
938
939 /* mark the VF to be ACKED and continue */
940 vf->flr_clnup_stage = false;
941 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
942 }
943
944 /* Acknowledge the handled VFs.
945 * we are acknowledge all the vfs which an flr was requested for, even
946 * if amongst them there are such that we never opened, since the mcp
947 * will interrupt us immediately again if we only ack some of the bits,
948 * resulting in an endless loop. This can happen for example in KVM
949 * where an 'all ones' flr request is sometimes given by hyper visor
950 */
951 DP(BNX2X_MSG_MCP, "DRV_STATUS_VF_DISABLED ACK for vfs 0x%x 0x%x\n",
952 bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
953 for (i = 0; i < FLRD_VFS_DWORDS; i++)
954 SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i],
955 bp->vfdb->flrd_vfs[i]);
956
957 bnx2x_fw_command(bp, DRV_MSG_CODE_VF_DISABLED_DONE, 0);
958
959 /* clear the acked bits - better yet if the MCP implemented
960 * write to clear semantics
961 */
962 for (i = 0; i < FLRD_VFS_DWORDS; i++)
963 SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], 0);
964 }
965
bnx2x_vf_handle_flr_event(struct bnx2x * bp)966 void bnx2x_vf_handle_flr_event(struct bnx2x *bp)
967 {
968 int i;
969
970 /* Read FLR'd VFs */
971 for (i = 0; i < FLRD_VFS_DWORDS; i++)
972 bp->vfdb->flrd_vfs[i] = SHMEM2_RD(bp, mcp_vf_disabled[i]);
973
974 DP(BNX2X_MSG_MCP,
975 "DRV_STATUS_VF_DISABLED received for vfs 0x%x 0x%x\n",
976 bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
977
978 for_each_vf(bp, i) {
979 struct bnx2x_virtf *vf = BP_VF(bp, i);
980 u32 reset = 0;
981
982 if (vf->abs_vfid < 32)
983 reset = bp->vfdb->flrd_vfs[0] & (1 << vf->abs_vfid);
984 else
985 reset = bp->vfdb->flrd_vfs[1] &
986 (1 << (vf->abs_vfid - 32));
987
988 if (reset) {
989 /* set as reset and ready for cleanup */
990 vf->state = VF_RESET;
991 vf->flr_clnup_stage = true;
992
993 DP(BNX2X_MSG_IOV,
994 "Initiating Final cleanup for VF %d\n",
995 vf->abs_vfid);
996 }
997 }
998
999 /* do the FLR cleanup for all marked VFs*/
1000 bnx2x_vf_flr_clnup(bp);
1001 }
1002
1003 /* IOV global initialization routines */
bnx2x_iov_init_dq(struct bnx2x * bp)1004 void bnx2x_iov_init_dq(struct bnx2x *bp)
1005 {
1006 if (!IS_SRIOV(bp))
1007 return;
1008
1009 /* Set the DQ such that the CID reflect the abs_vfid */
1010 REG_WR(bp, DORQ_REG_VF_NORM_VF_BASE, 0);
1011 REG_WR(bp, DORQ_REG_MAX_RVFID_SIZE, ilog2(BNX2X_MAX_NUM_OF_VFS));
1012
1013 /* Set VFs starting CID. If its > 0 the preceding CIDs are belong to
1014 * the PF L2 queues
1015 */
1016 REG_WR(bp, DORQ_REG_VF_NORM_CID_BASE, BNX2X_FIRST_VF_CID);
1017
1018 /* The VF window size is the log2 of the max number of CIDs per VF */
1019 REG_WR(bp, DORQ_REG_VF_NORM_CID_WND_SIZE, BNX2X_VF_CID_WND);
1020
1021 /* The VF doorbell size 0 - *B, 4 - 128B. We set it here to match
1022 * the Pf doorbell size although the 2 are independent.
1023 */
1024 REG_WR(bp, DORQ_REG_VF_NORM_CID_OFST, 3);
1025
1026 /* No security checks for now -
1027 * configure single rule (out of 16) mask = 0x1, value = 0x0,
1028 * CID range 0 - 0x1ffff
1029 */
1030 REG_WR(bp, DORQ_REG_VF_TYPE_MASK_0, 1);
1031 REG_WR(bp, DORQ_REG_VF_TYPE_VALUE_0, 0);
1032 REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0);
1033 REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff);
1034
1035 /* set the VF doorbell threshold. This threshold represents the amount
1036 * of doorbells allowed in the main DORQ fifo for a specific VF.
1037 */
1038 REG_WR(bp, DORQ_REG_VF_USAGE_CT_LIMIT, 64);
1039 }
1040
bnx2x_iov_init_dmae(struct bnx2x * bp)1041 void bnx2x_iov_init_dmae(struct bnx2x *bp)
1042 {
1043 if (pci_find_ext_capability(bp->pdev, PCI_EXT_CAP_ID_SRIOV))
1044 REG_WR(bp, DMAE_REG_BACKWARD_COMP_EN, 0);
1045 }
1046
bnx2x_vf_bus(struct bnx2x * bp,int vfid)1047 static int bnx2x_vf_bus(struct bnx2x *bp, int vfid)
1048 {
1049 struct pci_dev *dev = bp->pdev;
1050 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1051
1052 return dev->bus->number + ((dev->devfn + iov->offset +
1053 iov->stride * vfid) >> 8);
1054 }
1055
bnx2x_vf_devfn(struct bnx2x * bp,int vfid)1056 static int bnx2x_vf_devfn(struct bnx2x *bp, int vfid)
1057 {
1058 struct pci_dev *dev = bp->pdev;
1059 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1060
1061 return (dev->devfn + iov->offset + iov->stride * vfid) & 0xff;
1062 }
1063
bnx2x_vf_set_bars(struct bnx2x * bp,struct bnx2x_virtf * vf)1064 static void bnx2x_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf)
1065 {
1066 int i, n;
1067 struct pci_dev *dev = bp->pdev;
1068 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1069
1070 for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i += 2, n++) {
1071 u64 start = pci_resource_start(dev, PCI_IOV_RESOURCES + i);
1072 u32 size = pci_resource_len(dev, PCI_IOV_RESOURCES + i);
1073
1074 size /= iov->total;
1075 vf->bars[n].bar = start + size * vf->abs_vfid;
1076 vf->bars[n].size = size;
1077 }
1078 }
1079
bnx2x_ari_enabled(struct pci_dev * dev)1080 static int bnx2x_ari_enabled(struct pci_dev *dev)
1081 {
1082 return dev->bus->self && dev->bus->self->ari_enabled;
1083 }
1084
1085 static int
bnx2x_get_vf_igu_cam_info(struct bnx2x * bp)1086 bnx2x_get_vf_igu_cam_info(struct bnx2x *bp)
1087 {
1088 int sb_id;
1089 u32 val;
1090 u8 fid, current_pf = 0;
1091
1092 /* IGU in normal mode - read CAM */
1093 for (sb_id = 0; sb_id < IGU_REG_MAPPING_MEMORY_SIZE; sb_id++) {
1094 val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4);
1095 if (!(val & IGU_REG_MAPPING_MEMORY_VALID))
1096 continue;
1097 fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID);
1098 if (fid & IGU_FID_ENCODE_IS_PF)
1099 current_pf = fid & IGU_FID_PF_NUM_MASK;
1100 else if (current_pf == BP_FUNC(bp))
1101 bnx2x_vf_set_igu_info(bp, sb_id,
1102 (fid & IGU_FID_VF_NUM_MASK));
1103 DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n",
1104 ((fid & IGU_FID_ENCODE_IS_PF) ? "PF" : "VF"),
1105 ((fid & IGU_FID_ENCODE_IS_PF) ? (fid & IGU_FID_PF_NUM_MASK) :
1106 (fid & IGU_FID_VF_NUM_MASK)), sb_id,
1107 GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR));
1108 }
1109 DP(BNX2X_MSG_IOV, "vf_sbs_pool is %d\n", BP_VFDB(bp)->vf_sbs_pool);
1110 return BP_VFDB(bp)->vf_sbs_pool;
1111 }
1112
__bnx2x_iov_free_vfdb(struct bnx2x * bp)1113 static void __bnx2x_iov_free_vfdb(struct bnx2x *bp)
1114 {
1115 if (bp->vfdb) {
1116 kfree(bp->vfdb->vfqs);
1117 kfree(bp->vfdb->vfs);
1118 kfree(bp->vfdb);
1119 }
1120 bp->vfdb = NULL;
1121 }
1122
bnx2x_sriov_pci_cfg_info(struct bnx2x * bp,struct bnx2x_sriov * iov)1123 static int bnx2x_sriov_pci_cfg_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1124 {
1125 int pos;
1126 struct pci_dev *dev = bp->pdev;
1127
1128 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
1129 if (!pos) {
1130 BNX2X_ERR("failed to find SRIOV capability in device\n");
1131 return -ENODEV;
1132 }
1133
1134 iov->pos = pos;
1135 DP(BNX2X_MSG_IOV, "sriov ext pos %d\n", pos);
1136 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
1137 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total);
1138 pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial);
1139 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
1140 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
1141 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
1142 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
1143 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
1144
1145 return 0;
1146 }
1147
bnx2x_sriov_info(struct bnx2x * bp,struct bnx2x_sriov * iov)1148 static int bnx2x_sriov_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1149 {
1150 u32 val;
1151
1152 /* read the SRIOV capability structure
1153 * The fields can be read via configuration read or
1154 * directly from the device (starting at offset PCICFG_OFFSET)
1155 */
1156 if (bnx2x_sriov_pci_cfg_info(bp, iov))
1157 return -ENODEV;
1158
1159 /* get the number of SRIOV bars */
1160 iov->nres = 0;
1161
1162 /* read the first_vfid */
1163 val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF);
1164 iov->first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK)
1165 * 8) - (BNX2X_MAX_NUM_OF_VFS * BP_PATH(bp));
1166
1167 DP(BNX2X_MSG_IOV,
1168 "IOV info[%d]: first vf %d, nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
1169 BP_FUNC(bp),
1170 iov->first_vf_in_pf, iov->nres, iov->cap, iov->ctrl, iov->total,
1171 iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
1172
1173 return 0;
1174 }
1175
1176 /* must be called after PF bars are mapped */
bnx2x_iov_init_one(struct bnx2x * bp,int int_mode_param,int num_vfs_param)1177 int bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param,
1178 int num_vfs_param)
1179 {
1180 int err, i;
1181 struct bnx2x_sriov *iov;
1182 struct pci_dev *dev = bp->pdev;
1183
1184 bp->vfdb = NULL;
1185
1186 /* verify is pf */
1187 if (IS_VF(bp))
1188 return 0;
1189
1190 /* verify sriov capability is present in configuration space */
1191 if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV))
1192 return 0;
1193
1194 /* verify chip revision */
1195 if (CHIP_IS_E1x(bp))
1196 return 0;
1197
1198 /* check if SRIOV support is turned off */
1199 if (!num_vfs_param)
1200 return 0;
1201
1202 /* SRIOV assumes that num of PF CIDs < BNX2X_FIRST_VF_CID */
1203 if (BNX2X_L2_MAX_CID(bp) >= BNX2X_FIRST_VF_CID) {
1204 BNX2X_ERR("PF cids %d are overspilling into vf space (starts at %d). Abort SRIOV\n",
1205 BNX2X_L2_MAX_CID(bp), BNX2X_FIRST_VF_CID);
1206 return 0;
1207 }
1208
1209 /* SRIOV can be enabled only with MSIX */
1210 if (int_mode_param == BNX2X_INT_MODE_MSI ||
1211 int_mode_param == BNX2X_INT_MODE_INTX) {
1212 BNX2X_ERR("Forced MSI/INTx mode is incompatible with SRIOV\n");
1213 return 0;
1214 }
1215
1216 err = -EIO;
1217 /* verify ari is enabled */
1218 if (!bnx2x_ari_enabled(bp->pdev)) {
1219 BNX2X_ERR("ARI not supported (check pci bridge ARI forwarding), SRIOV can not be enabled\n");
1220 return 0;
1221 }
1222
1223 /* verify igu is in normal mode */
1224 if (CHIP_INT_MODE_IS_BC(bp)) {
1225 BNX2X_ERR("IGU not normal mode, SRIOV can not be enabled\n");
1226 return 0;
1227 }
1228
1229 /* allocate the vfs database */
1230 bp->vfdb = kzalloc(sizeof(*(bp->vfdb)), GFP_KERNEL);
1231 if (!bp->vfdb) {
1232 BNX2X_ERR("failed to allocate vf database\n");
1233 err = -ENOMEM;
1234 goto failed;
1235 }
1236
1237 /* get the sriov info - Linux already collected all the pertinent
1238 * information, however the sriov structure is for the private use
1239 * of the pci module. Also we want this information regardless
1240 * of the hyper-visor.
1241 */
1242 iov = &(bp->vfdb->sriov);
1243 err = bnx2x_sriov_info(bp, iov);
1244 if (err)
1245 goto failed;
1246
1247 /* SR-IOV capability was enabled but there are no VFs*/
1248 if (iov->total == 0) {
1249 err = 0;
1250 goto failed;
1251 }
1252
1253 iov->nr_virtfn = min_t(u16, iov->total, num_vfs_param);
1254
1255 DP(BNX2X_MSG_IOV, "num_vfs_param was %d, nr_virtfn was %d\n",
1256 num_vfs_param, iov->nr_virtfn);
1257
1258 /* allocate the vf array */
1259 bp->vfdb->vfs = kzalloc(sizeof(struct bnx2x_virtf) *
1260 BNX2X_NR_VIRTFN(bp), GFP_KERNEL);
1261 if (!bp->vfdb->vfs) {
1262 BNX2X_ERR("failed to allocate vf array\n");
1263 err = -ENOMEM;
1264 goto failed;
1265 }
1266
1267 /* Initial VF init - index and abs_vfid - nr_virtfn must be set */
1268 for_each_vf(bp, i) {
1269 bnx2x_vf(bp, i, index) = i;
1270 bnx2x_vf(bp, i, abs_vfid) = iov->first_vf_in_pf + i;
1271 bnx2x_vf(bp, i, state) = VF_FREE;
1272 mutex_init(&bnx2x_vf(bp, i, op_mutex));
1273 bnx2x_vf(bp, i, op_current) = CHANNEL_TLV_NONE;
1274 }
1275
1276 /* re-read the IGU CAM for VFs - index and abs_vfid must be set */
1277 if (!bnx2x_get_vf_igu_cam_info(bp)) {
1278 BNX2X_ERR("No entries in IGU CAM for vfs\n");
1279 err = -EINVAL;
1280 goto failed;
1281 }
1282
1283 /* allocate the queue arrays for all VFs */
1284 bp->vfdb->vfqs = kzalloc(
1285 BNX2X_MAX_NUM_VF_QUEUES * sizeof(struct bnx2x_vf_queue),
1286 GFP_KERNEL);
1287
1288 if (!bp->vfdb->vfqs) {
1289 BNX2X_ERR("failed to allocate vf queue array\n");
1290 err = -ENOMEM;
1291 goto failed;
1292 }
1293
1294 /* Prepare the VFs event synchronization mechanism */
1295 mutex_init(&bp->vfdb->event_mutex);
1296
1297 mutex_init(&bp->vfdb->bulletin_mutex);
1298
1299 if (SHMEM2_HAS(bp, sriov_switch_mode))
1300 SHMEM2_WR(bp, sriov_switch_mode, SRIOV_SWITCH_MODE_VEB);
1301
1302 return 0;
1303 failed:
1304 DP(BNX2X_MSG_IOV, "Failed err=%d\n", err);
1305 __bnx2x_iov_free_vfdb(bp);
1306 return err;
1307 }
1308
bnx2x_iov_remove_one(struct bnx2x * bp)1309 void bnx2x_iov_remove_one(struct bnx2x *bp)
1310 {
1311 int vf_idx;
1312
1313 /* if SRIOV is not enabled there's nothing to do */
1314 if (!IS_SRIOV(bp))
1315 return;
1316
1317 bnx2x_disable_sriov(bp);
1318
1319 /* disable access to all VFs */
1320 for (vf_idx = 0; vf_idx < bp->vfdb->sriov.total; vf_idx++) {
1321 bnx2x_pretend_func(bp,
1322 HW_VF_HANDLE(bp,
1323 bp->vfdb->sriov.first_vf_in_pf +
1324 vf_idx));
1325 DP(BNX2X_MSG_IOV, "disabling internal access for vf %d\n",
1326 bp->vfdb->sriov.first_vf_in_pf + vf_idx);
1327 bnx2x_vf_enable_internal(bp, 0);
1328 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1329 }
1330
1331 /* free vf database */
1332 __bnx2x_iov_free_vfdb(bp);
1333 }
1334
bnx2x_iov_free_mem(struct bnx2x * bp)1335 void bnx2x_iov_free_mem(struct bnx2x *bp)
1336 {
1337 int i;
1338
1339 if (!IS_SRIOV(bp))
1340 return;
1341
1342 /* free vfs hw contexts */
1343 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1344 struct hw_dma *cxt = &bp->vfdb->context[i];
1345 BNX2X_PCI_FREE(cxt->addr, cxt->mapping, cxt->size);
1346 }
1347
1348 BNX2X_PCI_FREE(BP_VFDB(bp)->sp_dma.addr,
1349 BP_VFDB(bp)->sp_dma.mapping,
1350 BP_VFDB(bp)->sp_dma.size);
1351
1352 BNX2X_PCI_FREE(BP_VF_MBX_DMA(bp)->addr,
1353 BP_VF_MBX_DMA(bp)->mapping,
1354 BP_VF_MBX_DMA(bp)->size);
1355
1356 BNX2X_PCI_FREE(BP_VF_BULLETIN_DMA(bp)->addr,
1357 BP_VF_BULLETIN_DMA(bp)->mapping,
1358 BP_VF_BULLETIN_DMA(bp)->size);
1359 }
1360
bnx2x_iov_alloc_mem(struct bnx2x * bp)1361 int bnx2x_iov_alloc_mem(struct bnx2x *bp)
1362 {
1363 size_t tot_size;
1364 int i, rc = 0;
1365
1366 if (!IS_SRIOV(bp))
1367 return rc;
1368
1369 /* allocate vfs hw contexts */
1370 tot_size = (BP_VFDB(bp)->sriov.first_vf_in_pf + BNX2X_NR_VIRTFN(bp)) *
1371 BNX2X_CIDS_PER_VF * sizeof(union cdu_context);
1372
1373 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1374 struct hw_dma *cxt = BP_VF_CXT_PAGE(bp, i);
1375 cxt->size = min_t(size_t, tot_size, CDU_ILT_PAGE_SZ);
1376
1377 if (cxt->size) {
1378 cxt->addr = BNX2X_PCI_ALLOC(&cxt->mapping, cxt->size);
1379 if (!cxt->addr)
1380 goto alloc_mem_err;
1381 } else {
1382 cxt->addr = NULL;
1383 cxt->mapping = 0;
1384 }
1385 tot_size -= cxt->size;
1386 }
1387
1388 /* allocate vfs ramrods dma memory - client_init and set_mac */
1389 tot_size = BNX2X_NR_VIRTFN(bp) * sizeof(struct bnx2x_vf_sp);
1390 BP_VFDB(bp)->sp_dma.addr = BNX2X_PCI_ALLOC(&BP_VFDB(bp)->sp_dma.mapping,
1391 tot_size);
1392 if (!BP_VFDB(bp)->sp_dma.addr)
1393 goto alloc_mem_err;
1394 BP_VFDB(bp)->sp_dma.size = tot_size;
1395
1396 /* allocate mailboxes */
1397 tot_size = BNX2X_NR_VIRTFN(bp) * MBX_MSG_ALIGNED_SIZE;
1398 BP_VF_MBX_DMA(bp)->addr = BNX2X_PCI_ALLOC(&BP_VF_MBX_DMA(bp)->mapping,
1399 tot_size);
1400 if (!BP_VF_MBX_DMA(bp)->addr)
1401 goto alloc_mem_err;
1402
1403 BP_VF_MBX_DMA(bp)->size = tot_size;
1404
1405 /* allocate local bulletin boards */
1406 tot_size = BNX2X_NR_VIRTFN(bp) * BULLETIN_CONTENT_SIZE;
1407 BP_VF_BULLETIN_DMA(bp)->addr = BNX2X_PCI_ALLOC(&BP_VF_BULLETIN_DMA(bp)->mapping,
1408 tot_size);
1409 if (!BP_VF_BULLETIN_DMA(bp)->addr)
1410 goto alloc_mem_err;
1411
1412 BP_VF_BULLETIN_DMA(bp)->size = tot_size;
1413
1414 return 0;
1415
1416 alloc_mem_err:
1417 return -ENOMEM;
1418 }
1419
bnx2x_vfq_init(struct bnx2x * bp,struct bnx2x_virtf * vf,struct bnx2x_vf_queue * q)1420 static void bnx2x_vfq_init(struct bnx2x *bp, struct bnx2x_virtf *vf,
1421 struct bnx2x_vf_queue *q)
1422 {
1423 u8 cl_id = vfq_cl_id(vf, q);
1424 u8 func_id = FW_VF_HANDLE(vf->abs_vfid);
1425 unsigned long q_type = 0;
1426
1427 set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type);
1428 set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type);
1429
1430 /* Queue State object */
1431 bnx2x_init_queue_obj(bp, &q->sp_obj,
1432 cl_id, &q->cid, 1, func_id,
1433 bnx2x_vf_sp(bp, vf, q_data),
1434 bnx2x_vf_sp_map(bp, vf, q_data),
1435 q_type);
1436
1437 /* sp indication is set only when vlan/mac/etc. are initialized */
1438 q->sp_initialized = false;
1439
1440 DP(BNX2X_MSG_IOV,
1441 "initialized vf %d's queue object. func id set to %d. cid set to 0x%x\n",
1442 vf->abs_vfid, q->sp_obj.func_id, q->cid);
1443 }
1444
bnx2x_max_speed_cap(struct bnx2x * bp)1445 static int bnx2x_max_speed_cap(struct bnx2x *bp)
1446 {
1447 u32 supported = bp->port.supported[bnx2x_get_link_cfg_idx(bp)];
1448
1449 if (supported &
1450 (SUPPORTED_20000baseMLD2_Full | SUPPORTED_20000baseKR2_Full))
1451 return 20000;
1452
1453 return 10000; /* assume lowest supported speed is 10G */
1454 }
1455
bnx2x_iov_link_update_vf(struct bnx2x * bp,int idx)1456 int bnx2x_iov_link_update_vf(struct bnx2x *bp, int idx)
1457 {
1458 struct bnx2x_link_report_data *state = &bp->last_reported_link;
1459 struct pf_vf_bulletin_content *bulletin;
1460 struct bnx2x_virtf *vf;
1461 bool update = true;
1462 int rc = 0;
1463
1464 /* sanity and init */
1465 rc = bnx2x_vf_op_prep(bp, idx, &vf, &bulletin, false);
1466 if (rc)
1467 return rc;
1468
1469 mutex_lock(&bp->vfdb->bulletin_mutex);
1470
1471 if (vf->link_cfg == IFLA_VF_LINK_STATE_AUTO) {
1472 bulletin->valid_bitmap |= 1 << LINK_VALID;
1473
1474 bulletin->link_speed = state->line_speed;
1475 bulletin->link_flags = 0;
1476 if (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1477 &state->link_report_flags))
1478 bulletin->link_flags |= VFPF_LINK_REPORT_LINK_DOWN;
1479 if (test_bit(BNX2X_LINK_REPORT_FD,
1480 &state->link_report_flags))
1481 bulletin->link_flags |= VFPF_LINK_REPORT_FULL_DUPLEX;
1482 if (test_bit(BNX2X_LINK_REPORT_RX_FC_ON,
1483 &state->link_report_flags))
1484 bulletin->link_flags |= VFPF_LINK_REPORT_RX_FC_ON;
1485 if (test_bit(BNX2X_LINK_REPORT_TX_FC_ON,
1486 &state->link_report_flags))
1487 bulletin->link_flags |= VFPF_LINK_REPORT_TX_FC_ON;
1488 } else if (vf->link_cfg == IFLA_VF_LINK_STATE_DISABLE &&
1489 !(bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)) {
1490 bulletin->valid_bitmap |= 1 << LINK_VALID;
1491 bulletin->link_flags |= VFPF_LINK_REPORT_LINK_DOWN;
1492 } else if (vf->link_cfg == IFLA_VF_LINK_STATE_ENABLE &&
1493 (bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)) {
1494 bulletin->valid_bitmap |= 1 << LINK_VALID;
1495 bulletin->link_speed = bnx2x_max_speed_cap(bp);
1496 bulletin->link_flags &= ~VFPF_LINK_REPORT_LINK_DOWN;
1497 } else {
1498 update = false;
1499 }
1500
1501 if (update) {
1502 DP(NETIF_MSG_LINK | BNX2X_MSG_IOV,
1503 "vf %d mode %u speed %d flags %x\n", idx,
1504 vf->link_cfg, bulletin->link_speed, bulletin->link_flags);
1505
1506 /* Post update on VF's bulletin board */
1507 rc = bnx2x_post_vf_bulletin(bp, idx);
1508 if (rc) {
1509 BNX2X_ERR("failed to update VF[%d] bulletin\n", idx);
1510 goto out;
1511 }
1512 }
1513
1514 out:
1515 mutex_unlock(&bp->vfdb->bulletin_mutex);
1516 return rc;
1517 }
1518
bnx2x_set_vf_link_state(struct net_device * dev,int idx,int link_state)1519 int bnx2x_set_vf_link_state(struct net_device *dev, int idx, int link_state)
1520 {
1521 struct bnx2x *bp = netdev_priv(dev);
1522 struct bnx2x_virtf *vf = BP_VF(bp, idx);
1523
1524 if (!vf)
1525 return -EINVAL;
1526
1527 if (vf->link_cfg == link_state)
1528 return 0; /* nothing todo */
1529
1530 vf->link_cfg = link_state;
1531
1532 return bnx2x_iov_link_update_vf(bp, idx);
1533 }
1534
bnx2x_iov_link_update(struct bnx2x * bp)1535 void bnx2x_iov_link_update(struct bnx2x *bp)
1536 {
1537 int vfid;
1538
1539 if (!IS_SRIOV(bp))
1540 return;
1541
1542 for_each_vf(bp, vfid)
1543 bnx2x_iov_link_update_vf(bp, vfid);
1544 }
1545
1546 /* called by bnx2x_nic_load */
bnx2x_iov_nic_init(struct bnx2x * bp)1547 int bnx2x_iov_nic_init(struct bnx2x *bp)
1548 {
1549 int vfid;
1550
1551 if (!IS_SRIOV(bp)) {
1552 DP(BNX2X_MSG_IOV, "vfdb was not allocated\n");
1553 return 0;
1554 }
1555
1556 DP(BNX2X_MSG_IOV, "num of vfs: %d\n", (bp)->vfdb->sriov.nr_virtfn);
1557
1558 /* let FLR complete ... */
1559 msleep(100);
1560
1561 /* initialize vf database */
1562 for_each_vf(bp, vfid) {
1563 struct bnx2x_virtf *vf = BP_VF(bp, vfid);
1564
1565 int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vfid) *
1566 BNX2X_CIDS_PER_VF;
1567
1568 union cdu_context *base_cxt = (union cdu_context *)
1569 BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
1570 (base_vf_cid & (ILT_PAGE_CIDS-1));
1571
1572 DP(BNX2X_MSG_IOV,
1573 "VF[%d] Max IGU SBs: %d, base vf cid 0x%x, base cid 0x%x, base cxt %p\n",
1574 vf->abs_vfid, vf_sb_count(vf), base_vf_cid,
1575 BNX2X_FIRST_VF_CID + base_vf_cid, base_cxt);
1576
1577 /* init statically provisioned resources */
1578 bnx2x_iov_static_resc(bp, vf);
1579
1580 /* queues are initialized during VF-ACQUIRE */
1581 vf->filter_state = 0;
1582 vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id);
1583
1584 bnx2x_init_credit_pool(&vf->vf_vlans_pool, 0,
1585 vf_vlan_rules_cnt(vf));
1586 bnx2x_init_credit_pool(&vf->vf_macs_pool, 0,
1587 vf_mac_rules_cnt(vf));
1588
1589 /* init mcast object - This object will be re-initialized
1590 * during VF-ACQUIRE with the proper cl_id and cid.
1591 * It needs to be initialized here so that it can be safely
1592 * handled by a subsequent FLR flow.
1593 */
1594 vf->mcast_list_len = 0;
1595 bnx2x_init_mcast_obj(bp, &vf->mcast_obj, 0xFF,
1596 0xFF, 0xFF, 0xFF,
1597 bnx2x_vf_sp(bp, vf, mcast_rdata),
1598 bnx2x_vf_sp_map(bp, vf, mcast_rdata),
1599 BNX2X_FILTER_MCAST_PENDING,
1600 &vf->filter_state,
1601 BNX2X_OBJ_TYPE_RX_TX);
1602
1603 /* set the mailbox message addresses */
1604 BP_VF_MBX(bp, vfid)->msg = (struct bnx2x_vf_mbx_msg *)
1605 (((u8 *)BP_VF_MBX_DMA(bp)->addr) + vfid *
1606 MBX_MSG_ALIGNED_SIZE);
1607
1608 BP_VF_MBX(bp, vfid)->msg_mapping = BP_VF_MBX_DMA(bp)->mapping +
1609 vfid * MBX_MSG_ALIGNED_SIZE;
1610
1611 /* Enable vf mailbox */
1612 bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
1613 }
1614
1615 /* Final VF init */
1616 for_each_vf(bp, vfid) {
1617 struct bnx2x_virtf *vf = BP_VF(bp, vfid);
1618
1619 /* fill in the BDF and bars */
1620 vf->bus = bnx2x_vf_bus(bp, vfid);
1621 vf->devfn = bnx2x_vf_devfn(bp, vfid);
1622 bnx2x_vf_set_bars(bp, vf);
1623
1624 DP(BNX2X_MSG_IOV,
1625 "VF info[%d]: bus 0x%x, devfn 0x%x, bar0 [0x%x, %d], bar1 [0x%x, %d], bar2 [0x%x, %d]\n",
1626 vf->abs_vfid, vf->bus, vf->devfn,
1627 (unsigned)vf->bars[0].bar, vf->bars[0].size,
1628 (unsigned)vf->bars[1].bar, vf->bars[1].size,
1629 (unsigned)vf->bars[2].bar, vf->bars[2].size);
1630 }
1631
1632 return 0;
1633 }
1634
1635 /* called by bnx2x_chip_cleanup */
bnx2x_iov_chip_cleanup(struct bnx2x * bp)1636 int bnx2x_iov_chip_cleanup(struct bnx2x *bp)
1637 {
1638 int i;
1639
1640 if (!IS_SRIOV(bp))
1641 return 0;
1642
1643 /* release all the VFs */
1644 for_each_vf(bp, i)
1645 bnx2x_vf_release(bp, BP_VF(bp, i));
1646
1647 return 0;
1648 }
1649
1650 /* called by bnx2x_init_hw_func, returns the next ilt line */
bnx2x_iov_init_ilt(struct bnx2x * bp,u16 line)1651 int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line)
1652 {
1653 int i;
1654 struct bnx2x_ilt *ilt = BP_ILT(bp);
1655
1656 if (!IS_SRIOV(bp))
1657 return line;
1658
1659 /* set vfs ilt lines */
1660 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1661 struct hw_dma *hw_cxt = BP_VF_CXT_PAGE(bp, i);
1662
1663 ilt->lines[line+i].page = hw_cxt->addr;
1664 ilt->lines[line+i].page_mapping = hw_cxt->mapping;
1665 ilt->lines[line+i].size = hw_cxt->size; /* doesn't matter */
1666 }
1667 return line + i;
1668 }
1669
bnx2x_iov_is_vf_cid(struct bnx2x * bp,u16 cid)1670 static u8 bnx2x_iov_is_vf_cid(struct bnx2x *bp, u16 cid)
1671 {
1672 return ((cid >= BNX2X_FIRST_VF_CID) &&
1673 ((cid - BNX2X_FIRST_VF_CID) < BNX2X_VF_CIDS));
1674 }
1675
1676 static
bnx2x_vf_handle_classification_eqe(struct bnx2x * bp,struct bnx2x_vf_queue * vfq,union event_ring_elem * elem)1677 void bnx2x_vf_handle_classification_eqe(struct bnx2x *bp,
1678 struct bnx2x_vf_queue *vfq,
1679 union event_ring_elem *elem)
1680 {
1681 unsigned long ramrod_flags = 0;
1682 int rc = 0;
1683
1684 /* Always push next commands out, don't wait here */
1685 set_bit(RAMROD_CONT, &ramrod_flags);
1686
1687 switch (elem->message.data.eth_event.echo >> BNX2X_SWCID_SHIFT) {
1688 case BNX2X_FILTER_MAC_PENDING:
1689 rc = vfq->mac_obj.complete(bp, &vfq->mac_obj, elem,
1690 &ramrod_flags);
1691 break;
1692 case BNX2X_FILTER_VLAN_PENDING:
1693 rc = vfq->vlan_obj.complete(bp, &vfq->vlan_obj, elem,
1694 &ramrod_flags);
1695 break;
1696 default:
1697 BNX2X_ERR("Unsupported classification command: %d\n",
1698 elem->message.data.eth_event.echo);
1699 return;
1700 }
1701 if (rc < 0)
1702 BNX2X_ERR("Failed to schedule new commands: %d\n", rc);
1703 else if (rc > 0)
1704 DP(BNX2X_MSG_IOV, "Scheduled next pending commands...\n");
1705 }
1706
1707 static
bnx2x_vf_handle_mcast_eqe(struct bnx2x * bp,struct bnx2x_virtf * vf)1708 void bnx2x_vf_handle_mcast_eqe(struct bnx2x *bp,
1709 struct bnx2x_virtf *vf)
1710 {
1711 struct bnx2x_mcast_ramrod_params rparam = {NULL};
1712 int rc;
1713
1714 rparam.mcast_obj = &vf->mcast_obj;
1715 vf->mcast_obj.raw.clear_pending(&vf->mcast_obj.raw);
1716
1717 /* If there are pending mcast commands - send them */
1718 if (vf->mcast_obj.check_pending(&vf->mcast_obj)) {
1719 rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
1720 if (rc < 0)
1721 BNX2X_ERR("Failed to send pending mcast commands: %d\n",
1722 rc);
1723 }
1724 }
1725
1726 static
bnx2x_vf_handle_filters_eqe(struct bnx2x * bp,struct bnx2x_virtf * vf)1727 void bnx2x_vf_handle_filters_eqe(struct bnx2x *bp,
1728 struct bnx2x_virtf *vf)
1729 {
1730 smp_mb__before_atomic();
1731 clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
1732 smp_mb__after_atomic();
1733 }
1734
bnx2x_vf_handle_rss_update_eqe(struct bnx2x * bp,struct bnx2x_virtf * vf)1735 static void bnx2x_vf_handle_rss_update_eqe(struct bnx2x *bp,
1736 struct bnx2x_virtf *vf)
1737 {
1738 vf->rss_conf_obj.raw.clear_pending(&vf->rss_conf_obj.raw);
1739 }
1740
bnx2x_iov_eq_sp_event(struct bnx2x * bp,union event_ring_elem * elem)1741 int bnx2x_iov_eq_sp_event(struct bnx2x *bp, union event_ring_elem *elem)
1742 {
1743 struct bnx2x_virtf *vf;
1744 int qidx = 0, abs_vfid;
1745 u8 opcode;
1746 u16 cid = 0xffff;
1747
1748 if (!IS_SRIOV(bp))
1749 return 1;
1750
1751 /* first get the cid - the only events we handle here are cfc-delete
1752 * and set-mac completion
1753 */
1754 opcode = elem->message.opcode;
1755
1756 switch (opcode) {
1757 case EVENT_RING_OPCODE_CFC_DEL:
1758 cid = SW_CID((__force __le32)
1759 elem->message.data.cfc_del_event.cid);
1760 DP(BNX2X_MSG_IOV, "checking cfc-del comp cid=%d\n", cid);
1761 break;
1762 case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
1763 case EVENT_RING_OPCODE_MULTICAST_RULES:
1764 case EVENT_RING_OPCODE_FILTERS_RULES:
1765 case EVENT_RING_OPCODE_RSS_UPDATE_RULES:
1766 cid = (elem->message.data.eth_event.echo &
1767 BNX2X_SWCID_MASK);
1768 DP(BNX2X_MSG_IOV, "checking filtering comp cid=%d\n", cid);
1769 break;
1770 case EVENT_RING_OPCODE_VF_FLR:
1771 abs_vfid = elem->message.data.vf_flr_event.vf_id;
1772 DP(BNX2X_MSG_IOV, "Got VF FLR notification abs_vfid=%d\n",
1773 abs_vfid);
1774 goto get_vf;
1775 case EVENT_RING_OPCODE_MALICIOUS_VF:
1776 abs_vfid = elem->message.data.malicious_vf_event.vf_id;
1777 BNX2X_ERR("Got VF MALICIOUS notification abs_vfid=%d err_id=0x%x\n",
1778 abs_vfid,
1779 elem->message.data.malicious_vf_event.err_id);
1780 goto get_vf;
1781 default:
1782 return 1;
1783 }
1784
1785 /* check if the cid is the VF range */
1786 if (!bnx2x_iov_is_vf_cid(bp, cid)) {
1787 DP(BNX2X_MSG_IOV, "cid is outside vf range: %d\n", cid);
1788 return 1;
1789 }
1790
1791 /* extract vf and rxq index from vf_cid - relies on the following:
1792 * 1. vfid on cid reflects the true abs_vfid
1793 * 2. The max number of VFs (per path) is 64
1794 */
1795 qidx = cid & ((1 << BNX2X_VF_CID_WND)-1);
1796 abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
1797 get_vf:
1798 vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
1799
1800 if (!vf) {
1801 BNX2X_ERR("EQ completion for unknown VF, cid %d, abs_vfid %d\n",
1802 cid, abs_vfid);
1803 return 0;
1804 }
1805
1806 switch (opcode) {
1807 case EVENT_RING_OPCODE_CFC_DEL:
1808 DP(BNX2X_MSG_IOV, "got VF [%d:%d] cfc delete ramrod\n",
1809 vf->abs_vfid, qidx);
1810 vfq_get(vf, qidx)->sp_obj.complete_cmd(bp,
1811 &vfq_get(vf,
1812 qidx)->sp_obj,
1813 BNX2X_Q_CMD_CFC_DEL);
1814 break;
1815 case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
1816 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mac/vlan ramrod\n",
1817 vf->abs_vfid, qidx);
1818 bnx2x_vf_handle_classification_eqe(bp, vfq_get(vf, qidx), elem);
1819 break;
1820 case EVENT_RING_OPCODE_MULTICAST_RULES:
1821 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mcast ramrod\n",
1822 vf->abs_vfid, qidx);
1823 bnx2x_vf_handle_mcast_eqe(bp, vf);
1824 break;
1825 case EVENT_RING_OPCODE_FILTERS_RULES:
1826 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set rx-mode ramrod\n",
1827 vf->abs_vfid, qidx);
1828 bnx2x_vf_handle_filters_eqe(bp, vf);
1829 break;
1830 case EVENT_RING_OPCODE_RSS_UPDATE_RULES:
1831 DP(BNX2X_MSG_IOV, "got VF [%d:%d] RSS update ramrod\n",
1832 vf->abs_vfid, qidx);
1833 bnx2x_vf_handle_rss_update_eqe(bp, vf);
1834 case EVENT_RING_OPCODE_VF_FLR:
1835 case EVENT_RING_OPCODE_MALICIOUS_VF:
1836 /* Do nothing for now */
1837 return 0;
1838 }
1839
1840 return 0;
1841 }
1842
bnx2x_vf_by_cid(struct bnx2x * bp,int vf_cid)1843 static struct bnx2x_virtf *bnx2x_vf_by_cid(struct bnx2x *bp, int vf_cid)
1844 {
1845 /* extract the vf from vf_cid - relies on the following:
1846 * 1. vfid on cid reflects the true abs_vfid
1847 * 2. The max number of VFs (per path) is 64
1848 */
1849 int abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
1850 return bnx2x_vf_by_abs_fid(bp, abs_vfid);
1851 }
1852
bnx2x_iov_set_queue_sp_obj(struct bnx2x * bp,int vf_cid,struct bnx2x_queue_sp_obj ** q_obj)1853 void bnx2x_iov_set_queue_sp_obj(struct bnx2x *bp, int vf_cid,
1854 struct bnx2x_queue_sp_obj **q_obj)
1855 {
1856 struct bnx2x_virtf *vf;
1857
1858 if (!IS_SRIOV(bp))
1859 return;
1860
1861 vf = bnx2x_vf_by_cid(bp, vf_cid);
1862
1863 if (vf) {
1864 /* extract queue index from vf_cid - relies on the following:
1865 * 1. vfid on cid reflects the true abs_vfid
1866 * 2. The max number of VFs (per path) is 64
1867 */
1868 int q_index = vf_cid & ((1 << BNX2X_VF_CID_WND)-1);
1869 *q_obj = &bnx2x_vfq(vf, q_index, sp_obj);
1870 } else {
1871 BNX2X_ERR("No vf matching cid %d\n", vf_cid);
1872 }
1873 }
1874
bnx2x_iov_adjust_stats_req(struct bnx2x * bp)1875 void bnx2x_iov_adjust_stats_req(struct bnx2x *bp)
1876 {
1877 int i;
1878 int first_queue_query_index, num_queues_req;
1879 dma_addr_t cur_data_offset;
1880 struct stats_query_entry *cur_query_entry;
1881 u8 stats_count = 0;
1882 bool is_fcoe = false;
1883
1884 if (!IS_SRIOV(bp))
1885 return;
1886
1887 if (!NO_FCOE(bp))
1888 is_fcoe = true;
1889
1890 /* fcoe adds one global request and one queue request */
1891 num_queues_req = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe;
1892 first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX -
1893 (is_fcoe ? 0 : 1);
1894
1895 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1896 "BNX2X_NUM_ETH_QUEUES %d, is_fcoe %d, first_queue_query_index %d => determined the last non virtual statistics query index is %d. Will add queries on top of that\n",
1897 BNX2X_NUM_ETH_QUEUES(bp), is_fcoe, first_queue_query_index,
1898 first_queue_query_index + num_queues_req);
1899
1900 cur_data_offset = bp->fw_stats_data_mapping +
1901 offsetof(struct bnx2x_fw_stats_data, queue_stats) +
1902 num_queues_req * sizeof(struct per_queue_stats);
1903
1904 cur_query_entry = &bp->fw_stats_req->
1905 query[first_queue_query_index + num_queues_req];
1906
1907 for_each_vf(bp, i) {
1908 int j;
1909 struct bnx2x_virtf *vf = BP_VF(bp, i);
1910
1911 if (vf->state != VF_ENABLED) {
1912 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1913 "vf %d not enabled so no stats for it\n",
1914 vf->abs_vfid);
1915 continue;
1916 }
1917
1918 DP(BNX2X_MSG_IOV, "add addresses for vf %d\n", vf->abs_vfid);
1919 for_each_vfq(vf, j) {
1920 struct bnx2x_vf_queue *rxq = vfq_get(vf, j);
1921
1922 dma_addr_t q_stats_addr =
1923 vf->fw_stat_map + j * vf->stats_stride;
1924
1925 /* collect stats fro active queues only */
1926 if (bnx2x_get_q_logical_state(bp, &rxq->sp_obj) ==
1927 BNX2X_Q_LOGICAL_STATE_STOPPED)
1928 continue;
1929
1930 /* create stats query entry for this queue */
1931 cur_query_entry->kind = STATS_TYPE_QUEUE;
1932 cur_query_entry->index = vfq_stat_id(vf, rxq);
1933 cur_query_entry->funcID =
1934 cpu_to_le16(FW_VF_HANDLE(vf->abs_vfid));
1935 cur_query_entry->address.hi =
1936 cpu_to_le32(U64_HI(q_stats_addr));
1937 cur_query_entry->address.lo =
1938 cpu_to_le32(U64_LO(q_stats_addr));
1939 DP(BNX2X_MSG_IOV,
1940 "added address %x %x for vf %d queue %d client %d\n",
1941 cur_query_entry->address.hi,
1942 cur_query_entry->address.lo, cur_query_entry->funcID,
1943 j, cur_query_entry->index);
1944 cur_query_entry++;
1945 cur_data_offset += sizeof(struct per_queue_stats);
1946 stats_count++;
1947
1948 /* all stats are coalesced to the leading queue */
1949 if (vf->cfg_flags & VF_CFG_STATS_COALESCE)
1950 break;
1951 }
1952 }
1953 bp->fw_stats_req->hdr.cmd_num = bp->fw_stats_num + stats_count;
1954 }
1955
1956 /* VF API helpers */
bnx2x_vf_qtbl_set_q(struct bnx2x * bp,u8 abs_vfid,u8 qid,u8 enable)1957 static void bnx2x_vf_qtbl_set_q(struct bnx2x *bp, u8 abs_vfid, u8 qid,
1958 u8 enable)
1959 {
1960 u32 reg = PXP_REG_HST_ZONE_PERMISSION_TABLE + qid * 4;
1961 u32 val = enable ? (abs_vfid | (1 << 6)) : 0;
1962
1963 REG_WR(bp, reg, val);
1964 }
1965
bnx2x_vf_clr_qtbl(struct bnx2x * bp,struct bnx2x_virtf * vf)1966 static void bnx2x_vf_clr_qtbl(struct bnx2x *bp, struct bnx2x_virtf *vf)
1967 {
1968 int i;
1969
1970 for_each_vfq(vf, i)
1971 bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
1972 vfq_qzone_id(vf, vfq_get(vf, i)), false);
1973 }
1974
bnx2x_vf_igu_disable(struct bnx2x * bp,struct bnx2x_virtf * vf)1975 static void bnx2x_vf_igu_disable(struct bnx2x *bp, struct bnx2x_virtf *vf)
1976 {
1977 u32 val;
1978
1979 /* clear the VF configuration - pretend */
1980 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
1981 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
1982 val &= ~(IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN |
1983 IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK);
1984 REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
1985 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1986 }
1987
bnx2x_vf_max_queue_cnt(struct bnx2x * bp,struct bnx2x_virtf * vf)1988 u8 bnx2x_vf_max_queue_cnt(struct bnx2x *bp, struct bnx2x_virtf *vf)
1989 {
1990 return min_t(u8, min_t(u8, vf_sb_count(vf), BNX2X_CIDS_PER_VF),
1991 BNX2X_VF_MAX_QUEUES);
1992 }
1993
1994 static
bnx2x_vf_chk_avail_resc(struct bnx2x * bp,struct bnx2x_virtf * vf,struct vf_pf_resc_request * req_resc)1995 int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf,
1996 struct vf_pf_resc_request *req_resc)
1997 {
1998 u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
1999 u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
2000
2001 return ((req_resc->num_rxqs <= rxq_cnt) &&
2002 (req_resc->num_txqs <= txq_cnt) &&
2003 (req_resc->num_sbs <= vf_sb_count(vf)) &&
2004 (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) &&
2005 (req_resc->num_vlan_filters <= vf_vlan_rules_cnt(vf)));
2006 }
2007
2008 /* CORE VF API */
bnx2x_vf_acquire(struct bnx2x * bp,struct bnx2x_virtf * vf,struct vf_pf_resc_request * resc)2009 int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf,
2010 struct vf_pf_resc_request *resc)
2011 {
2012 int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vf->index) *
2013 BNX2X_CIDS_PER_VF;
2014
2015 union cdu_context *base_cxt = (union cdu_context *)
2016 BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
2017 (base_vf_cid & (ILT_PAGE_CIDS-1));
2018 int i;
2019
2020 /* if state is 'acquired' the VF was not released or FLR'd, in
2021 * this case the returned resources match the acquired already
2022 * acquired resources. Verify that the requested numbers do
2023 * not exceed the already acquired numbers.
2024 */
2025 if (vf->state == VF_ACQUIRED) {
2026 DP(BNX2X_MSG_IOV, "VF[%d] Trying to re-acquire resources (VF was not released or FLR'd)\n",
2027 vf->abs_vfid);
2028
2029 if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2030 BNX2X_ERR("VF[%d] When re-acquiring resources, requested numbers must be <= then previously acquired numbers\n",
2031 vf->abs_vfid);
2032 return -EINVAL;
2033 }
2034 return 0;
2035 }
2036
2037 /* Otherwise vf state must be 'free' or 'reset' */
2038 if (vf->state != VF_FREE && vf->state != VF_RESET) {
2039 BNX2X_ERR("VF[%d] Can not acquire a VF with state %d\n",
2040 vf->abs_vfid, vf->state);
2041 return -EINVAL;
2042 }
2043
2044 /* static allocation:
2045 * the global maximum number are fixed per VF. Fail the request if
2046 * requested number exceed these globals
2047 */
2048 if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2049 DP(BNX2X_MSG_IOV,
2050 "cannot fulfill vf resource request. Placing maximal available values in response\n");
2051 /* set the max resource in the vf */
2052 return -ENOMEM;
2053 }
2054
2055 /* Set resources counters - 0 request means max available */
2056 vf_sb_count(vf) = resc->num_sbs;
2057 vf_rxq_count(vf) = resc->num_rxqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2058 vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2059
2060 DP(BNX2X_MSG_IOV,
2061 "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n",
2062 vf_sb_count(vf), vf_rxq_count(vf),
2063 vf_txq_count(vf), vf_mac_rules_cnt(vf),
2064 vf_vlan_rules_cnt(vf));
2065
2066 /* Initialize the queues */
2067 if (!vf->vfqs) {
2068 DP(BNX2X_MSG_IOV, "vf->vfqs was not allocated\n");
2069 return -EINVAL;
2070 }
2071
2072 for_each_vfq(vf, i) {
2073 struct bnx2x_vf_queue *q = vfq_get(vf, i);
2074
2075 if (!q) {
2076 BNX2X_ERR("q number %d was not allocated\n", i);
2077 return -EINVAL;
2078 }
2079
2080 q->index = i;
2081 q->cxt = &((base_cxt + i)->eth);
2082 q->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i;
2083
2084 DP(BNX2X_MSG_IOV, "VFQ[%d:%d]: index %d, cid 0x%x, cxt %p\n",
2085 vf->abs_vfid, i, q->index, q->cid, q->cxt);
2086
2087 /* init SP objects */
2088 bnx2x_vfq_init(bp, vf, q);
2089 }
2090 vf->state = VF_ACQUIRED;
2091 return 0;
2092 }
2093
bnx2x_vf_init(struct bnx2x * bp,struct bnx2x_virtf * vf,dma_addr_t * sb_map)2094 int bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, dma_addr_t *sb_map)
2095 {
2096 struct bnx2x_func_init_params func_init = {0};
2097 int i;
2098
2099 /* the sb resources are initialized at this point, do the
2100 * FW/HW initializations
2101 */
2102 for_each_vf_sb(vf, i)
2103 bnx2x_init_sb(bp, (dma_addr_t)sb_map[i], vf->abs_vfid, true,
2104 vf_igu_sb(vf, i), vf_igu_sb(vf, i));
2105
2106 /* Sanity checks */
2107 if (vf->state != VF_ACQUIRED) {
2108 DP(BNX2X_MSG_IOV, "VF[%d] is not in VF_ACQUIRED, but %d\n",
2109 vf->abs_vfid, vf->state);
2110 return -EINVAL;
2111 }
2112
2113 /* let FLR complete ... */
2114 msleep(100);
2115
2116 /* FLR cleanup epilogue */
2117 if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid))
2118 return -EBUSY;
2119
2120 /* reset IGU VF statistics: MSIX */
2121 REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + vf->abs_vfid * 4 , 0);
2122
2123 /* function setup */
2124 func_init.pf_id = BP_FUNC(bp);
2125 func_init.func_id = FW_VF_HANDLE(vf->abs_vfid);
2126 bnx2x_func_init(bp, &func_init);
2127
2128 /* Enable the vf */
2129 bnx2x_vf_enable_access(bp, vf->abs_vfid);
2130 bnx2x_vf_enable_traffic(bp, vf);
2131
2132 /* queue protection table */
2133 for_each_vfq(vf, i)
2134 bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
2135 vfq_qzone_id(vf, vfq_get(vf, i)), true);
2136
2137 vf->state = VF_ENABLED;
2138
2139 /* update vf bulletin board */
2140 bnx2x_post_vf_bulletin(bp, vf->index);
2141
2142 return 0;
2143 }
2144
2145 struct set_vf_state_cookie {
2146 struct bnx2x_virtf *vf;
2147 u8 state;
2148 };
2149
bnx2x_set_vf_state(void * cookie)2150 static void bnx2x_set_vf_state(void *cookie)
2151 {
2152 struct set_vf_state_cookie *p = (struct set_vf_state_cookie *)cookie;
2153
2154 p->vf->state = p->state;
2155 }
2156
bnx2x_vf_close(struct bnx2x * bp,struct bnx2x_virtf * vf)2157 int bnx2x_vf_close(struct bnx2x *bp, struct bnx2x_virtf *vf)
2158 {
2159 int rc = 0, i;
2160
2161 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2162
2163 /* Close all queues */
2164 for (i = 0; i < vf_rxq_count(vf); i++) {
2165 rc = bnx2x_vf_queue_teardown(bp, vf, i);
2166 if (rc)
2167 goto op_err;
2168 }
2169
2170 /* disable the interrupts */
2171 DP(BNX2X_MSG_IOV, "disabling igu\n");
2172 bnx2x_vf_igu_disable(bp, vf);
2173
2174 /* disable the VF */
2175 DP(BNX2X_MSG_IOV, "clearing qtbl\n");
2176 bnx2x_vf_clr_qtbl(bp, vf);
2177
2178 /* need to make sure there are no outstanding stats ramrods which may
2179 * cause the device to access the VF's stats buffer which it will free
2180 * as soon as we return from the close flow.
2181 */
2182 {
2183 struct set_vf_state_cookie cookie;
2184
2185 cookie.vf = vf;
2186 cookie.state = VF_ACQUIRED;
2187 rc = bnx2x_stats_safe_exec(bp, bnx2x_set_vf_state, &cookie);
2188 if (rc)
2189 goto op_err;
2190 }
2191
2192 DP(BNX2X_MSG_IOV, "set state to acquired\n");
2193
2194 return 0;
2195 op_err:
2196 BNX2X_ERR("vf[%d] CLOSE error: rc %d\n", vf->abs_vfid, rc);
2197 return rc;
2198 }
2199
2200 /* VF release can be called either: 1. The VF was acquired but
2201 * not enabled 2. the vf was enabled or in the process of being
2202 * enabled
2203 */
bnx2x_vf_free(struct bnx2x * bp,struct bnx2x_virtf * vf)2204 int bnx2x_vf_free(struct bnx2x *bp, struct bnx2x_virtf *vf)
2205 {
2206 int rc;
2207
2208 DP(BNX2X_MSG_IOV, "VF[%d] STATE: %s\n", vf->abs_vfid,
2209 vf->state == VF_FREE ? "Free" :
2210 vf->state == VF_ACQUIRED ? "Acquired" :
2211 vf->state == VF_ENABLED ? "Enabled" :
2212 vf->state == VF_RESET ? "Reset" :
2213 "Unknown");
2214
2215 switch (vf->state) {
2216 case VF_ENABLED:
2217 rc = bnx2x_vf_close(bp, vf);
2218 if (rc)
2219 goto op_err;
2220 /* Fallthrough to release resources */
2221 case VF_ACQUIRED:
2222 DP(BNX2X_MSG_IOV, "about to free resources\n");
2223 bnx2x_vf_free_resc(bp, vf);
2224 break;
2225
2226 case VF_FREE:
2227 case VF_RESET:
2228 default:
2229 break;
2230 }
2231 return 0;
2232 op_err:
2233 BNX2X_ERR("VF[%d] RELEASE error: rc %d\n", vf->abs_vfid, rc);
2234 return rc;
2235 }
2236
bnx2x_vf_rss_update(struct bnx2x * bp,struct bnx2x_virtf * vf,struct bnx2x_config_rss_params * rss)2237 int bnx2x_vf_rss_update(struct bnx2x *bp, struct bnx2x_virtf *vf,
2238 struct bnx2x_config_rss_params *rss)
2239 {
2240 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2241 set_bit(RAMROD_COMP_WAIT, &rss->ramrod_flags);
2242 return bnx2x_config_rss(bp, rss);
2243 }
2244
bnx2x_vf_tpa_update(struct bnx2x * bp,struct bnx2x_virtf * vf,struct vfpf_tpa_tlv * tlv,struct bnx2x_queue_update_tpa_params * params)2245 int bnx2x_vf_tpa_update(struct bnx2x *bp, struct bnx2x_virtf *vf,
2246 struct vfpf_tpa_tlv *tlv,
2247 struct bnx2x_queue_update_tpa_params *params)
2248 {
2249 aligned_u64 *sge_addr = tlv->tpa_client_info.sge_addr;
2250 struct bnx2x_queue_state_params qstate;
2251 int qid, rc = 0;
2252
2253 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2254
2255 /* Set ramrod params */
2256 memset(&qstate, 0, sizeof(struct bnx2x_queue_state_params));
2257 memcpy(&qstate.params.update_tpa, params,
2258 sizeof(struct bnx2x_queue_update_tpa_params));
2259 qstate.cmd = BNX2X_Q_CMD_UPDATE_TPA;
2260 set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags);
2261
2262 for (qid = 0; qid < vf_rxq_count(vf); qid++) {
2263 qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
2264 qstate.params.update_tpa.sge_map = sge_addr[qid];
2265 DP(BNX2X_MSG_IOV, "sge_addr[%d:%d] %08x:%08x\n",
2266 vf->abs_vfid, qid, U64_HI(sge_addr[qid]),
2267 U64_LO(sge_addr[qid]));
2268 rc = bnx2x_queue_state_change(bp, &qstate);
2269 if (rc) {
2270 BNX2X_ERR("Failed to configure sge_addr %08x:%08x for [%d:%d]\n",
2271 U64_HI(sge_addr[qid]), U64_LO(sge_addr[qid]),
2272 vf->abs_vfid, qid);
2273 return rc;
2274 }
2275 }
2276
2277 return rc;
2278 }
2279
2280 /* VF release ~ VF close + VF release-resources
2281 * Release is the ultimate SW shutdown and is called whenever an
2282 * irrecoverable error is encountered.
2283 */
bnx2x_vf_release(struct bnx2x * bp,struct bnx2x_virtf * vf)2284 int bnx2x_vf_release(struct bnx2x *bp, struct bnx2x_virtf *vf)
2285 {
2286 int rc;
2287
2288 DP(BNX2X_MSG_IOV, "PF releasing vf %d\n", vf->abs_vfid);
2289 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
2290
2291 rc = bnx2x_vf_free(bp, vf);
2292 if (rc)
2293 WARN(rc,
2294 "VF[%d] Failed to allocate resources for release op- rc=%d\n",
2295 vf->abs_vfid, rc);
2296 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
2297 return rc;
2298 }
2299
bnx2x_lock_vf_pf_channel(struct bnx2x * bp,struct bnx2x_virtf * vf,enum channel_tlvs tlv)2300 void bnx2x_lock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
2301 enum channel_tlvs tlv)
2302 {
2303 /* we don't lock the channel for unsupported tlvs */
2304 if (!bnx2x_tlv_supported(tlv)) {
2305 BNX2X_ERR("attempting to lock with unsupported tlv. Aborting\n");
2306 return;
2307 }
2308
2309 /* lock the channel */
2310 mutex_lock(&vf->op_mutex);
2311
2312 /* record the locking op */
2313 vf->op_current = tlv;
2314
2315 /* log the lock */
2316 DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel locked by %d\n",
2317 vf->abs_vfid, tlv);
2318 }
2319
bnx2x_unlock_vf_pf_channel(struct bnx2x * bp,struct bnx2x_virtf * vf,enum channel_tlvs expected_tlv)2320 void bnx2x_unlock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
2321 enum channel_tlvs expected_tlv)
2322 {
2323 enum channel_tlvs current_tlv;
2324
2325 if (!vf) {
2326 BNX2X_ERR("VF was %p\n", vf);
2327 return;
2328 }
2329
2330 current_tlv = vf->op_current;
2331
2332 /* we don't unlock the channel for unsupported tlvs */
2333 if (!bnx2x_tlv_supported(expected_tlv))
2334 return;
2335
2336 WARN(expected_tlv != vf->op_current,
2337 "lock mismatch: expected %d found %d", expected_tlv,
2338 vf->op_current);
2339
2340 /* record the locking op */
2341 vf->op_current = CHANNEL_TLV_NONE;
2342
2343 /* lock the channel */
2344 mutex_unlock(&vf->op_mutex);
2345
2346 /* log the unlock */
2347 DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel unlocked by %d\n",
2348 vf->abs_vfid, current_tlv);
2349 }
2350
bnx2x_set_pf_tx_switching(struct bnx2x * bp,bool enable)2351 static int bnx2x_set_pf_tx_switching(struct bnx2x *bp, bool enable)
2352 {
2353 struct bnx2x_queue_state_params q_params;
2354 u32 prev_flags;
2355 int i, rc;
2356
2357 /* Verify changes are needed and record current Tx switching state */
2358 prev_flags = bp->flags;
2359 if (enable)
2360 bp->flags |= TX_SWITCHING;
2361 else
2362 bp->flags &= ~TX_SWITCHING;
2363 if (prev_flags == bp->flags)
2364 return 0;
2365
2366 /* Verify state enables the sending of queue ramrods */
2367 if ((bp->state != BNX2X_STATE_OPEN) ||
2368 (bnx2x_get_q_logical_state(bp,
2369 &bnx2x_sp_obj(bp, &bp->fp[0]).q_obj) !=
2370 BNX2X_Q_LOGICAL_STATE_ACTIVE))
2371 return 0;
2372
2373 /* send q. update ramrod to configure Tx switching */
2374 memset(&q_params, 0, sizeof(q_params));
2375 __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
2376 q_params.cmd = BNX2X_Q_CMD_UPDATE;
2377 __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING_CHNG,
2378 &q_params.params.update.update_flags);
2379 if (enable)
2380 __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
2381 &q_params.params.update.update_flags);
2382 else
2383 __clear_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
2384 &q_params.params.update.update_flags);
2385
2386 /* send the ramrod on all the queues of the PF */
2387 for_each_eth_queue(bp, i) {
2388 struct bnx2x_fastpath *fp = &bp->fp[i];
2389 int tx_idx;
2390
2391 /* Set the appropriate Queue object */
2392 q_params.q_obj = &bnx2x_sp_obj(bp, fp).q_obj;
2393
2394 for (tx_idx = FIRST_TX_COS_INDEX;
2395 tx_idx < fp->max_cos; tx_idx++) {
2396 q_params.params.update.cid_index = tx_idx;
2397
2398 /* Update the Queue state */
2399 rc = bnx2x_queue_state_change(bp, &q_params);
2400 if (rc) {
2401 BNX2X_ERR("Failed to configure Tx switching\n");
2402 return rc;
2403 }
2404 }
2405 }
2406
2407 DP(BNX2X_MSG_IOV, "%s Tx Switching\n", enable ? "Enabled" : "Disabled");
2408 return 0;
2409 }
2410
bnx2x_sriov_configure(struct pci_dev * dev,int num_vfs_param)2411 int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param)
2412 {
2413 struct bnx2x *bp = netdev_priv(pci_get_drvdata(dev));
2414
2415 if (!IS_SRIOV(bp)) {
2416 BNX2X_ERR("failed to configure SR-IOV since vfdb was not allocated. Check dmesg for errors in probe stage\n");
2417 return -EINVAL;
2418 }
2419
2420 DP(BNX2X_MSG_IOV, "bnx2x_sriov_configure called with %d, BNX2X_NR_VIRTFN(bp) was %d\n",
2421 num_vfs_param, BNX2X_NR_VIRTFN(bp));
2422
2423 /* HW channel is only operational when PF is up */
2424 if (bp->state != BNX2X_STATE_OPEN) {
2425 BNX2X_ERR("VF num configuration via sysfs not supported while PF is down\n");
2426 return -EINVAL;
2427 }
2428
2429 /* we are always bound by the total_vfs in the configuration space */
2430 if (num_vfs_param > BNX2X_NR_VIRTFN(bp)) {
2431 BNX2X_ERR("truncating requested number of VFs (%d) down to maximum allowed (%d)\n",
2432 num_vfs_param, BNX2X_NR_VIRTFN(bp));
2433 num_vfs_param = BNX2X_NR_VIRTFN(bp);
2434 }
2435
2436 bp->requested_nr_virtfn = num_vfs_param;
2437 if (num_vfs_param == 0) {
2438 bnx2x_set_pf_tx_switching(bp, false);
2439 bnx2x_disable_sriov(bp);
2440 return 0;
2441 } else {
2442 return bnx2x_enable_sriov(bp);
2443 }
2444 }
2445
2446 #define IGU_ENTRY_SIZE 4
2447
bnx2x_enable_sriov(struct bnx2x * bp)2448 int bnx2x_enable_sriov(struct bnx2x *bp)
2449 {
2450 int rc = 0, req_vfs = bp->requested_nr_virtfn;
2451 int vf_idx, sb_idx, vfq_idx, qcount, first_vf;
2452 u32 igu_entry, address;
2453 u16 num_vf_queues;
2454
2455 if (req_vfs == 0)
2456 return 0;
2457
2458 first_vf = bp->vfdb->sriov.first_vf_in_pf;
2459
2460 /* statically distribute vf sb pool between VFs */
2461 num_vf_queues = min_t(u16, BNX2X_VF_MAX_QUEUES,
2462 BP_VFDB(bp)->vf_sbs_pool / req_vfs);
2463
2464 /* zero previous values learned from igu cam */
2465 for (vf_idx = 0; vf_idx < req_vfs; vf_idx++) {
2466 struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
2467
2468 vf->sb_count = 0;
2469 vf_sb_count(BP_VF(bp, vf_idx)) = 0;
2470 }
2471 bp->vfdb->vf_sbs_pool = 0;
2472
2473 /* prepare IGU cam */
2474 sb_idx = BP_VFDB(bp)->first_vf_igu_entry;
2475 address = IGU_REG_MAPPING_MEMORY + sb_idx * IGU_ENTRY_SIZE;
2476 for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
2477 for (vfq_idx = 0; vfq_idx < num_vf_queues; vfq_idx++) {
2478 igu_entry = vf_idx << IGU_REG_MAPPING_MEMORY_FID_SHIFT |
2479 vfq_idx << IGU_REG_MAPPING_MEMORY_VECTOR_SHIFT |
2480 IGU_REG_MAPPING_MEMORY_VALID;
2481 DP(BNX2X_MSG_IOV, "assigning sb %d to vf %d\n",
2482 sb_idx, vf_idx);
2483 REG_WR(bp, address, igu_entry);
2484 sb_idx++;
2485 address += IGU_ENTRY_SIZE;
2486 }
2487 }
2488
2489 /* Reinitialize vf database according to igu cam */
2490 bnx2x_get_vf_igu_cam_info(bp);
2491
2492 DP(BNX2X_MSG_IOV, "vf_sbs_pool %d, num_vf_queues %d\n",
2493 BP_VFDB(bp)->vf_sbs_pool, num_vf_queues);
2494
2495 qcount = 0;
2496 for_each_vf(bp, vf_idx) {
2497 struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
2498
2499 /* set local queue arrays */
2500 vf->vfqs = &bp->vfdb->vfqs[qcount];
2501 qcount += vf_sb_count(vf);
2502 bnx2x_iov_static_resc(bp, vf);
2503 }
2504
2505 /* prepare msix vectors in VF configuration space - the value in the
2506 * PCI configuration space should be the index of the last entry,
2507 * namely one less than the actual size of the table
2508 */
2509 for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
2510 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf_idx));
2511 REG_WR(bp, PCICFG_OFFSET + GRC_CONFIG_REG_VF_MSIX_CONTROL,
2512 num_vf_queues - 1);
2513 DP(BNX2X_MSG_IOV, "set msix vec num in VF %d cfg space to %d\n",
2514 vf_idx, num_vf_queues - 1);
2515 }
2516 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
2517
2518 /* enable sriov. This will probe all the VFs, and consequentially cause
2519 * the "acquire" messages to appear on the VF PF channel.
2520 */
2521 DP(BNX2X_MSG_IOV, "about to call enable sriov\n");
2522 bnx2x_disable_sriov(bp);
2523
2524 rc = bnx2x_set_pf_tx_switching(bp, true);
2525 if (rc)
2526 return rc;
2527
2528 rc = pci_enable_sriov(bp->pdev, req_vfs);
2529 if (rc) {
2530 BNX2X_ERR("pci_enable_sriov failed with %d\n", rc);
2531 return rc;
2532 }
2533 DP(BNX2X_MSG_IOV, "sriov enabled (%d vfs)\n", req_vfs);
2534 return req_vfs;
2535 }
2536
bnx2x_pf_set_vfs_vlan(struct bnx2x * bp)2537 void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp)
2538 {
2539 int vfidx;
2540 struct pf_vf_bulletin_content *bulletin;
2541
2542 DP(BNX2X_MSG_IOV, "configuring vlan for VFs from sp-task\n");
2543 for_each_vf(bp, vfidx) {
2544 bulletin = BP_VF_BULLETIN(bp, vfidx);
2545 if (bulletin->valid_bitmap & (1 << VLAN_VALID))
2546 bnx2x_set_vf_vlan(bp->dev, vfidx, bulletin->vlan, 0);
2547 }
2548 }
2549
bnx2x_disable_sriov(struct bnx2x * bp)2550 void bnx2x_disable_sriov(struct bnx2x *bp)
2551 {
2552 if (pci_vfs_assigned(bp->pdev)) {
2553 DP(BNX2X_MSG_IOV,
2554 "Unloading driver while VFs are assigned - VFs will not be deallocated\n");
2555 return;
2556 }
2557
2558 pci_disable_sriov(bp->pdev);
2559 }
2560
bnx2x_vf_op_prep(struct bnx2x * bp,int vfidx,struct bnx2x_virtf ** vf,struct pf_vf_bulletin_content ** bulletin,bool test_queue)2561 static int bnx2x_vf_op_prep(struct bnx2x *bp, int vfidx,
2562 struct bnx2x_virtf **vf,
2563 struct pf_vf_bulletin_content **bulletin,
2564 bool test_queue)
2565 {
2566 if (bp->state != BNX2X_STATE_OPEN) {
2567 BNX2X_ERR("PF is down - can't utilize iov-related functionality\n");
2568 return -EINVAL;
2569 }
2570
2571 if (!IS_SRIOV(bp)) {
2572 BNX2X_ERR("sriov is disabled - can't utilize iov-related functionality\n");
2573 return -EINVAL;
2574 }
2575
2576 if (vfidx >= BNX2X_NR_VIRTFN(bp)) {
2577 BNX2X_ERR("VF is uninitialized - can't utilize iov-related functionality. vfidx was %d BNX2X_NR_VIRTFN was %d\n",
2578 vfidx, BNX2X_NR_VIRTFN(bp));
2579 return -EINVAL;
2580 }
2581
2582 /* init members */
2583 *vf = BP_VF(bp, vfidx);
2584 *bulletin = BP_VF_BULLETIN(bp, vfidx);
2585
2586 if (!*vf) {
2587 BNX2X_ERR("Unable to get VF structure for vfidx %d\n", vfidx);
2588 return -EINVAL;
2589 }
2590
2591 if (test_queue && !(*vf)->vfqs) {
2592 BNX2X_ERR("vfqs struct is null. Was this invoked before dynamically enabling SR-IOV? vfidx was %d\n",
2593 vfidx);
2594 return -EINVAL;
2595 }
2596
2597 if (!*bulletin) {
2598 BNX2X_ERR("Bulletin Board struct is null for vfidx %d\n",
2599 vfidx);
2600 return -EINVAL;
2601 }
2602
2603 return 0;
2604 }
2605
bnx2x_get_vf_config(struct net_device * dev,int vfidx,struct ifla_vf_info * ivi)2606 int bnx2x_get_vf_config(struct net_device *dev, int vfidx,
2607 struct ifla_vf_info *ivi)
2608 {
2609 struct bnx2x *bp = netdev_priv(dev);
2610 struct bnx2x_virtf *vf = NULL;
2611 struct pf_vf_bulletin_content *bulletin = NULL;
2612 struct bnx2x_vlan_mac_obj *mac_obj;
2613 struct bnx2x_vlan_mac_obj *vlan_obj;
2614 int rc;
2615
2616 /* sanity and init */
2617 rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2618 if (rc)
2619 return rc;
2620
2621 mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
2622 vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2623 if (!mac_obj || !vlan_obj) {
2624 BNX2X_ERR("VF partially initialized\n");
2625 return -EINVAL;
2626 }
2627
2628 ivi->vf = vfidx;
2629 ivi->qos = 0;
2630 ivi->max_tx_rate = 10000; /* always 10G. TBA take from link struct */
2631 ivi->min_tx_rate = 0;
2632 ivi->spoofchk = 1; /*always enabled */
2633 if (vf->state == VF_ENABLED) {
2634 /* mac and vlan are in vlan_mac objects */
2635 if (bnx2x_validate_vf_sp_objs(bp, vf, false)) {
2636 mac_obj->get_n_elements(bp, mac_obj, 1, (u8 *)&ivi->mac,
2637 0, ETH_ALEN);
2638 vlan_obj->get_n_elements(bp, vlan_obj, 1,
2639 (u8 *)&ivi->vlan, 0,
2640 VLAN_HLEN);
2641 }
2642 } else {
2643 mutex_lock(&bp->vfdb->bulletin_mutex);
2644 /* mac */
2645 if (bulletin->valid_bitmap & (1 << MAC_ADDR_VALID))
2646 /* mac configured by ndo so its in bulletin board */
2647 memcpy(&ivi->mac, bulletin->mac, ETH_ALEN);
2648 else
2649 /* function has not been loaded yet. Show mac as 0s */
2650 eth_zero_addr(ivi->mac);
2651
2652 /* vlan */
2653 if (bulletin->valid_bitmap & (1 << VLAN_VALID))
2654 /* vlan configured by ndo so its in bulletin board */
2655 memcpy(&ivi->vlan, &bulletin->vlan, VLAN_HLEN);
2656 else
2657 /* function has not been loaded yet. Show vlans as 0s */
2658 memset(&ivi->vlan, 0, VLAN_HLEN);
2659
2660 mutex_unlock(&bp->vfdb->bulletin_mutex);
2661 }
2662
2663 return 0;
2664 }
2665
2666 /* New mac for VF. Consider these cases:
2667 * 1. VF hasn't been acquired yet - save the mac in local bulletin board and
2668 * supply at acquire.
2669 * 2. VF has already been acquired but has not yet initialized - store in local
2670 * bulletin board. mac will be posted on VF bulletin board after VF init. VF
2671 * will configure this mac when it is ready.
2672 * 3. VF has already initialized but has not yet setup a queue - post the new
2673 * mac on VF's bulletin board right now. VF will configure this mac when it
2674 * is ready.
2675 * 4. VF has already set a queue - delete any macs already configured for this
2676 * queue and manually config the new mac.
2677 * In any event, once this function has been called refuse any attempts by the
2678 * VF to configure any mac for itself except for this mac. In case of a race
2679 * where the VF fails to see the new post on its bulletin board before sending a
2680 * mac configuration request, the PF will simply fail the request and VF can try
2681 * again after consulting its bulletin board.
2682 */
bnx2x_set_vf_mac(struct net_device * dev,int vfidx,u8 * mac)2683 int bnx2x_set_vf_mac(struct net_device *dev, int vfidx, u8 *mac)
2684 {
2685 struct bnx2x *bp = netdev_priv(dev);
2686 int rc, q_logical_state;
2687 struct bnx2x_virtf *vf = NULL;
2688 struct pf_vf_bulletin_content *bulletin = NULL;
2689
2690 if (!is_valid_ether_addr(mac)) {
2691 BNX2X_ERR("mac address invalid\n");
2692 return -EINVAL;
2693 }
2694
2695 /* sanity and init */
2696 rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2697 if (rc)
2698 return rc;
2699
2700 mutex_lock(&bp->vfdb->bulletin_mutex);
2701
2702 /* update PF's copy of the VF's bulletin. Will no longer accept mac
2703 * configuration requests from vf unless match this mac
2704 */
2705 bulletin->valid_bitmap |= 1 << MAC_ADDR_VALID;
2706 memcpy(bulletin->mac, mac, ETH_ALEN);
2707
2708 /* Post update on VF's bulletin board */
2709 rc = bnx2x_post_vf_bulletin(bp, vfidx);
2710
2711 /* release lock before checking return code */
2712 mutex_unlock(&bp->vfdb->bulletin_mutex);
2713
2714 if (rc) {
2715 BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
2716 return rc;
2717 }
2718
2719 q_logical_state =
2720 bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj));
2721 if (vf->state == VF_ENABLED &&
2722 q_logical_state == BNX2X_Q_LOGICAL_STATE_ACTIVE) {
2723 /* configure the mac in device on this vf's queue */
2724 unsigned long ramrod_flags = 0;
2725 struct bnx2x_vlan_mac_obj *mac_obj;
2726
2727 /* User should be able to see failure reason in system logs */
2728 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
2729 return -EINVAL;
2730
2731 /* must lock vfpf channel to protect against vf flows */
2732 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
2733
2734 /* remove existing eth macs */
2735 mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
2736 rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_ETH_MAC, true);
2737 if (rc) {
2738 BNX2X_ERR("failed to delete eth macs\n");
2739 rc = -EINVAL;
2740 goto out;
2741 }
2742
2743 /* remove existing uc list macs */
2744 rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_UC_LIST_MAC, true);
2745 if (rc) {
2746 BNX2X_ERR("failed to delete uc_list macs\n");
2747 rc = -EINVAL;
2748 goto out;
2749 }
2750
2751 /* configure the new mac to device */
2752 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2753 bnx2x_set_mac_one(bp, (u8 *)&bulletin->mac, mac_obj, true,
2754 BNX2X_ETH_MAC, &ramrod_flags);
2755
2756 out:
2757 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
2758 }
2759
2760 return rc;
2761 }
2762
bnx2x_set_vf_vlan_acceptance(struct bnx2x * bp,struct bnx2x_virtf * vf,bool accept)2763 static void bnx2x_set_vf_vlan_acceptance(struct bnx2x *bp,
2764 struct bnx2x_virtf *vf, bool accept)
2765 {
2766 struct bnx2x_rx_mode_ramrod_params rx_ramrod;
2767 unsigned long accept_flags;
2768
2769 /* need to remove/add the VF's accept_any_vlan bit */
2770 accept_flags = bnx2x_leading_vfq(vf, accept_flags);
2771 if (accept)
2772 set_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
2773 else
2774 clear_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
2775
2776 bnx2x_vf_prep_rx_mode(bp, LEADING_IDX, &rx_ramrod, vf,
2777 accept_flags);
2778 bnx2x_leading_vfq(vf, accept_flags) = accept_flags;
2779 bnx2x_config_rx_mode(bp, &rx_ramrod);
2780 }
2781
bnx2x_set_vf_vlan_filter(struct bnx2x * bp,struct bnx2x_virtf * vf,u16 vlan,bool add)2782 static int bnx2x_set_vf_vlan_filter(struct bnx2x *bp, struct bnx2x_virtf *vf,
2783 u16 vlan, bool add)
2784 {
2785 struct bnx2x_vlan_mac_ramrod_params ramrod_param;
2786 unsigned long ramrod_flags = 0;
2787 int rc = 0;
2788
2789 /* configure the new vlan to device */
2790 memset(&ramrod_param, 0, sizeof(ramrod_param));
2791 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2792 ramrod_param.vlan_mac_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2793 ramrod_param.ramrod_flags = ramrod_flags;
2794 ramrod_param.user_req.u.vlan.vlan = vlan;
2795 ramrod_param.user_req.cmd = add ? BNX2X_VLAN_MAC_ADD
2796 : BNX2X_VLAN_MAC_DEL;
2797 rc = bnx2x_config_vlan_mac(bp, &ramrod_param);
2798 if (rc) {
2799 BNX2X_ERR("failed to configure vlan\n");
2800 return -EINVAL;
2801 }
2802
2803 return 0;
2804 }
2805
bnx2x_set_vf_vlan(struct net_device * dev,int vfidx,u16 vlan,u8 qos)2806 int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos)
2807 {
2808 struct pf_vf_bulletin_content *bulletin = NULL;
2809 struct bnx2x *bp = netdev_priv(dev);
2810 struct bnx2x_vlan_mac_obj *vlan_obj;
2811 unsigned long vlan_mac_flags = 0;
2812 unsigned long ramrod_flags = 0;
2813 struct bnx2x_virtf *vf = NULL;
2814 int i, rc;
2815
2816 if (vlan > 4095) {
2817 BNX2X_ERR("illegal vlan value %d\n", vlan);
2818 return -EINVAL;
2819 }
2820
2821 DP(BNX2X_MSG_IOV, "configuring VF %d with VLAN %d qos %d\n",
2822 vfidx, vlan, 0);
2823
2824 /* sanity and init */
2825 rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2826 if (rc)
2827 return rc;
2828
2829 /* update PF's copy of the VF's bulletin. No point in posting the vlan
2830 * to the VF since it doesn't have anything to do with it. But it useful
2831 * to store it here in case the VF is not up yet and we can only
2832 * configure the vlan later when it does. Treat vlan id 0 as remove the
2833 * Host tag.
2834 */
2835 mutex_lock(&bp->vfdb->bulletin_mutex);
2836
2837 if (vlan > 0)
2838 bulletin->valid_bitmap |= 1 << VLAN_VALID;
2839 else
2840 bulletin->valid_bitmap &= ~(1 << VLAN_VALID);
2841 bulletin->vlan = vlan;
2842
2843 /* Post update on VF's bulletin board */
2844 rc = bnx2x_post_vf_bulletin(bp, vfidx);
2845 if (rc)
2846 BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
2847 mutex_unlock(&bp->vfdb->bulletin_mutex);
2848
2849 /* is vf initialized and queue set up? */
2850 if (vf->state != VF_ENABLED ||
2851 bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj)) !=
2852 BNX2X_Q_LOGICAL_STATE_ACTIVE)
2853 return rc;
2854
2855 /* User should be able to see error in system logs */
2856 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
2857 return -EINVAL;
2858
2859 /* must lock vfpf channel to protect against vf flows */
2860 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
2861
2862 /* remove existing vlans */
2863 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2864 vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2865 rc = vlan_obj->delete_all(bp, vlan_obj, &vlan_mac_flags,
2866 &ramrod_flags);
2867 if (rc) {
2868 BNX2X_ERR("failed to delete vlans\n");
2869 rc = -EINVAL;
2870 goto out;
2871 }
2872
2873 /* clear accept_any_vlan when HV forces vlan, otherwise
2874 * according to VF capabilities
2875 */
2876 if (vlan || !(vf->cfg_flags & VF_CFG_VLAN_FILTER))
2877 bnx2x_set_vf_vlan_acceptance(bp, vf, !vlan);
2878
2879 rc = bnx2x_set_vf_vlan_filter(bp, vf, vlan, true);
2880 if (rc)
2881 goto out;
2882
2883 /* send queue update ramrods to configure default vlan and
2884 * silent vlan removal
2885 */
2886 for_each_vfq(vf, i) {
2887 struct bnx2x_queue_state_params q_params = {NULL};
2888 struct bnx2x_queue_update_params *update_params;
2889
2890 q_params.q_obj = &bnx2x_vfq(vf, i, sp_obj);
2891
2892 /* validate the Q is UP */
2893 if (bnx2x_get_q_logical_state(bp, q_params.q_obj) !=
2894 BNX2X_Q_LOGICAL_STATE_ACTIVE)
2895 continue;
2896
2897 __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
2898 q_params.cmd = BNX2X_Q_CMD_UPDATE;
2899 update_params = &q_params.params.update;
2900 __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
2901 &update_params->update_flags);
2902 __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
2903 &update_params->update_flags);
2904 if (vlan == 0) {
2905 /* if vlan is 0 then we want to leave the VF traffic
2906 * untagged, and leave the incoming traffic untouched
2907 * (i.e. do not remove any vlan tags).
2908 */
2909 __clear_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
2910 &update_params->update_flags);
2911 __clear_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
2912 &update_params->update_flags);
2913 } else {
2914 /* configure default vlan to vf queue and set silent
2915 * vlan removal (the vf remains unaware of this vlan).
2916 */
2917 __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
2918 &update_params->update_flags);
2919 __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
2920 &update_params->update_flags);
2921 update_params->def_vlan = vlan;
2922 update_params->silent_removal_value =
2923 vlan & VLAN_VID_MASK;
2924 update_params->silent_removal_mask = VLAN_VID_MASK;
2925 }
2926
2927 /* Update the Queue state */
2928 rc = bnx2x_queue_state_change(bp, &q_params);
2929 if (rc) {
2930 BNX2X_ERR("Failed to configure default VLAN queue %d\n",
2931 i);
2932 goto out;
2933 }
2934 }
2935 out:
2936 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
2937
2938 if (rc)
2939 DP(BNX2X_MSG_IOV,
2940 "updated VF[%d] vlan configuration (vlan = %d)\n",
2941 vfidx, vlan);
2942
2943 return rc;
2944 }
2945
2946 /* crc is the first field in the bulletin board. Compute the crc over the
2947 * entire bulletin board excluding the crc field itself. Use the length field
2948 * as the Bulletin Board was posted by a PF with possibly a different version
2949 * from the vf which will sample it. Therefore, the length is computed by the
2950 * PF and then used blindly by the VF.
2951 */
bnx2x_crc_vf_bulletin(struct pf_vf_bulletin_content * bulletin)2952 u32 bnx2x_crc_vf_bulletin(struct pf_vf_bulletin_content *bulletin)
2953 {
2954 return crc32(BULLETIN_CRC_SEED,
2955 ((u8 *)bulletin) + sizeof(bulletin->crc),
2956 bulletin->length - sizeof(bulletin->crc));
2957 }
2958
2959 /* Check for new posts on the bulletin board */
bnx2x_sample_bulletin(struct bnx2x * bp)2960 enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp)
2961 {
2962 struct pf_vf_bulletin_content *bulletin;
2963 int attempts;
2964
2965 /* sampling structure in mid post may result with corrupted data
2966 * validate crc to ensure coherency.
2967 */
2968 for (attempts = 0; attempts < BULLETIN_ATTEMPTS; attempts++) {
2969 u32 crc;
2970
2971 /* sample the bulletin board */
2972 memcpy(&bp->shadow_bulletin, bp->pf2vf_bulletin,
2973 sizeof(union pf_vf_bulletin));
2974
2975 crc = bnx2x_crc_vf_bulletin(&bp->shadow_bulletin.content);
2976
2977 if (bp->shadow_bulletin.content.crc == crc)
2978 break;
2979
2980 BNX2X_ERR("bad crc on bulletin board. Contained %x computed %x\n",
2981 bp->shadow_bulletin.content.crc, crc);
2982 }
2983
2984 if (attempts >= BULLETIN_ATTEMPTS) {
2985 BNX2X_ERR("pf to vf bulletin board crc was wrong %d consecutive times. Aborting\n",
2986 attempts);
2987 return PFVF_BULLETIN_CRC_ERR;
2988 }
2989 bulletin = &bp->shadow_bulletin.content;
2990
2991 /* bulletin board hasn't changed since last sample */
2992 if (bp->old_bulletin.version == bulletin->version)
2993 return PFVF_BULLETIN_UNCHANGED;
2994
2995 /* the mac address in bulletin board is valid and is new */
2996 if (bulletin->valid_bitmap & 1 << MAC_ADDR_VALID &&
2997 !ether_addr_equal(bulletin->mac, bp->old_bulletin.mac)) {
2998 /* update new mac to net device */
2999 memcpy(bp->dev->dev_addr, bulletin->mac, ETH_ALEN);
3000 }
3001
3002 if (bulletin->valid_bitmap & (1 << LINK_VALID)) {
3003 DP(BNX2X_MSG_IOV, "link update speed %d flags %x\n",
3004 bulletin->link_speed, bulletin->link_flags);
3005
3006 bp->vf_link_vars.line_speed = bulletin->link_speed;
3007 bp->vf_link_vars.link_report_flags = 0;
3008 /* Link is down */
3009 if (bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)
3010 __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
3011 &bp->vf_link_vars.link_report_flags);
3012 /* Full DUPLEX */
3013 if (bulletin->link_flags & VFPF_LINK_REPORT_FULL_DUPLEX)
3014 __set_bit(BNX2X_LINK_REPORT_FD,
3015 &bp->vf_link_vars.link_report_flags);
3016 /* Rx Flow Control is ON */
3017 if (bulletin->link_flags & VFPF_LINK_REPORT_RX_FC_ON)
3018 __set_bit(BNX2X_LINK_REPORT_RX_FC_ON,
3019 &bp->vf_link_vars.link_report_flags);
3020 /* Tx Flow Control is ON */
3021 if (bulletin->link_flags & VFPF_LINK_REPORT_TX_FC_ON)
3022 __set_bit(BNX2X_LINK_REPORT_TX_FC_ON,
3023 &bp->vf_link_vars.link_report_flags);
3024 __bnx2x_link_report(bp);
3025 }
3026
3027 /* copy new bulletin board to bp */
3028 memcpy(&bp->old_bulletin, bulletin,
3029 sizeof(struct pf_vf_bulletin_content));
3030
3031 return PFVF_BULLETIN_UPDATED;
3032 }
3033
bnx2x_timer_sriov(struct bnx2x * bp)3034 void bnx2x_timer_sriov(struct bnx2x *bp)
3035 {
3036 bnx2x_sample_bulletin(bp);
3037
3038 /* if channel is down we need to self destruct */
3039 if (bp->old_bulletin.valid_bitmap & 1 << CHANNEL_DOWN)
3040 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_VFPF_CHANNEL_DOWN,
3041 BNX2X_MSG_IOV);
3042 }
3043
bnx2x_vf_doorbells(struct bnx2x * bp)3044 void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp)
3045 {
3046 /* vf doorbells are embedded within the regview */
3047 return bp->regview + PXP_VF_ADDR_DB_START;
3048 }
3049
bnx2x_vf_pci_dealloc(struct bnx2x * bp)3050 void bnx2x_vf_pci_dealloc(struct bnx2x *bp)
3051 {
3052 BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping,
3053 sizeof(struct bnx2x_vf_mbx_msg));
3054 BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->pf2vf_bulletin_mapping,
3055 sizeof(union pf_vf_bulletin));
3056 }
3057
bnx2x_vf_pci_alloc(struct bnx2x * bp)3058 int bnx2x_vf_pci_alloc(struct bnx2x *bp)
3059 {
3060 mutex_init(&bp->vf2pf_mutex);
3061
3062 /* allocate vf2pf mailbox for vf to pf channel */
3063 bp->vf2pf_mbox = BNX2X_PCI_ALLOC(&bp->vf2pf_mbox_mapping,
3064 sizeof(struct bnx2x_vf_mbx_msg));
3065 if (!bp->vf2pf_mbox)
3066 goto alloc_mem_err;
3067
3068 /* allocate pf 2 vf bulletin board */
3069 bp->pf2vf_bulletin = BNX2X_PCI_ALLOC(&bp->pf2vf_bulletin_mapping,
3070 sizeof(union pf_vf_bulletin));
3071 if (!bp->pf2vf_bulletin)
3072 goto alloc_mem_err;
3073
3074 bnx2x_vf_bulletin_finalize(&bp->pf2vf_bulletin->content, true);
3075
3076 return 0;
3077
3078 alloc_mem_err:
3079 bnx2x_vf_pci_dealloc(bp);
3080 return -ENOMEM;
3081 }
3082
bnx2x_iov_channel_down(struct bnx2x * bp)3083 void bnx2x_iov_channel_down(struct bnx2x *bp)
3084 {
3085 int vf_idx;
3086 struct pf_vf_bulletin_content *bulletin;
3087
3088 if (!IS_SRIOV(bp))
3089 return;
3090
3091 for_each_vf(bp, vf_idx) {
3092 /* locate this VFs bulletin board and update the channel down
3093 * bit
3094 */
3095 bulletin = BP_VF_BULLETIN(bp, vf_idx);
3096 bulletin->valid_bitmap |= 1 << CHANNEL_DOWN;
3097
3098 /* update vf bulletin board */
3099 bnx2x_post_vf_bulletin(bp, vf_idx);
3100 }
3101 }
3102
bnx2x_iov_task(struct work_struct * work)3103 void bnx2x_iov_task(struct work_struct *work)
3104 {
3105 struct bnx2x *bp = container_of(work, struct bnx2x, iov_task.work);
3106
3107 if (!netif_running(bp->dev))
3108 return;
3109
3110 if (test_and_clear_bit(BNX2X_IOV_HANDLE_FLR,
3111 &bp->iov_task_state))
3112 bnx2x_vf_handle_flr_event(bp);
3113
3114 if (test_and_clear_bit(BNX2X_IOV_HANDLE_VF_MSG,
3115 &bp->iov_task_state))
3116 bnx2x_vf_mbx(bp);
3117 }
3118
bnx2x_schedule_iov_task(struct bnx2x * bp,enum bnx2x_iov_flag flag)3119 void bnx2x_schedule_iov_task(struct bnx2x *bp, enum bnx2x_iov_flag flag)
3120 {
3121 smp_mb__before_atomic();
3122 set_bit(flag, &bp->iov_task_state);
3123 smp_mb__after_atomic();
3124 DP(BNX2X_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
3125 queue_delayed_work(bnx2x_iov_wq, &bp->iov_task, 0);
3126 }
3127