1 /*
2 * Procfs interface for the PCI bus.
3 *
4 * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
5 */
6
7 #include <linux/init.h>
8 #include <linux/pci.h>
9 #include <linux/slab.h>
10 #include <linux/module.h>
11 #include <linux/proc_fs.h>
12 #include <linux/seq_file.h>
13 #include <linux/capability.h>
14 #include <asm/uaccess.h>
15 #include <asm/byteorder.h>
16 #include "pci.h"
17
18 static int proc_initialized; /* = 0 */
19
proc_bus_pci_lseek(struct file * file,loff_t off,int whence)20 static loff_t proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
21 {
22 struct pci_dev *dev = PDE_DATA(file_inode(file));
23 return fixed_size_llseek(file, off, whence, dev->cfg_size);
24 }
25
proc_bus_pci_read(struct file * file,char __user * buf,size_t nbytes,loff_t * ppos)26 static ssize_t proc_bus_pci_read(struct file *file, char __user *buf,
27 size_t nbytes, loff_t *ppos)
28 {
29 struct pci_dev *dev = PDE_DATA(file_inode(file));
30 unsigned int pos = *ppos;
31 unsigned int cnt, size;
32
33 /*
34 * Normal users can read only the standardized portion of the
35 * configuration space as several chips lock up when trying to read
36 * undefined locations (think of Intel PIIX4 as a typical example).
37 */
38
39 if (capable(CAP_SYS_ADMIN))
40 size = dev->cfg_size;
41 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
42 size = 128;
43 else
44 size = 64;
45
46 if (pos >= size)
47 return 0;
48 if (nbytes >= size)
49 nbytes = size;
50 if (pos + nbytes > size)
51 nbytes = size - pos;
52 cnt = nbytes;
53
54 if (!access_ok(VERIFY_WRITE, buf, cnt))
55 return -EINVAL;
56
57 pci_config_pm_runtime_get(dev);
58
59 if ((pos & 1) && cnt) {
60 unsigned char val;
61 pci_user_read_config_byte(dev, pos, &val);
62 __put_user(val, buf);
63 buf++;
64 pos++;
65 cnt--;
66 }
67
68 if ((pos & 3) && cnt > 2) {
69 unsigned short val;
70 pci_user_read_config_word(dev, pos, &val);
71 __put_user(cpu_to_le16(val), (__le16 __user *) buf);
72 buf += 2;
73 pos += 2;
74 cnt -= 2;
75 }
76
77 while (cnt >= 4) {
78 unsigned int val;
79 pci_user_read_config_dword(dev, pos, &val);
80 __put_user(cpu_to_le32(val), (__le32 __user *) buf);
81 buf += 4;
82 pos += 4;
83 cnt -= 4;
84 }
85
86 if (cnt >= 2) {
87 unsigned short val;
88 pci_user_read_config_word(dev, pos, &val);
89 __put_user(cpu_to_le16(val), (__le16 __user *) buf);
90 buf += 2;
91 pos += 2;
92 cnt -= 2;
93 }
94
95 if (cnt) {
96 unsigned char val;
97 pci_user_read_config_byte(dev, pos, &val);
98 __put_user(val, buf);
99 buf++;
100 pos++;
101 cnt--;
102 }
103
104 pci_config_pm_runtime_put(dev);
105
106 *ppos = pos;
107 return nbytes;
108 }
109
proc_bus_pci_write(struct file * file,const char __user * buf,size_t nbytes,loff_t * ppos)110 static ssize_t proc_bus_pci_write(struct file *file, const char __user *buf,
111 size_t nbytes, loff_t *ppos)
112 {
113 struct inode *ino = file_inode(file);
114 struct pci_dev *dev = PDE_DATA(ino);
115 int pos = *ppos;
116 int size = dev->cfg_size;
117 int cnt;
118
119 if (pos >= size)
120 return 0;
121 if (nbytes >= size)
122 nbytes = size;
123 if (pos + nbytes > size)
124 nbytes = size - pos;
125 cnt = nbytes;
126
127 if (!access_ok(VERIFY_READ, buf, cnt))
128 return -EINVAL;
129
130 pci_config_pm_runtime_get(dev);
131
132 if ((pos & 1) && cnt) {
133 unsigned char val;
134 __get_user(val, buf);
135 pci_user_write_config_byte(dev, pos, val);
136 buf++;
137 pos++;
138 cnt--;
139 }
140
141 if ((pos & 3) && cnt > 2) {
142 __le16 val;
143 __get_user(val, (__le16 __user *) buf);
144 pci_user_write_config_word(dev, pos, le16_to_cpu(val));
145 buf += 2;
146 pos += 2;
147 cnt -= 2;
148 }
149
150 while (cnt >= 4) {
151 __le32 val;
152 __get_user(val, (__le32 __user *) buf);
153 pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
154 buf += 4;
155 pos += 4;
156 cnt -= 4;
157 }
158
159 if (cnt >= 2) {
160 __le16 val;
161 __get_user(val, (__le16 __user *) buf);
162 pci_user_write_config_word(dev, pos, le16_to_cpu(val));
163 buf += 2;
164 pos += 2;
165 cnt -= 2;
166 }
167
168 if (cnt) {
169 unsigned char val;
170 __get_user(val, buf);
171 pci_user_write_config_byte(dev, pos, val);
172 buf++;
173 pos++;
174 cnt--;
175 }
176
177 pci_config_pm_runtime_put(dev);
178
179 *ppos = pos;
180 i_size_write(ino, dev->cfg_size);
181 return nbytes;
182 }
183
184 struct pci_filp_private {
185 enum pci_mmap_state mmap_state;
186 int write_combine;
187 };
188
proc_bus_pci_ioctl(struct file * file,unsigned int cmd,unsigned long arg)189 static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
190 unsigned long arg)
191 {
192 struct pci_dev *dev = PDE_DATA(file_inode(file));
193 #ifdef HAVE_PCI_MMAP
194 struct pci_filp_private *fpriv = file->private_data;
195 #endif /* HAVE_PCI_MMAP */
196 int ret = 0;
197
198 switch (cmd) {
199 case PCIIOC_CONTROLLER:
200 ret = pci_domain_nr(dev->bus);
201 break;
202
203 #ifdef HAVE_PCI_MMAP
204 case PCIIOC_MMAP_IS_IO:
205 fpriv->mmap_state = pci_mmap_io;
206 break;
207
208 case PCIIOC_MMAP_IS_MEM:
209 fpriv->mmap_state = pci_mmap_mem;
210 break;
211
212 case PCIIOC_WRITE_COMBINE:
213 if (arg)
214 fpriv->write_combine = 1;
215 else
216 fpriv->write_combine = 0;
217 break;
218
219 #endif /* HAVE_PCI_MMAP */
220
221 default:
222 ret = -EINVAL;
223 break;
224 }
225
226 return ret;
227 }
228
229 #ifdef HAVE_PCI_MMAP
proc_bus_pci_mmap(struct file * file,struct vm_area_struct * vma)230 static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
231 {
232 struct pci_dev *dev = PDE_DATA(file_inode(file));
233 struct pci_filp_private *fpriv = file->private_data;
234 int i, ret;
235
236 if (!capable(CAP_SYS_RAWIO))
237 return -EPERM;
238
239 /* Make sure the caller is mapping a real resource for this device */
240 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
241 if (pci_mmap_fits(dev, i, vma, PCI_MMAP_PROCFS))
242 break;
243 }
244
245 if (i >= PCI_ROM_RESOURCE)
246 return -ENODEV;
247
248 ret = pci_mmap_page_range(dev, vma,
249 fpriv->mmap_state,
250 fpriv->write_combine);
251 if (ret < 0)
252 return ret;
253
254 return 0;
255 }
256
proc_bus_pci_open(struct inode * inode,struct file * file)257 static int proc_bus_pci_open(struct inode *inode, struct file *file)
258 {
259 struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
260
261 if (!fpriv)
262 return -ENOMEM;
263
264 fpriv->mmap_state = pci_mmap_io;
265 fpriv->write_combine = 0;
266
267 file->private_data = fpriv;
268
269 return 0;
270 }
271
proc_bus_pci_release(struct inode * inode,struct file * file)272 static int proc_bus_pci_release(struct inode *inode, struct file *file)
273 {
274 kfree(file->private_data);
275 file->private_data = NULL;
276
277 return 0;
278 }
279 #endif /* HAVE_PCI_MMAP */
280
281 static const struct file_operations proc_bus_pci_operations = {
282 .owner = THIS_MODULE,
283 .llseek = proc_bus_pci_lseek,
284 .read = proc_bus_pci_read,
285 .write = proc_bus_pci_write,
286 .unlocked_ioctl = proc_bus_pci_ioctl,
287 .compat_ioctl = proc_bus_pci_ioctl,
288 #ifdef HAVE_PCI_MMAP
289 .open = proc_bus_pci_open,
290 .release = proc_bus_pci_release,
291 .mmap = proc_bus_pci_mmap,
292 #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
293 .get_unmapped_area = get_pci_unmapped_area,
294 #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
295 #endif /* HAVE_PCI_MMAP */
296 };
297
298 /* iterator */
pci_seq_start(struct seq_file * m,loff_t * pos)299 static void *pci_seq_start(struct seq_file *m, loff_t *pos)
300 {
301 struct pci_dev *dev = NULL;
302 loff_t n = *pos;
303
304 for_each_pci_dev(dev) {
305 if (!n--)
306 break;
307 }
308 return dev;
309 }
310
pci_seq_next(struct seq_file * m,void * v,loff_t * pos)311 static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
312 {
313 struct pci_dev *dev = v;
314
315 (*pos)++;
316 dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
317 return dev;
318 }
319
pci_seq_stop(struct seq_file * m,void * v)320 static void pci_seq_stop(struct seq_file *m, void *v)
321 {
322 if (v) {
323 struct pci_dev *dev = v;
324 pci_dev_put(dev);
325 }
326 }
327
show_device(struct seq_file * m,void * v)328 static int show_device(struct seq_file *m, void *v)
329 {
330 const struct pci_dev *dev = v;
331 const struct pci_driver *drv;
332 int i;
333
334 if (dev == NULL)
335 return 0;
336
337 drv = pci_dev_driver(dev);
338 seq_printf(m, "%02x%02x\t%04x%04x\t%x",
339 dev->bus->number,
340 dev->devfn,
341 dev->vendor,
342 dev->device,
343 dev->irq);
344
345 /* only print standard and ROM resources to preserve compatibility */
346 for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
347 resource_size_t start, end;
348 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
349 seq_printf(m, "\t%16llx",
350 (unsigned long long)(start |
351 (dev->resource[i].flags & PCI_REGION_FLAG_MASK)));
352 }
353 for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
354 resource_size_t start, end;
355 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
356 seq_printf(m, "\t%16llx",
357 dev->resource[i].start < dev->resource[i].end ?
358 (unsigned long long)(end - start) + 1 : 0);
359 }
360 seq_putc(m, '\t');
361 if (drv)
362 seq_printf(m, "%s", drv->name);
363 seq_putc(m, '\n');
364 return 0;
365 }
366
367 static const struct seq_operations proc_bus_pci_devices_op = {
368 .start = pci_seq_start,
369 .next = pci_seq_next,
370 .stop = pci_seq_stop,
371 .show = show_device
372 };
373
374 static struct proc_dir_entry *proc_bus_pci_dir;
375
pci_proc_attach_device(struct pci_dev * dev)376 int pci_proc_attach_device(struct pci_dev *dev)
377 {
378 struct pci_bus *bus = dev->bus;
379 struct proc_dir_entry *e;
380 char name[16];
381
382 if (!proc_initialized)
383 return -EACCES;
384
385 if (!bus->procdir) {
386 if (pci_proc_domain(bus)) {
387 sprintf(name, "%04x:%02x", pci_domain_nr(bus),
388 bus->number);
389 } else {
390 sprintf(name, "%02x", bus->number);
391 }
392 bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
393 if (!bus->procdir)
394 return -ENOMEM;
395 }
396
397 sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
398 e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir,
399 &proc_bus_pci_operations, dev);
400 if (!e)
401 return -ENOMEM;
402 proc_set_size(e, dev->cfg_size);
403 dev->procent = e;
404
405 return 0;
406 }
407
pci_proc_detach_device(struct pci_dev * dev)408 int pci_proc_detach_device(struct pci_dev *dev)
409 {
410 proc_remove(dev->procent);
411 dev->procent = NULL;
412 return 0;
413 }
414
pci_proc_detach_bus(struct pci_bus * bus)415 int pci_proc_detach_bus(struct pci_bus *bus)
416 {
417 proc_remove(bus->procdir);
418 return 0;
419 }
420
proc_bus_pci_dev_open(struct inode * inode,struct file * file)421 static int proc_bus_pci_dev_open(struct inode *inode, struct file *file)
422 {
423 return seq_open(file, &proc_bus_pci_devices_op);
424 }
425
426 static const struct file_operations proc_bus_pci_dev_operations = {
427 .owner = THIS_MODULE,
428 .open = proc_bus_pci_dev_open,
429 .read = seq_read,
430 .llseek = seq_lseek,
431 .release = seq_release,
432 };
433
pci_proc_init(void)434 static int __init pci_proc_init(void)
435 {
436 struct pci_dev *dev = NULL;
437 proc_bus_pci_dir = proc_mkdir("bus/pci", NULL);
438 proc_create("devices", 0, proc_bus_pci_dir,
439 &proc_bus_pci_dev_operations);
440 proc_initialized = 1;
441 for_each_pci_dev(dev)
442 pci_proc_attach_device(dev);
443
444 return 0;
445 }
446 device_initcall(pci_proc_init);
447