1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 *
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
16 */
17
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/module.h>
21 #include <linux/types.h>
22 #include <linux/device.h>
23 #include <linux/string.h>
24 #include <linux/slab.h>
25 #include <linux/fs.h>
26 #include <linux/platform_device.h>
27 #include <linux/of.h>
28 #include <linux/of_address.h>
29 #include <linux/firmware.h>
30 #include <linux/io.h>
31
32 #include "io.h"
33
34 static inline void byte0_out(unsigned char data);
35 static inline void byte1_out(unsigned char data);
36 static inline void xl_cclk_b(int32_t i);
37
38
39 /* Assert and Deassert CCLK */
xl_shift_cclk(int count)40 void xl_shift_cclk(int count)
41 {
42 int i;
43
44 for (i = 0; i < count; i++) {
45 xl_cclk_b(1);
46 xl_cclk_b(0);
47 }
48 }
49
xl_supported_prog_bus_width(enum wbus bus_bytes)50 int xl_supported_prog_bus_width(enum wbus bus_bytes)
51 {
52 switch (bus_bytes) {
53 case bus_1byte:
54 break;
55 case bus_2byte:
56 break;
57 default:
58 pr_err("unsupported program bus width %d\n",
59 bus_bytes);
60 return 0;
61 }
62
63 return 1;
64 }
65
66 /* Serialize byte and clock each bit on target's DIN and CCLK pins */
xl_shift_bytes_out(enum wbus bus_byte,unsigned char * pdata)67 void xl_shift_bytes_out(enum wbus bus_byte, unsigned char *pdata)
68 {
69 /*
70 * supports 1 and 2 bytes programming mode
71 */
72 if (likely(bus_byte == bus_2byte))
73 byte0_out(pdata[0]);
74
75 byte1_out(pdata[1]);
76 xl_shift_cclk(1);
77 }
78
79 /*
80 * generic bit swap for xilinx SYSTEMMAP FPGA programming
81 */
xl_program_b(int32_t i)82 void xl_program_b(int32_t i)
83 {
84 }
85
xl_rdwr_b(int32_t i)86 void xl_rdwr_b(int32_t i)
87 {
88 }
89
xl_csi_b(int32_t i)90 void xl_csi_b(int32_t i)
91 {
92 }
93
xl_get_init_b(void)94 int xl_get_init_b(void)
95 {
96 return -1;
97 }
98
xl_get_done_b(void)99 int xl_get_done_b(void)
100 {
101 return -1;
102 }
103
byte0_out(unsigned char data)104 static inline void byte0_out(unsigned char data)
105 {
106 }
107
byte1_out(unsigned char data)108 static inline void byte1_out(unsigned char data)
109 {
110 }
111
xl_cclk_b(int32_t i)112 static inline void xl_cclk_b(int32_t i)
113 {
114 }
115
116 /*
117 * configurable per device type for different I/O config
118 */
xl_init_io(void)119 int xl_init_io(void)
120 {
121 return -1;
122 }
123