1 /*
2 * ad2s1210.c support for the ADI Resolver to Digital Converters: AD2S1210
3 *
4 * Copyright (c) 2010-2010 Analog Devices Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11 #include <linux/types.h>
12 #include <linux/mutex.h>
13 #include <linux/device.h>
14 #include <linux/spi/spi.h>
15 #include <linux/slab.h>
16 #include <linux/sysfs.h>
17 #include <linux/delay.h>
18 #include <linux/gpio.h>
19 #include <linux/module.h>
20
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 #include "ad2s1210.h"
24
25 #define DRV_NAME "ad2s1210"
26
27 #define AD2S1210_DEF_CONTROL 0x7E
28
29 #define AD2S1210_MSB_IS_HIGH 0x80
30 #define AD2S1210_MSB_IS_LOW 0x7F
31 #define AD2S1210_PHASE_LOCK_RANGE_44 0x20
32 #define AD2S1210_ENABLE_HYSTERESIS 0x10
33 #define AD2S1210_SET_ENRES1 0x08
34 #define AD2S1210_SET_ENRES0 0x04
35 #define AD2S1210_SET_RES1 0x02
36 #define AD2S1210_SET_RES0 0x01
37
38 #define AD2S1210_SET_ENRESOLUTION (AD2S1210_SET_ENRES1 | \
39 AD2S1210_SET_ENRES0)
40 #define AD2S1210_SET_RESOLUTION (AD2S1210_SET_RES1 | AD2S1210_SET_RES0)
41
42 #define AD2S1210_REG_POSITION 0x80
43 #define AD2S1210_REG_VELOCITY 0x82
44 #define AD2S1210_REG_LOS_THRD 0x88
45 #define AD2S1210_REG_DOS_OVR_THRD 0x89
46 #define AD2S1210_REG_DOS_MIS_THRD 0x8A
47 #define AD2S1210_REG_DOS_RST_MAX_THRD 0x8B
48 #define AD2S1210_REG_DOS_RST_MIN_THRD 0x8C
49 #define AD2S1210_REG_LOT_HIGH_THRD 0x8D
50 #define AD2S1210_REG_LOT_LOW_THRD 0x8E
51 #define AD2S1210_REG_EXCIT_FREQ 0x91
52 #define AD2S1210_REG_CONTROL 0x92
53 #define AD2S1210_REG_SOFT_RESET 0xF0
54 #define AD2S1210_REG_FAULT 0xFF
55
56 /* pin SAMPLE, A0, A1, RES0, RES1, is controlled by driver */
57 #define AD2S1210_SAA 3
58 #define AD2S1210_PN (AD2S1210_SAA + AD2S1210_RES)
59
60 #define AD2S1210_MIN_CLKIN 6144000
61 #define AD2S1210_MAX_CLKIN 10240000
62 #define AD2S1210_MIN_EXCIT 2000
63 #define AD2S1210_MAX_EXCIT 20000
64 #define AD2S1210_MIN_FCW 0x4
65 #define AD2S1210_MAX_FCW 0x50
66
67 /* default input clock on serial interface */
68 #define AD2S1210_DEF_CLKIN 8192000
69 /* clock period in nano second */
70 #define AD2S1210_DEF_TCK (1000000000/AD2S1210_DEF_CLKIN)
71 #define AD2S1210_DEF_EXCIT 10000
72
73 enum ad2s1210_mode {
74 MOD_POS = 0,
75 MOD_VEL,
76 MOD_CONFIG,
77 MOD_RESERVED,
78 };
79
80 static const unsigned int ad2s1210_resolution_value[] = { 10, 12, 14, 16 };
81
82 struct ad2s1210_state {
83 const struct ad2s1210_platform_data *pdata;
84 struct mutex lock;
85 struct spi_device *sdev;
86 unsigned int fclkin;
87 unsigned int fexcit;
88 bool hysteresis;
89 bool old_data;
90 u8 resolution;
91 enum ad2s1210_mode mode;
92 u8 rx[2] ____cacheline_aligned;
93 u8 tx[2] ____cacheline_aligned;
94 };
95
96 static const int ad2s1210_mode_vals[4][2] = {
97 [MOD_POS] = { 0, 0 },
98 [MOD_VEL] = { 0, 1 },
99 [MOD_CONFIG] = { 1, 0 },
100 };
ad2s1210_set_mode(enum ad2s1210_mode mode,struct ad2s1210_state * st)101 static inline void ad2s1210_set_mode(enum ad2s1210_mode mode,
102 struct ad2s1210_state *st)
103 {
104 gpio_set_value(st->pdata->a[0], ad2s1210_mode_vals[mode][0]);
105 gpio_set_value(st->pdata->a[1], ad2s1210_mode_vals[mode][1]);
106 st->mode = mode;
107 }
108
109 /* write 1 bytes (address or data) to the chip */
ad2s1210_config_write(struct ad2s1210_state * st,u8 data)110 static int ad2s1210_config_write(struct ad2s1210_state *st, u8 data)
111 {
112 int ret;
113
114 ad2s1210_set_mode(MOD_CONFIG, st);
115 st->tx[0] = data;
116 ret = spi_write(st->sdev, st->tx, 1);
117 if (ret < 0)
118 return ret;
119 st->old_data = true;
120
121 return 0;
122 }
123
124 /* read value from one of the registers */
ad2s1210_config_read(struct ad2s1210_state * st,unsigned char address)125 static int ad2s1210_config_read(struct ad2s1210_state *st,
126 unsigned char address)
127 {
128 struct spi_transfer xfers[] = {
129 {
130 .len = 1,
131 .rx_buf = &st->rx[0],
132 .tx_buf = &st->tx[0],
133 .cs_change = 1,
134 }, {
135 .len = 1,
136 .rx_buf = &st->rx[1],
137 .tx_buf = &st->tx[1],
138 },
139 };
140 int ret = 0;
141
142 ad2s1210_set_mode(MOD_CONFIG, st);
143 st->tx[0] = address | AD2S1210_MSB_IS_HIGH;
144 st->tx[1] = AD2S1210_REG_FAULT;
145 ret = spi_sync_transfer(st->sdev, xfers, 2);
146 if (ret < 0)
147 return ret;
148 st->old_data = true;
149
150 return st->rx[1];
151 }
152
153 static inline
ad2s1210_update_frequency_control_word(struct ad2s1210_state * st)154 int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st)
155 {
156 int ret;
157 unsigned char fcw;
158
159 fcw = (unsigned char)(st->fexcit * (1 << 15) / st->fclkin);
160 if (fcw < AD2S1210_MIN_FCW || fcw > AD2S1210_MAX_FCW) {
161 dev_err(&st->sdev->dev, "ad2s1210: FCW out of range\n");
162 return -ERANGE;
163 }
164
165 ret = ad2s1210_config_write(st, AD2S1210_REG_EXCIT_FREQ);
166 if (ret < 0)
167 return ret;
168
169 return ad2s1210_config_write(st, fcw);
170 }
171
ad2s1210_read_resolution_pin(struct ad2s1210_state * st)172 static unsigned char ad2s1210_read_resolution_pin(struct ad2s1210_state *st)
173 {
174 return ad2s1210_resolution_value[
175 (gpio_get_value(st->pdata->res[0]) << 1) |
176 gpio_get_value(st->pdata->res[1])];
177 }
178
179 static const int ad2s1210_res_pins[4][2] = {
180 { 0, 0 }, {0, 1}, {1, 0}, {1, 1}
181 };
182
ad2s1210_set_resolution_pin(struct ad2s1210_state * st)183 static inline void ad2s1210_set_resolution_pin(struct ad2s1210_state *st)
184 {
185 gpio_set_value(st->pdata->res[0],
186 ad2s1210_res_pins[(st->resolution - 10)/2][0]);
187 gpio_set_value(st->pdata->res[1],
188 ad2s1210_res_pins[(st->resolution - 10)/2][1]);
189 }
190
ad2s1210_soft_reset(struct ad2s1210_state * st)191 static inline int ad2s1210_soft_reset(struct ad2s1210_state *st)
192 {
193 int ret;
194
195 ret = ad2s1210_config_write(st, AD2S1210_REG_SOFT_RESET);
196 if (ret < 0)
197 return ret;
198
199 return ad2s1210_config_write(st, 0x0);
200 }
201
ad2s1210_show_fclkin(struct device * dev,struct device_attribute * attr,char * buf)202 static ssize_t ad2s1210_show_fclkin(struct device *dev,
203 struct device_attribute *attr,
204 char *buf)
205 {
206 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
207
208 return sprintf(buf, "%u\n", st->fclkin);
209 }
210
ad2s1210_store_fclkin(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)211 static ssize_t ad2s1210_store_fclkin(struct device *dev,
212 struct device_attribute *attr,
213 const char *buf,
214 size_t len)
215 {
216 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
217 unsigned int fclkin;
218 int ret;
219
220 ret = kstrtouint(buf, 10, &fclkin);
221 if (ret)
222 return ret;
223 if (fclkin < AD2S1210_MIN_CLKIN || fclkin > AD2S1210_MAX_CLKIN) {
224 dev_err(dev, "ad2s1210: fclkin out of range\n");
225 return -EINVAL;
226 }
227
228 mutex_lock(&st->lock);
229 st->fclkin = fclkin;
230
231 ret = ad2s1210_update_frequency_control_word(st);
232 if (ret < 0)
233 goto error_ret;
234 ret = ad2s1210_soft_reset(st);
235 error_ret:
236 mutex_unlock(&st->lock);
237
238 return ret < 0 ? ret : len;
239 }
240
ad2s1210_show_fexcit(struct device * dev,struct device_attribute * attr,char * buf)241 static ssize_t ad2s1210_show_fexcit(struct device *dev,
242 struct device_attribute *attr,
243 char *buf)
244 {
245 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
246
247 return sprintf(buf, "%u\n", st->fexcit);
248 }
249
ad2s1210_store_fexcit(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)250 static ssize_t ad2s1210_store_fexcit(struct device *dev,
251 struct device_attribute *attr,
252 const char *buf, size_t len)
253 {
254 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
255 unsigned int fexcit;
256 int ret;
257
258 ret = kstrtouint(buf, 10, &fexcit);
259 if (ret < 0)
260 return ret;
261 if (fexcit < AD2S1210_MIN_EXCIT || fexcit > AD2S1210_MAX_EXCIT) {
262 dev_err(dev,
263 "ad2s1210: excitation frequency out of range\n");
264 return -EINVAL;
265 }
266 mutex_lock(&st->lock);
267 st->fexcit = fexcit;
268 ret = ad2s1210_update_frequency_control_word(st);
269 if (ret < 0)
270 goto error_ret;
271 ret = ad2s1210_soft_reset(st);
272 error_ret:
273 mutex_unlock(&st->lock);
274
275 return ret < 0 ? ret : len;
276 }
277
ad2s1210_show_control(struct device * dev,struct device_attribute * attr,char * buf)278 static ssize_t ad2s1210_show_control(struct device *dev,
279 struct device_attribute *attr,
280 char *buf)
281 {
282 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
283 int ret;
284
285 mutex_lock(&st->lock);
286 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
287 mutex_unlock(&st->lock);
288 return ret < 0 ? ret : sprintf(buf, "0x%x\n", ret);
289 }
290
ad2s1210_store_control(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)291 static ssize_t ad2s1210_store_control(struct device *dev,
292 struct device_attribute *attr,
293 const char *buf, size_t len)
294 {
295 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
296 unsigned char udata;
297 unsigned char data;
298 int ret;
299
300 ret = kstrtou8(buf, 16, &udata);
301 if (ret)
302 return -EINVAL;
303
304 mutex_lock(&st->lock);
305 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
306 if (ret < 0)
307 goto error_ret;
308 data = udata & AD2S1210_MSB_IS_LOW;
309 ret = ad2s1210_config_write(st, data);
310 if (ret < 0)
311 goto error_ret;
312
313 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
314 if (ret < 0)
315 goto error_ret;
316 if (ret & AD2S1210_MSB_IS_HIGH) {
317 ret = -EIO;
318 dev_err(dev,
319 "ad2s1210: write control register fail\n");
320 goto error_ret;
321 }
322 st->resolution
323 = ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
324 if (st->pdata->gpioin) {
325 data = ad2s1210_read_resolution_pin(st);
326 if (data != st->resolution)
327 dev_warn(dev, "ad2s1210: resolution settings not match\n");
328 } else
329 ad2s1210_set_resolution_pin(st);
330
331 ret = len;
332 st->hysteresis = !!(data & AD2S1210_ENABLE_HYSTERESIS);
333
334 error_ret:
335 mutex_unlock(&st->lock);
336 return ret;
337 }
338
ad2s1210_show_resolution(struct device * dev,struct device_attribute * attr,char * buf)339 static ssize_t ad2s1210_show_resolution(struct device *dev,
340 struct device_attribute *attr, char *buf)
341 {
342 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
343
344 return sprintf(buf, "%d\n", st->resolution);
345 }
346
ad2s1210_store_resolution(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)347 static ssize_t ad2s1210_store_resolution(struct device *dev,
348 struct device_attribute *attr,
349 const char *buf, size_t len)
350 {
351 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
352 unsigned char data;
353 unsigned char udata;
354 int ret;
355
356 ret = kstrtou8(buf, 10, &udata);
357 if (ret || udata < 10 || udata > 16) {
358 dev_err(dev, "ad2s1210: resolution out of range\n");
359 return -EINVAL;
360 }
361 mutex_lock(&st->lock);
362 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
363 if (ret < 0)
364 goto error_ret;
365 data = ret;
366 data &= ~AD2S1210_SET_RESOLUTION;
367 data |= (udata - 10) >> 1;
368 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
369 if (ret < 0)
370 goto error_ret;
371 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
372 if (ret < 0)
373 goto error_ret;
374 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
375 if (ret < 0)
376 goto error_ret;
377 data = ret;
378 if (data & AD2S1210_MSB_IS_HIGH) {
379 ret = -EIO;
380 dev_err(dev, "ad2s1210: setting resolution fail\n");
381 goto error_ret;
382 }
383 st->resolution
384 = ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
385 if (st->pdata->gpioin) {
386 data = ad2s1210_read_resolution_pin(st);
387 if (data != st->resolution)
388 dev_warn(dev, "ad2s1210: resolution settings not match\n");
389 } else
390 ad2s1210_set_resolution_pin(st);
391 ret = len;
392 error_ret:
393 mutex_unlock(&st->lock);
394 return ret;
395 }
396
397 /* read the fault register since last sample */
ad2s1210_show_fault(struct device * dev,struct device_attribute * attr,char * buf)398 static ssize_t ad2s1210_show_fault(struct device *dev,
399 struct device_attribute *attr, char *buf)
400 {
401 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
402 int ret;
403
404 mutex_lock(&st->lock);
405 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
406 mutex_unlock(&st->lock);
407
408 return ret ? ret : sprintf(buf, "0x%x\n", ret);
409 }
410
ad2s1210_clear_fault(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)411 static ssize_t ad2s1210_clear_fault(struct device *dev,
412 struct device_attribute *attr,
413 const char *buf,
414 size_t len)
415 {
416 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
417 int ret;
418
419 mutex_lock(&st->lock);
420 gpio_set_value(st->pdata->sample, 0);
421 /* delay (2 * tck + 20) nano seconds */
422 udelay(1);
423 gpio_set_value(st->pdata->sample, 1);
424 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
425 if (ret < 0)
426 goto error_ret;
427 gpio_set_value(st->pdata->sample, 0);
428 gpio_set_value(st->pdata->sample, 1);
429 error_ret:
430 mutex_unlock(&st->lock);
431
432 return ret < 0 ? ret : len;
433 }
434
ad2s1210_show_reg(struct device * dev,struct device_attribute * attr,char * buf)435 static ssize_t ad2s1210_show_reg(struct device *dev,
436 struct device_attribute *attr,
437 char *buf)
438 {
439 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
440 struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
441 int ret;
442
443 mutex_lock(&st->lock);
444 ret = ad2s1210_config_read(st, iattr->address);
445 mutex_unlock(&st->lock);
446
447 return ret < 0 ? ret : sprintf(buf, "%d\n", ret);
448 }
449
ad2s1210_store_reg(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)450 static ssize_t ad2s1210_store_reg(struct device *dev,
451 struct device_attribute *attr, const char *buf, size_t len)
452 {
453 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
454 unsigned char data;
455 int ret;
456 struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
457
458 ret = kstrtou8(buf, 10, &data);
459 if (ret)
460 return -EINVAL;
461 mutex_lock(&st->lock);
462 ret = ad2s1210_config_write(st, iattr->address);
463 if (ret < 0)
464 goto error_ret;
465 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
466 error_ret:
467 mutex_unlock(&st->lock);
468 return ret < 0 ? ret : len;
469 }
470
ad2s1210_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)471 static int ad2s1210_read_raw(struct iio_dev *indio_dev,
472 struct iio_chan_spec const *chan,
473 int *val,
474 int *val2,
475 long m)
476 {
477 struct ad2s1210_state *st = iio_priv(indio_dev);
478 u16 negative;
479 int ret = 0;
480 u16 pos;
481 s16 vel;
482
483 mutex_lock(&st->lock);
484 gpio_set_value(st->pdata->sample, 0);
485 /* delay (6 * tck + 20) nano seconds */
486 udelay(1);
487
488 switch (chan->type) {
489 case IIO_ANGL:
490 ad2s1210_set_mode(MOD_POS, st);
491 break;
492 case IIO_ANGL_VEL:
493 ad2s1210_set_mode(MOD_VEL, st);
494 break;
495 default:
496 ret = -EINVAL;
497 break;
498 }
499 if (ret < 0)
500 goto error_ret;
501 ret = spi_read(st->sdev, st->rx, 2);
502 if (ret < 0)
503 goto error_ret;
504
505 switch (chan->type) {
506 case IIO_ANGL:
507 pos = be16_to_cpup((__be16 *) st->rx);
508 if (st->hysteresis)
509 pos >>= 16 - st->resolution;
510 *val = pos;
511 ret = IIO_VAL_INT;
512 break;
513 case IIO_ANGL_VEL:
514 negative = st->rx[0] & 0x80;
515 vel = be16_to_cpup((__be16 *) st->rx);
516 vel >>= 16 - st->resolution;
517 if (vel & 0x8000) {
518 negative = (0xffff >> st->resolution) << st->resolution;
519 vel |= negative;
520 }
521 *val = vel;
522 ret = IIO_VAL_INT;
523 break;
524 default:
525 mutex_unlock(&st->lock);
526 return -EINVAL;
527 }
528
529 error_ret:
530 gpio_set_value(st->pdata->sample, 1);
531 /* delay (2 * tck + 20) nano seconds */
532 udelay(1);
533 mutex_unlock(&st->lock);
534 return ret;
535 }
536
537 static IIO_DEVICE_ATTR(fclkin, S_IRUGO | S_IWUSR,
538 ad2s1210_show_fclkin, ad2s1210_store_fclkin, 0);
539 static IIO_DEVICE_ATTR(fexcit, S_IRUGO | S_IWUSR,
540 ad2s1210_show_fexcit, ad2s1210_store_fexcit, 0);
541 static IIO_DEVICE_ATTR(control, S_IRUGO | S_IWUSR,
542 ad2s1210_show_control, ad2s1210_store_control, 0);
543 static IIO_DEVICE_ATTR(bits, S_IRUGO | S_IWUSR,
544 ad2s1210_show_resolution, ad2s1210_store_resolution, 0);
545 static IIO_DEVICE_ATTR(fault, S_IRUGO | S_IWUSR,
546 ad2s1210_show_fault, ad2s1210_clear_fault, 0);
547
548 static IIO_DEVICE_ATTR(los_thrd, S_IRUGO | S_IWUSR,
549 ad2s1210_show_reg, ad2s1210_store_reg,
550 AD2S1210_REG_LOS_THRD);
551 static IIO_DEVICE_ATTR(dos_ovr_thrd, S_IRUGO | S_IWUSR,
552 ad2s1210_show_reg, ad2s1210_store_reg,
553 AD2S1210_REG_DOS_OVR_THRD);
554 static IIO_DEVICE_ATTR(dos_mis_thrd, S_IRUGO | S_IWUSR,
555 ad2s1210_show_reg, ad2s1210_store_reg,
556 AD2S1210_REG_DOS_MIS_THRD);
557 static IIO_DEVICE_ATTR(dos_rst_max_thrd, S_IRUGO | S_IWUSR,
558 ad2s1210_show_reg, ad2s1210_store_reg,
559 AD2S1210_REG_DOS_RST_MAX_THRD);
560 static IIO_DEVICE_ATTR(dos_rst_min_thrd, S_IRUGO | S_IWUSR,
561 ad2s1210_show_reg, ad2s1210_store_reg,
562 AD2S1210_REG_DOS_RST_MIN_THRD);
563 static IIO_DEVICE_ATTR(lot_high_thrd, S_IRUGO | S_IWUSR,
564 ad2s1210_show_reg, ad2s1210_store_reg,
565 AD2S1210_REG_LOT_HIGH_THRD);
566 static IIO_DEVICE_ATTR(lot_low_thrd, S_IRUGO | S_IWUSR,
567 ad2s1210_show_reg, ad2s1210_store_reg,
568 AD2S1210_REG_LOT_LOW_THRD);
569
570
571 static const struct iio_chan_spec ad2s1210_channels[] = {
572 {
573 .type = IIO_ANGL,
574 .indexed = 1,
575 .channel = 0,
576 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
577 }, {
578 .type = IIO_ANGL_VEL,
579 .indexed = 1,
580 .channel = 0,
581 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
582 }
583 };
584
585 static struct attribute *ad2s1210_attributes[] = {
586 &iio_dev_attr_fclkin.dev_attr.attr,
587 &iio_dev_attr_fexcit.dev_attr.attr,
588 &iio_dev_attr_control.dev_attr.attr,
589 &iio_dev_attr_bits.dev_attr.attr,
590 &iio_dev_attr_fault.dev_attr.attr,
591 &iio_dev_attr_los_thrd.dev_attr.attr,
592 &iio_dev_attr_dos_ovr_thrd.dev_attr.attr,
593 &iio_dev_attr_dos_mis_thrd.dev_attr.attr,
594 &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr,
595 &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr,
596 &iio_dev_attr_lot_high_thrd.dev_attr.attr,
597 &iio_dev_attr_lot_low_thrd.dev_attr.attr,
598 NULL,
599 };
600
601 static const struct attribute_group ad2s1210_attribute_group = {
602 .attrs = ad2s1210_attributes,
603 };
604
ad2s1210_initial(struct ad2s1210_state * st)605 static int ad2s1210_initial(struct ad2s1210_state *st)
606 {
607 unsigned char data;
608 int ret;
609
610 mutex_lock(&st->lock);
611 if (st->pdata->gpioin)
612 st->resolution = ad2s1210_read_resolution_pin(st);
613 else
614 ad2s1210_set_resolution_pin(st);
615
616 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
617 if (ret < 0)
618 goto error_ret;
619 data = AD2S1210_DEF_CONTROL & ~(AD2S1210_SET_RESOLUTION);
620 data |= (st->resolution - 10) >> 1;
621 ret = ad2s1210_config_write(st, data);
622 if (ret < 0)
623 goto error_ret;
624 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
625 if (ret < 0)
626 goto error_ret;
627
628 if (ret & AD2S1210_MSB_IS_HIGH) {
629 ret = -EIO;
630 goto error_ret;
631 }
632
633 ret = ad2s1210_update_frequency_control_word(st);
634 if (ret < 0)
635 goto error_ret;
636 ret = ad2s1210_soft_reset(st);
637 error_ret:
638 mutex_unlock(&st->lock);
639 return ret;
640 }
641
642 static const struct iio_info ad2s1210_info = {
643 .read_raw = ad2s1210_read_raw,
644 .attrs = &ad2s1210_attribute_group,
645 .driver_module = THIS_MODULE,
646 };
647
ad2s1210_setup_gpios(struct ad2s1210_state * st)648 static int ad2s1210_setup_gpios(struct ad2s1210_state *st)
649 {
650 unsigned long flags = st->pdata->gpioin ? GPIOF_DIR_IN : GPIOF_DIR_OUT;
651 struct gpio ad2s1210_gpios[] = {
652 { st->pdata->sample, GPIOF_DIR_IN, "sample" },
653 { st->pdata->a[0], flags, "a0" },
654 { st->pdata->a[1], flags, "a1" },
655 { st->pdata->res[0], flags, "res0" },
656 { st->pdata->res[0], flags, "res1" },
657 };
658
659 return gpio_request_array(ad2s1210_gpios, ARRAY_SIZE(ad2s1210_gpios));
660 }
661
ad2s1210_free_gpios(struct ad2s1210_state * st)662 static void ad2s1210_free_gpios(struct ad2s1210_state *st)
663 {
664 unsigned long flags = st->pdata->gpioin ? GPIOF_DIR_IN : GPIOF_DIR_OUT;
665 struct gpio ad2s1210_gpios[] = {
666 { st->pdata->sample, GPIOF_DIR_IN, "sample" },
667 { st->pdata->a[0], flags, "a0" },
668 { st->pdata->a[1], flags, "a1" },
669 { st->pdata->res[0], flags, "res0" },
670 { st->pdata->res[0], flags, "res1" },
671 };
672
673 gpio_free_array(ad2s1210_gpios, ARRAY_SIZE(ad2s1210_gpios));
674 }
675
ad2s1210_probe(struct spi_device * spi)676 static int ad2s1210_probe(struct spi_device *spi)
677 {
678 struct iio_dev *indio_dev;
679 struct ad2s1210_state *st;
680 int ret;
681
682 if (spi->dev.platform_data == NULL)
683 return -EINVAL;
684
685 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
686 if (!indio_dev)
687 return -ENOMEM;
688 st = iio_priv(indio_dev);
689 st->pdata = spi->dev.platform_data;
690 ret = ad2s1210_setup_gpios(st);
691 if (ret < 0)
692 return ret;
693
694 spi_set_drvdata(spi, indio_dev);
695
696 mutex_init(&st->lock);
697 st->sdev = spi;
698 st->hysteresis = true;
699 st->mode = MOD_CONFIG;
700 st->resolution = 12;
701 st->fexcit = AD2S1210_DEF_EXCIT;
702
703 indio_dev->dev.parent = &spi->dev;
704 indio_dev->info = &ad2s1210_info;
705 indio_dev->modes = INDIO_DIRECT_MODE;
706 indio_dev->channels = ad2s1210_channels;
707 indio_dev->num_channels = ARRAY_SIZE(ad2s1210_channels);
708 indio_dev->name = spi_get_device_id(spi)->name;
709
710 ret = iio_device_register(indio_dev);
711 if (ret)
712 goto error_free_gpios;
713
714 st->fclkin = spi->max_speed_hz;
715 spi->mode = SPI_MODE_3;
716 spi_setup(spi);
717 ad2s1210_initial(st);
718
719 return 0;
720
721 error_free_gpios:
722 ad2s1210_free_gpios(st);
723 return ret;
724 }
725
ad2s1210_remove(struct spi_device * spi)726 static int ad2s1210_remove(struct spi_device *spi)
727 {
728 struct iio_dev *indio_dev = spi_get_drvdata(spi);
729
730 iio_device_unregister(indio_dev);
731 ad2s1210_free_gpios(iio_priv(indio_dev));
732
733 return 0;
734 }
735
736 static const struct spi_device_id ad2s1210_id[] = {
737 { "ad2s1210" },
738 {}
739 };
740 MODULE_DEVICE_TABLE(spi, ad2s1210_id);
741
742 static struct spi_driver ad2s1210_driver = {
743 .driver = {
744 .name = DRV_NAME,
745 },
746 .probe = ad2s1210_probe,
747 .remove = ad2s1210_remove,
748 .id_table = ad2s1210_id,
749 };
750 module_spi_driver(ad2s1210_driver);
751
752 MODULE_AUTHOR("Graff Yang <graff.yang@gmail.com>");
753 MODULE_DESCRIPTION("Analog Devices AD2S1210 Resolver to Digital SPI driver");
754 MODULE_LICENSE("GPL v2");
755